clk: keystone: fix a trivial typo
s/regsiter/register/ Signed-off-by: Geliang Tang <geliangtang@163.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -157,7 +157,7 @@ out:
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* _of_clk_init - PLL initialisation via DT
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* @node: device tree node for this clock
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* @pllctrl: If true, lower 6 bits of multiplier is in pllm register of
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* pll controller, else it is in the control regsiter0(bit 11-6)
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* pll controller, else it is in the control register0(bit 11-6)
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*/
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static void __init _of_pll_clk_init(struct device_node *node, bool pllctrl)
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{
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