EDAC/mce_amd: Print syndrome register value on SMCA systems
Print SyndV bit status and print the raw value of the MCA_SYND register. Further decoding of the syndrome from struct mce.synd can be done in other places where appropriate, e.g. DRAM ECC. Boris: make the error stanza more compact by putting the error address and syndrome on the same line: [Hardware Error]: Corrected error, no action required. [Hardware Error]: CPU:2 (17:0:0) MC4_STATUS[-|CE|-|PCC|AddrV|-|-|SyndV|CECC]: 0x96204100001e0117 [Hardware Error]: Error Addr: 0x000000007f4c52e3, Syndrome: 0x0000000000000000 [Hardware Error]: Invalid IP block specified. [Hardware Error]: cache level: L3/GEN, tx: DATA, mem-tx: RD Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com> Signed-off-by: Borislav Petkov <bp@suse.de> Link: http://lkml.kernel.org/r/1467633035-32080-2-git-send-email-Yazen.Ghannam@amd.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -927,7 +927,7 @@ static void decode_smca_errors(struct mce *m)
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size_t len;
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size_t len;
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if (rdmsr_safe(addr, &low, &high)) {
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if (rdmsr_safe(addr, &low, &high)) {
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pr_emerg("Invalid IP block specified, error information is unreliable.\n");
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pr_emerg(HW_ERR "Invalid IP block specified.\n");
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return;
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return;
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}
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}
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@ -1078,6 +1078,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
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u32 low, high;
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u32 low, high;
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u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
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u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
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pr_cont("|%s", ((m->status & MCI_STATUS_SYNDV) ? "SyndV" : "-"));
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if (!rdmsr_safe(addr, &low, &high) &&
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if (!rdmsr_safe(addr, &low, &high) &&
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(low & MCI_CONFIG_MCAX))
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(low & MCI_CONFIG_MCAX))
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pr_cont("|%s", ((m->status & MCI_STATUS_TCC) ? "TCC" : "-"));
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pr_cont("|%s", ((m->status & MCI_STATUS_TCC) ? "TCC" : "-"));
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@ -1091,12 +1093,18 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
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pr_cont("]: 0x%016llx\n", m->status);
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pr_cont("]: 0x%016llx\n", m->status);
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if (m->status & MCI_STATUS_ADDRV)
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if (m->status & MCI_STATUS_ADDRV)
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pr_emerg(HW_ERR "MC%d Error Address: 0x%016llx\n", m->bank, m->addr);
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pr_emerg(HW_ERR "Error Addr: 0x%016llx", m->addr);
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if (boot_cpu_has(X86_FEATURE_SMCA)) {
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if (boot_cpu_has(X86_FEATURE_SMCA)) {
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if (m->status & MCI_STATUS_SYNDV)
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pr_cont(", Syndrome: 0x%016llx", m->synd);
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pr_cont("\n");
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decode_smca_errors(m);
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decode_smca_errors(m);
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goto err_code;
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goto err_code;
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}
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} else
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pr_cont("\n");
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if (!fam_ops)
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if (!fam_ops)
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goto err_code;
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goto err_code;
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