[media] vcodec: mediatek: Add Mediatek JPEG Decoder Driver

Add v4l2 driver for Mediatek JPEG Decoder

Signed-off-by: Rick Chang <rick.chang@mediatek.com>
Signed-off-by: Minghsiu Tsai <minghsiu.tsai@mediatek.com>
Reviewed-by: Ricky Liang <jcliang@chromium.org>
Tested-by: Ricky Liang <jcliang@chromium.org>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
This commit is contained in:
Rick Chang 2016-12-14 06:04:48 -02:00 committed by Mauro Carvalho Chehab
parent 84a67742b1
commit b2f0d2724b
10 changed files with 2215 additions and 0 deletions

View File

@ -165,6 +165,21 @@ config VIDEO_CODA
config VIDEO_IMX_VDOA config VIDEO_IMX_VDOA
def_tristate VIDEO_CODA if SOC_IMX6Q || COMPILE_TEST def_tristate VIDEO_CODA if SOC_IMX6Q || COMPILE_TEST
config VIDEO_MEDIATEK_JPEG
tristate "Mediatek JPEG Codec driver"
depends on MTK_IOMMU_V1 || COMPILE_TEST
depends on VIDEO_DEV && VIDEO_V4L2
depends on ARCH_MEDIATEK || COMPILE_TEST
depends on HAS_DMA
select VIDEOBUF2_DMA_CONTIG
select V4L2_MEM2MEM_DEV
---help---
Mediatek jpeg codec driver provides HW capability to decode
JPEG format
To compile this driver as a module, choose M here: the
module will be called mtk-jpeg
config VIDEO_MEDIATEK_VPU config VIDEO_MEDIATEK_VPU
tristate "Mediatek Video Processor Unit" tristate "Mediatek Video Processor Unit"
depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA depends on VIDEO_DEV && VIDEO_V4L2 && HAS_DMA

View File

@ -71,3 +71,5 @@ obj-$(CONFIG_VIDEO_MEDIATEK_VPU) += mtk-vpu/
obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk-vcodec/ obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk-vcodec/
obj-$(CONFIG_VIDEO_MEDIATEK_MDP) += mtk-mdp/ obj-$(CONFIG_VIDEO_MEDIATEK_MDP) += mtk-mdp/
obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk-jpeg/

View File

@ -0,0 +1,2 @@
mtk_jpeg-objs := mtk_jpeg_core.o mtk_jpeg_hw.o mtk_jpeg_parse.o
obj-$(CONFIG_VIDEO_MEDIATEK_JPEG) += mtk_jpeg.o

File diff suppressed because it is too large Load Diff

View File

@ -0,0 +1,139 @@
/*
* Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _MTK_JPEG_CORE_H
#define _MTK_JPEG_CORE_H
#include <linux/interrupt.h>
#include <media/v4l2-ctrls.h>
#include <media/v4l2-device.h>
#include <media/v4l2-fh.h>
#define MTK_JPEG_NAME "mtk-jpeg"
#define MTK_JPEG_FMT_FLAG_DEC_OUTPUT BIT(0)
#define MTK_JPEG_FMT_FLAG_DEC_CAPTURE BIT(1)
#define MTK_JPEG_FMT_TYPE_OUTPUT 1
#define MTK_JPEG_FMT_TYPE_CAPTURE 2
#define MTK_JPEG_MIN_WIDTH 32
#define MTK_JPEG_MIN_HEIGHT 32
#define MTK_JPEG_MAX_WIDTH 8192
#define MTK_JPEG_MAX_HEIGHT 8192
#define MTK_JPEG_DEFAULT_SIZEIMAGE (1 * 1024 * 1024)
enum mtk_jpeg_ctx_state {
MTK_JPEG_INIT = 0,
MTK_JPEG_RUNNING,
MTK_JPEG_SOURCE_CHANGE,
};
/**
* struct mt_jpeg - JPEG IP abstraction
* @lock: the mutex protecting this structure
* @hw_lock: spinlock protecting the hw device resource
* @workqueue: decode work queue
* @dev: JPEG device
* @v4l2_dev: v4l2 device for mem2mem mode
* @m2m_dev: v4l2 mem2mem device data
* @alloc_ctx: videobuf2 memory allocator's context
* @dec_vdev: video device node for decoder mem2mem mode
* @dec_reg_base: JPEG registers mapping
* @clk_jdec: JPEG hw working clock
* @clk_jdec_smi: JPEG SMI bus clock
* @larb: SMI device
*/
struct mtk_jpeg_dev {
struct mutex lock;
spinlock_t hw_lock;
struct workqueue_struct *workqueue;
struct device *dev;
struct v4l2_device v4l2_dev;
struct v4l2_m2m_dev *m2m_dev;
void *alloc_ctx;
struct video_device *dec_vdev;
void __iomem *dec_reg_base;
struct clk *clk_jdec;
struct clk *clk_jdec_smi;
struct device *larb;
};
/**
* struct jpeg_fmt - driver's internal color format data
* @fourcc: the fourcc code, 0 if not applicable
* @h_sample: horizontal sample count of plane in 4 * 4 pixel image
* @v_sample: vertical sample count of plane in 4 * 4 pixel image
* @colplanes: number of color planes (1 for packed formats)
* @h_align: horizontal alignment order (align to 2^h_align)
* @v_align: vertical alignment order (align to 2^v_align)
* @flags: flags describing format applicability
*/
struct mtk_jpeg_fmt {
u32 fourcc;
int h_sample[VIDEO_MAX_PLANES];
int v_sample[VIDEO_MAX_PLANES];
int colplanes;
int h_align;
int v_align;
u32 flags;
};
/**
* mtk_jpeg_q_data - parameters of one queue
* @fmt: driver-specific format of this queue
* @w: image width
* @h: image height
* @bytesperline: distance in bytes between the leftmost pixels in two adjacent
* lines
* @sizeimage: image buffer size in bytes
*/
struct mtk_jpeg_q_data {
struct mtk_jpeg_fmt *fmt;
u32 w;
u32 h;
u32 bytesperline[VIDEO_MAX_PLANES];
u32 sizeimage[VIDEO_MAX_PLANES];
};
/**
* mtk_jpeg_ctx - the device context data
* @jpeg: JPEG IP device for this context
* @out_q: source (output) queue information
* @cap_q: destination (capture) queue queue information
* @fh: V4L2 file handle
* @dec_param parameters for HW decoding
* @state: state of the context
* @header_valid: set if header has been parsed and valid
* @colorspace: enum v4l2_colorspace; supplemental to pixelformat
* @ycbcr_enc: enum v4l2_ycbcr_encoding, Y'CbCr encoding
* @quantization: enum v4l2_quantization, colorspace quantization
* @xfer_func: enum v4l2_xfer_func, colorspace transfer function
*/
struct mtk_jpeg_ctx {
struct mtk_jpeg_dev *jpeg;
struct mtk_jpeg_q_data out_q;
struct mtk_jpeg_q_data cap_q;
struct v4l2_fh fh;
enum mtk_jpeg_ctx_state state;
enum v4l2_colorspace colorspace;
enum v4l2_ycbcr_encoding ycbcr_enc;
enum v4l2_quantization quantization;
enum v4l2_xfer_func xfer_func;
};
#endif /* _MTK_JPEG_CORE_H */

View File

@ -0,0 +1,417 @@
/*
* Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/io.h>
#include <linux/kernel.h>
#include <media/videobuf2-core.h>
#include "mtk_jpeg_hw.h"
#define MTK_JPEG_DUNUM_MASK(val) (((val) - 1) & 0x3)
enum mtk_jpeg_color {
MTK_JPEG_COLOR_420 = 0x00221111,
MTK_JPEG_COLOR_422 = 0x00211111,
MTK_JPEG_COLOR_444 = 0x00111111,
MTK_JPEG_COLOR_422V = 0x00121111,
MTK_JPEG_COLOR_422X2 = 0x00412121,
MTK_JPEG_COLOR_422VX2 = 0x00222121,
MTK_JPEG_COLOR_400 = 0x00110000
};
static inline int mtk_jpeg_verify_align(u32 val, int align, u32 reg)
{
if (val & (align - 1)) {
pr_err("mtk-jpeg: write reg %x without %d align\n", reg, align);
return -1;
}
return 0;
}
static int mtk_jpeg_decide_format(struct mtk_jpeg_dec_param *param)
{
param->src_color = (param->sampling_w[0] << 20) |
(param->sampling_h[0] << 16) |
(param->sampling_w[1] << 12) |
(param->sampling_h[1] << 8) |
(param->sampling_w[2] << 4) |
(param->sampling_h[2]);
param->uv_brz_w = 0;
switch (param->src_color) {
case MTK_JPEG_COLOR_444:
param->uv_brz_w = 1;
param->dst_fourcc = V4L2_PIX_FMT_YUV422M;
break;
case MTK_JPEG_COLOR_422X2:
case MTK_JPEG_COLOR_422:
param->dst_fourcc = V4L2_PIX_FMT_YUV422M;
break;
case MTK_JPEG_COLOR_422V:
case MTK_JPEG_COLOR_422VX2:
param->uv_brz_w = 1;
param->dst_fourcc = V4L2_PIX_FMT_YUV420M;
break;
case MTK_JPEG_COLOR_420:
param->dst_fourcc = V4L2_PIX_FMT_YUV420M;
break;
case MTK_JPEG_COLOR_400:
param->dst_fourcc = V4L2_PIX_FMT_GREY;
break;
default:
param->dst_fourcc = 0;
return -1;
}
return 0;
}
static void mtk_jpeg_calc_mcu(struct mtk_jpeg_dec_param *param)
{
u32 factor_w, factor_h;
u32 i, comp, blk;
factor_w = 2 + param->sampling_w[0];
factor_h = 2 + param->sampling_h[0];
param->mcu_w = (param->pic_w + (1 << factor_w) - 1) >> factor_w;
param->mcu_h = (param->pic_h + (1 << factor_h) - 1) >> factor_h;
param->total_mcu = param->mcu_w * param->mcu_h;
param->unit_num = ((param->pic_w + 7) >> 3) * ((param->pic_h + 7) >> 3);
param->blk_num = 0;
for (i = 0; i < MTK_JPEG_COMP_MAX; i++) {
param->blk_comp[i] = 0;
if (i >= param->comp_num)
continue;
param->blk_comp[i] = param->sampling_w[i] *
param->sampling_h[i];
param->blk_num += param->blk_comp[i];
}
param->membership = 0;
for (i = 0, blk = 0, comp = 0; i < MTK_JPEG_BLOCK_MAX; i++) {
if (i < param->blk_num && comp < param->comp_num) {
u32 tmp;
tmp = (0x04 + (comp & 0x3));
param->membership |= tmp << (i * 3);
if (++blk == param->blk_comp[comp]) {
comp++;
blk = 0;
}
} else {
param->membership |= 7 << (i * 3);
}
}
}
static void mtk_jpeg_calc_dma_group(struct mtk_jpeg_dec_param *param)
{
u32 factor_mcu = 3;
if (param->src_color == MTK_JPEG_COLOR_444 &&
param->dst_fourcc == V4L2_PIX_FMT_YUV422M)
factor_mcu = 4;
else if (param->src_color == MTK_JPEG_COLOR_422V &&
param->dst_fourcc == V4L2_PIX_FMT_YUV420M)
factor_mcu = 4;
else if (param->src_color == MTK_JPEG_COLOR_422X2 &&
param->dst_fourcc == V4L2_PIX_FMT_YUV422M)
factor_mcu = 2;
else if (param->src_color == MTK_JPEG_COLOR_400 ||
(param->src_color & 0x0FFFF) == 0)
factor_mcu = 4;
param->dma_mcu = 1 << factor_mcu;
param->dma_group = param->mcu_w / param->dma_mcu;
param->dma_last_mcu = param->mcu_w % param->dma_mcu;
if (param->dma_last_mcu)
param->dma_group++;
else
param->dma_last_mcu = param->dma_mcu;
}
static int mtk_jpeg_calc_dst_size(struct mtk_jpeg_dec_param *param)
{
u32 i, padding_w;
u32 ds_row_h[3];
u32 brz_w[3];
brz_w[0] = 0;
brz_w[1] = param->uv_brz_w;
brz_w[2] = brz_w[1];
for (i = 0; i < param->comp_num; i++) {
if (brz_w[i] > 3)
return -1;
padding_w = param->mcu_w * MTK_JPEG_DCTSIZE *
param->sampling_w[i];
/* output format is 420/422 */
param->comp_w[i] = padding_w >> brz_w[i];
param->comp_w[i] = mtk_jpeg_align(param->comp_w[i],
MTK_JPEG_DCTSIZE);
param->img_stride[i] = i ? mtk_jpeg_align(param->comp_w[i], 16)
: mtk_jpeg_align(param->comp_w[i], 32);
ds_row_h[i] = (MTK_JPEG_DCTSIZE * param->sampling_h[i]);
}
param->dec_w = param->img_stride[0];
param->dec_h = ds_row_h[0] * param->mcu_h;
for (i = 0; i < MTK_JPEG_COMP_MAX; i++) {
/* They must be equal in frame mode. */
param->mem_stride[i] = param->img_stride[i];
param->comp_size[i] = param->mem_stride[i] * ds_row_h[i] *
param->mcu_h;
}
param->y_size = param->comp_size[0];
param->uv_size = param->comp_size[1];
param->dec_size = param->y_size + (param->uv_size << 1);
return 0;
}
int mtk_jpeg_dec_fill_param(struct mtk_jpeg_dec_param *param)
{
if (mtk_jpeg_decide_format(param))
return -1;
mtk_jpeg_calc_mcu(param);
mtk_jpeg_calc_dma_group(param);
if (mtk_jpeg_calc_dst_size(param))
return -2;
return 0;
}
u32 mtk_jpeg_dec_get_int_status(void __iomem *base)
{
u32 ret;
ret = readl(base + JPGDEC_REG_INTERRUPT_STATUS) & BIT_INQST_MASK_ALLIRQ;
if (ret)
writel(ret, base + JPGDEC_REG_INTERRUPT_STATUS);
return ret;
}
u32 mtk_jpeg_dec_enum_result(u32 irq_result)
{
if (irq_result & BIT_INQST_MASK_EOF)
return MTK_JPEG_DEC_RESULT_EOF_DONE;
if (irq_result & BIT_INQST_MASK_PAUSE)
return MTK_JPEG_DEC_RESULT_PAUSE;
if (irq_result & BIT_INQST_MASK_UNDERFLOW)
return MTK_JPEG_DEC_RESULT_UNDERFLOW;
if (irq_result & BIT_INQST_MASK_OVERFLOW)
return MTK_JPEG_DEC_RESULT_OVERFLOW;
if (irq_result & BIT_INQST_MASK_ERROR_BS)
return MTK_JPEG_DEC_RESULT_ERROR_BS;
return MTK_JPEG_DEC_RESULT_ERROR_UNKNOWN;
}
void mtk_jpeg_dec_start(void __iomem *base)
{
writel(0, base + JPGDEC_REG_TRIG);
}
static void mtk_jpeg_dec_soft_reset(void __iomem *base)
{
writel(0x0000FFFF, base + JPGDEC_REG_INTERRUPT_STATUS);
writel(0x00, base + JPGDEC_REG_RESET);
writel(0x01, base + JPGDEC_REG_RESET);
}
static void mtk_jpeg_dec_hard_reset(void __iomem *base)
{
writel(0x00, base + JPGDEC_REG_RESET);
writel(0x10, base + JPGDEC_REG_RESET);
}
void mtk_jpeg_dec_reset(void __iomem *base)
{
mtk_jpeg_dec_soft_reset(base);
mtk_jpeg_dec_hard_reset(base);
}
static void mtk_jpeg_dec_set_brz_factor(void __iomem *base, u8 yscale_w,
u8 yscale_h, u8 uvscale_w, u8 uvscale_h)
{
u32 val;
val = (uvscale_h << 12) | (uvscale_w << 8) |
(yscale_h << 4) | yscale_w;
writel(val, base + JPGDEC_REG_BRZ_FACTOR);
}
static void mtk_jpeg_dec_set_dst_bank0(void __iomem *base, u32 addr_y,
u32 addr_u, u32 addr_v)
{
mtk_jpeg_verify_align(addr_y, 16, JPGDEC_REG_DEST_ADDR0_Y);
writel(addr_y, base + JPGDEC_REG_DEST_ADDR0_Y);
mtk_jpeg_verify_align(addr_u, 16, JPGDEC_REG_DEST_ADDR0_U);
writel(addr_u, base + JPGDEC_REG_DEST_ADDR0_U);
mtk_jpeg_verify_align(addr_v, 16, JPGDEC_REG_DEST_ADDR0_V);
writel(addr_v, base + JPGDEC_REG_DEST_ADDR0_V);
}
static void mtk_jpeg_dec_set_dst_bank1(void __iomem *base, u32 addr_y,
u32 addr_u, u32 addr_v)
{
writel(addr_y, base + JPGDEC_REG_DEST_ADDR1_Y);
writel(addr_u, base + JPGDEC_REG_DEST_ADDR1_U);
writel(addr_v, base + JPGDEC_REG_DEST_ADDR1_V);
}
static void mtk_jpeg_dec_set_mem_stride(void __iomem *base, u32 stride_y,
u32 stride_uv)
{
writel((stride_y & 0xFFFF), base + JPGDEC_REG_STRIDE_Y);
writel((stride_uv & 0xFFFF), base + JPGDEC_REG_STRIDE_UV);
}
static void mtk_jpeg_dec_set_img_stride(void __iomem *base, u32 stride_y,
u32 stride_uv)
{
writel((stride_y & 0xFFFF), base + JPGDEC_REG_IMG_STRIDE_Y);
writel((stride_uv & 0xFFFF), base + JPGDEC_REG_IMG_STRIDE_UV);
}
static void mtk_jpeg_dec_set_pause_mcu_idx(void __iomem *base, u32 idx)
{
writel(idx & 0x0003FFFFFF, base + JPGDEC_REG_PAUSE_MCU_NUM);
}
static void mtk_jpeg_dec_set_dec_mode(void __iomem *base, u32 mode)
{
writel(mode & 0x03, base + JPGDEC_REG_OPERATION_MODE);
}
static void mtk_jpeg_dec_set_bs_write_ptr(void __iomem *base, u32 ptr)
{
mtk_jpeg_verify_align(ptr, 16, JPGDEC_REG_FILE_BRP);
writel(ptr, base + JPGDEC_REG_FILE_BRP);
}
static void mtk_jpeg_dec_set_bs_info(void __iomem *base, u32 addr, u32 size)
{
mtk_jpeg_verify_align(addr, 16, JPGDEC_REG_FILE_ADDR);
mtk_jpeg_verify_align(size, 128, JPGDEC_REG_FILE_TOTAL_SIZE);
writel(addr, base + JPGDEC_REG_FILE_ADDR);
writel(size, base + JPGDEC_REG_FILE_TOTAL_SIZE);
}
static void mtk_jpeg_dec_set_comp_id(void __iomem *base, u32 id_y, u32 id_u,
u32 id_v)
{
u32 val;
val = ((id_y & 0x00FF) << 24) | ((id_u & 0x00FF) << 16) |
((id_v & 0x00FF) << 8);
writel(val, base + JPGDEC_REG_COMP_ID);
}
static void mtk_jpeg_dec_set_total_mcu(void __iomem *base, u32 num)
{
writel(num - 1, base + JPGDEC_REG_TOTAL_MCU_NUM);
}
static void mtk_jpeg_dec_set_comp0_du(void __iomem *base, u32 num)
{
writel(num - 1, base + JPGDEC_REG_COMP0_DATA_UNIT_NUM);
}
static void mtk_jpeg_dec_set_du_membership(void __iomem *base, u32 member,
u32 gmc, u32 isgray)
{
if (isgray)
member = 0x3FFFFFFC;
member |= (isgray << 31) | (gmc << 30);
writel(member, base + JPGDEC_REG_DU_CTRL);
}
static void mtk_jpeg_dec_set_q_table(void __iomem *base, u32 id0, u32 id1,
u32 id2)
{
u32 val;
val = ((id0 & 0x0f) << 8) | ((id1 & 0x0f) << 4) | ((id2 & 0x0f) << 0);
writel(val, base + JPGDEC_REG_QT_ID);
}
static void mtk_jpeg_dec_set_dma_group(void __iomem *base, u32 mcu_group,
u32 group_num, u32 last_mcu)
{
u32 val;
val = (((mcu_group - 1) & 0x00FF) << 16) |
(((group_num - 1) & 0x007F) << 8) |
((last_mcu - 1) & 0x00FF);
writel(val, base + JPGDEC_REG_WDMA_CTRL);
}
static void mtk_jpeg_dec_set_sampling_factor(void __iomem *base, u32 comp_num,
u32 y_w, u32 y_h, u32 u_w,
u32 u_h, u32 v_w, u32 v_h)
{
u32 val;
u32 y_wh = (MTK_JPEG_DUNUM_MASK(y_w) << 2) | MTK_JPEG_DUNUM_MASK(y_h);
u32 u_wh = (MTK_JPEG_DUNUM_MASK(u_w) << 2) | MTK_JPEG_DUNUM_MASK(u_h);
u32 v_wh = (MTK_JPEG_DUNUM_MASK(v_w) << 2) | MTK_JPEG_DUNUM_MASK(v_h);
if (comp_num == 1)
val = 0;
else
val = (y_wh << 8) | (u_wh << 4) | v_wh;
writel(val, base + JPGDEC_REG_DU_NUM);
}
void mtk_jpeg_dec_set_config(void __iomem *base,
struct mtk_jpeg_dec_param *config,
struct mtk_jpeg_bs *bs,
struct mtk_jpeg_fb *fb)
{
mtk_jpeg_dec_set_brz_factor(base, 0, 0, config->uv_brz_w, 0);
mtk_jpeg_dec_set_dec_mode(base, 0);
mtk_jpeg_dec_set_comp0_du(base, config->unit_num);
mtk_jpeg_dec_set_total_mcu(base, config->total_mcu);
mtk_jpeg_dec_set_bs_info(base, bs->str_addr, bs->size);
mtk_jpeg_dec_set_bs_write_ptr(base, bs->end_addr);
mtk_jpeg_dec_set_du_membership(base, config->membership, 1,
(config->comp_num == 1) ? 1 : 0);
mtk_jpeg_dec_set_comp_id(base, config->comp_id[0], config->comp_id[1],
config->comp_id[2]);
mtk_jpeg_dec_set_q_table(base, config->qtbl_num[0],
config->qtbl_num[1], config->qtbl_num[2]);
mtk_jpeg_dec_set_sampling_factor(base, config->comp_num,
config->sampling_w[0],
config->sampling_h[0],
config->sampling_w[1],
config->sampling_h[1],
config->sampling_w[2],
config->sampling_h[2]);
mtk_jpeg_dec_set_mem_stride(base, config->mem_stride[0],
config->mem_stride[1]);
mtk_jpeg_dec_set_img_stride(base, config->img_stride[0],
config->img_stride[1]);
mtk_jpeg_dec_set_dst_bank0(base, fb->plane_addr[0],
fb->plane_addr[1], fb->plane_addr[2]);
mtk_jpeg_dec_set_dst_bank1(base, 0, 0, 0);
mtk_jpeg_dec_set_dma_group(base, config->dma_mcu, config->dma_group,
config->dma_last_mcu);
mtk_jpeg_dec_set_pause_mcu_idx(base, config->total_mcu);
}

View File

@ -0,0 +1,91 @@
/*
* Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _MTK_JPEG_HW_H
#define _MTK_JPEG_HW_H
#include <media/videobuf2-core.h>
#include "mtk_jpeg_core.h"
#include "mtk_jpeg_reg.h"
enum {
MTK_JPEG_DEC_RESULT_EOF_DONE = 0,
MTK_JPEG_DEC_RESULT_PAUSE = 1,
MTK_JPEG_DEC_RESULT_UNDERFLOW = 2,
MTK_JPEG_DEC_RESULT_OVERFLOW = 3,
MTK_JPEG_DEC_RESULT_ERROR_BS = 4,
MTK_JPEG_DEC_RESULT_ERROR_UNKNOWN = 6
};
struct mtk_jpeg_dec_param {
u32 pic_w;
u32 pic_h;
u32 dec_w;
u32 dec_h;
u32 src_color;
u32 dst_fourcc;
u32 mcu_w;
u32 mcu_h;
u32 total_mcu;
u32 unit_num;
u32 comp_num;
u32 comp_id[MTK_JPEG_COMP_MAX];
u32 sampling_w[MTK_JPEG_COMP_MAX];
u32 sampling_h[MTK_JPEG_COMP_MAX];
u32 qtbl_num[MTK_JPEG_COMP_MAX];
u32 blk_num;
u32 blk_comp[MTK_JPEG_COMP_MAX];
u32 membership;
u32 dma_mcu;
u32 dma_group;
u32 dma_last_mcu;
u32 img_stride[MTK_JPEG_COMP_MAX];
u32 mem_stride[MTK_JPEG_COMP_MAX];
u32 comp_w[MTK_JPEG_COMP_MAX];
u32 comp_size[MTK_JPEG_COMP_MAX];
u32 y_size;
u32 uv_size;
u32 dec_size;
u8 uv_brz_w;
};
static inline u32 mtk_jpeg_align(u32 val, u32 align)
{
return (val + align - 1) & ~(align - 1);
}
struct mtk_jpeg_bs {
dma_addr_t str_addr;
dma_addr_t end_addr;
size_t size;
};
struct mtk_jpeg_fb {
dma_addr_t plane_addr[MTK_JPEG_COMP_MAX];
size_t size;
};
int mtk_jpeg_dec_fill_param(struct mtk_jpeg_dec_param *param);
u32 mtk_jpeg_dec_get_int_status(void __iomem *dec_reg_base);
u32 mtk_jpeg_dec_enum_result(u32 irq_result);
void mtk_jpeg_dec_set_config(void __iomem *base,
struct mtk_jpeg_dec_param *config,
struct mtk_jpeg_bs *bs,
struct mtk_jpeg_fb *fb);
void mtk_jpeg_dec_reset(void __iomem *dec_reg_base);
void mtk_jpeg_dec_start(void __iomem *dec_reg_base);
#endif /* _MTK_JPEG_HW_H */

View File

@ -0,0 +1,160 @@
/*
* Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/kernel.h>
#include <linux/videodev2.h>
#include "mtk_jpeg_parse.h"
#define TEM 0x01
#define SOF0 0xc0
#define RST 0xd0
#define SOI 0xd8
#define EOI 0xd9
struct mtk_jpeg_stream {
u8 *addr;
u32 size;
u32 curr;
};
static int read_byte(struct mtk_jpeg_stream *stream)
{
if (stream->curr >= stream->size)
return -1;
return stream->addr[stream->curr++];
}
static int read_word_be(struct mtk_jpeg_stream *stream, u32 *word)
{
u32 temp;
int byte;
byte = read_byte(stream);
if (byte == -1)
return -1;
temp = byte << 8;
byte = read_byte(stream);
if (byte == -1)
return -1;
*word = (u32)byte | temp;
return 0;
}
static void read_skip(struct mtk_jpeg_stream *stream, long len)
{
if (len <= 0)
return;
while (len--)
read_byte(stream);
}
static bool mtk_jpeg_do_parse(struct mtk_jpeg_dec_param *param, u8 *src_addr_va,
u32 src_size)
{
bool notfound = true;
struct mtk_jpeg_stream stream;
stream.addr = src_addr_va;
stream.size = src_size;
stream.curr = 0;
while (notfound) {
int i, length, byte;
u32 word;
byte = read_byte(&stream);
if (byte == -1)
return false;
if (byte != 0xff)
continue;
do
byte = read_byte(&stream);
while (byte == 0xff);
if (byte == -1)
return false;
if (byte == 0)
continue;
length = 0;
switch (byte) {
case SOF0:
/* length */
if (read_word_be(&stream, &word))
break;
/* precision */
if (read_byte(&stream) == -1)
break;
if (read_word_be(&stream, &word))
break;
param->pic_h = word;
if (read_word_be(&stream, &word))
break;
param->pic_w = word;
param->comp_num = read_byte(&stream);
if (param->comp_num != 1 && param->comp_num != 3)
break;
for (i = 0; i < param->comp_num; i++) {
param->comp_id[i] = read_byte(&stream);
if (param->comp_id[i] == -1)
break;
/* sampling */
byte = read_byte(&stream);
if (byte == -1)
break;
param->sampling_w[i] = (byte >> 4) & 0x0F;
param->sampling_h[i] = byte & 0x0F;
param->qtbl_num[i] = read_byte(&stream);
if (param->qtbl_num[i] == -1)
break;
}
notfound = !(i == param->comp_num);
break;
case RST ... RST + 7:
case SOI:
case EOI:
case TEM:
break;
default:
if (read_word_be(&stream, &word))
break;
length = (long)word - 2;
read_skip(&stream, length);
break;
}
}
return !notfound;
}
bool mtk_jpeg_parse(struct mtk_jpeg_dec_param *param, u8 *src_addr_va,
u32 src_size)
{
if (!mtk_jpeg_do_parse(param, src_addr_va, src_size))
return false;
if (mtk_jpeg_dec_fill_param(param))
return false;
return true;
}

View File

@ -0,0 +1,25 @@
/*
* Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _MTK_JPEG_PARSE_H
#define _MTK_JPEG_PARSE_H
#include "mtk_jpeg_hw.h"
bool mtk_jpeg_parse(struct mtk_jpeg_dec_param *param, u8 *src_addr_va,
u32 src_size);
#endif /* _MTK_JPEG_PARSE_H */

View File

@ -0,0 +1,58 @@
/*
* Copyright (c) 2016 MediaTek Inc.
* Author: Ming Hsiu Tsai <minghsiu.tsai@mediatek.com>
* Rick Chang <rick.chang@mediatek.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef _MTK_JPEG_REG_H
#define _MTK_JPEG_REG_H
#define MTK_JPEG_COMP_MAX 3
#define MTK_JPEG_BLOCK_MAX 10
#define MTK_JPEG_DCTSIZE 8
#define BIT_INQST_MASK_ERROR_BS 0x20
#define BIT_INQST_MASK_PAUSE 0x10
#define BIT_INQST_MASK_OVERFLOW 0x04
#define BIT_INQST_MASK_UNDERFLOW 0x02
#define BIT_INQST_MASK_EOF 0x01
#define BIT_INQST_MASK_ALLIRQ 0x37
#define JPGDEC_REG_RESET 0x0090
#define JPGDEC_REG_BRZ_FACTOR 0x00F8
#define JPGDEC_REG_DU_NUM 0x00FC
#define JPGDEC_REG_DEST_ADDR0_Y 0x0140
#define JPGDEC_REG_DEST_ADDR0_U 0x0144
#define JPGDEC_REG_DEST_ADDR0_V 0x0148
#define JPGDEC_REG_DEST_ADDR1_Y 0x014C
#define JPGDEC_REG_DEST_ADDR1_U 0x0150
#define JPGDEC_REG_DEST_ADDR1_V 0x0154
#define JPGDEC_REG_STRIDE_Y 0x0158
#define JPGDEC_REG_STRIDE_UV 0x015C
#define JPGDEC_REG_IMG_STRIDE_Y 0x0160
#define JPGDEC_REG_IMG_STRIDE_UV 0x0164
#define JPGDEC_REG_WDMA_CTRL 0x016C
#define JPGDEC_REG_PAUSE_MCU_NUM 0x0170
#define JPGDEC_REG_OPERATION_MODE 0x017C
#define JPGDEC_REG_FILE_ADDR 0x0200
#define JPGDEC_REG_COMP_ID 0x020C
#define JPGDEC_REG_TOTAL_MCU_NUM 0x0210
#define JPGDEC_REG_COMP0_DATA_UNIT_NUM 0x0224
#define JPGDEC_REG_DU_CTRL 0x023C
#define JPGDEC_REG_TRIG 0x0240
#define JPGDEC_REG_FILE_BRP 0x0248
#define JPGDEC_REG_FILE_TOTAL_SIZE 0x024C
#define JPGDEC_REG_QT_ID 0x0270
#define JPGDEC_REG_INTERRUPT_STATUS 0x0274
#define JPGDEC_REG_STATUS 0x0278
#endif /* _MTK_JPEG_REG_H */