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Merge branch 'imx/fixes-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6 into fixes 

* 'imx/fixes-for-3.6' of git://git.linaro.org/people/shawnguo/linux-2.6:
  ARM: dts: imx: fix gpio interrupts property
  ARM: dts: imx53-ard: add regulators for lan9220
  ARM: imx: enable emi_slow_gate clock for imx5
  ARM: imx6q-sabrelite: Setup CLKO IOMUX

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2012-08-06 19:52:26 +02:00
parent e4651a9ff4 65dee07c99
commit b29ee91c62
4 changed files with 24 additions and 2 deletions
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2
arch/arm/boot/dts/imx51-babbage.dts
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@ -53,7 +53,7 @@
spi-max-frequency = <6000000>;
reg = <0>;
interrupt-parent = <&gpio1>;
interrupts = <8>;
interrupts = <8 0x4>;
regulators {
sw1_reg: sw1 {

22
arch/arm/boot/dts/imx53-ard.dts
View File

@ -64,12 +64,32 @@
reg = <0xf4000000 0x2000000>;
phy-mode = "mii";
interrupt-parent = <&gpio2>;
interrupts = <31>;
interrupts = <31 0x8>;
reg-io-width = <4>;
/*
* VDD33A and VDDVARIO of LAN9220 are supplied by
* SW4_3V3 of LTC3589. Before the regulator driver
* for this PMIC is available, we use a fixed dummy
* 3V3 regulator to get LAN9220 driver probing work.
*/
vdd33a-supply = <&reg_3p3v>;
vddvario-supply = <&reg_3p3v>;
smsc,irq-push-pull;
};
};
regulators {
compatible = "simple-bus";
reg_3p3v: 3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
gpio-keys {
compatible = "gpio-keys";

1
arch/arm/boot/dts/imx6q-sabrelite.dts
View File

@ -53,6 +53,7 @@
fsl,pins = <
144 0x80000000 /* MX6Q_PAD_EIM_D22__GPIO_3_22 */
121 0x80000000 /* MX6Q_PAD_EIM_D19__GPIO_3_19 */
953 0x80000000 /* MX6Q_PAD_GPIO_0__CCM_CLKO */
>;
};
};

1
arch/arm/mach-imx/clk-imx51-imx53.c
View File

@ -303,6 +303,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
clk_prepare_enable(clk[aips_tz2]); /* fec */
clk_prepare_enable(clk[spba]);
clk_prepare_enable(clk[emi_fast_gate]); /* fec */
clk_prepare_enable(clk[emi_slow_gate]); /* eim */
clk_prepare_enable(clk[tmax1]);
clk_prepare_enable(clk[tmax2]); /* esdhc2, fec */
clk_prepare_enable(clk[tmax3]); /* esdhc1, esdhc4 */