IB/hns: Change the logic for allocating uar registers
This patch mainly modifies the logic for allocating uar registers. In HiP06 SoC, HW has 8 group of uar registers for kernel and user space application. The uar index is assigned as follows: 0 ------ for kernel 1~7 ------ for user space application Signed-off-by: Lijun Ou <oulijun@huawei.com> Reviewed-by: Wei Hu <xavier.huwei@huawei.com> Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -117,7 +117,9 @@ int hns_roce_uar_alloc(struct hns_roce_dev *hr_dev, struct hns_roce_uar *uar)
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if (ret == -1)
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if (ret == -1)
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return -ENOMEM;
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return -ENOMEM;
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uar->index = (uar->index - 1) % hr_dev->caps.phy_num_uars + 1;
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if (uar->index > 0)
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uar->index = (uar->index - 1) %
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(hr_dev->caps.phy_num_uars - 1) + 1;
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res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
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res = platform_get_resource(hr_dev->pdev, IORESOURCE_MEM, 0);
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uar->pfn = ((res->start) >> PAGE_SHIFT) + uar->index;
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uar->pfn = ((res->start) >> PAGE_SHIFT) + uar->index;
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