drm/i915/gvt: Update PDPs after a vGPU mm object is pinned.
The PDPs of a shadow page will only be valid after a vGPU mm is pinned. So the PDPs in the shadow context should be updated then. Signed-off-by: Zhi Wang <zhi.a.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@ -52,6 +52,29 @@ static void set_context_pdp_root_pointer(
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pdp_pair[i].val = pdp[7 - i];
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}
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static void update_shadow_pdps(struct intel_vgpu_workload *workload)
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{
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struct intel_vgpu *vgpu = workload->vgpu;
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int ring_id = workload->ring_id;
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struct i915_gem_context *shadow_ctx = vgpu->submission.shadow_ctx;
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struct drm_i915_gem_object *ctx_obj =
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shadow_ctx->engine[ring_id].state->obj;
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struct execlist_ring_context *shadow_ring_context;
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struct page *page;
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if (WARN_ON(!workload->shadow_mm))
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return;
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if (WARN_ON(!atomic_read(&workload->shadow_mm->pincount)))
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return;
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page = i915_gem_object_get_page(ctx_obj, LRC_STATE_PN);
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shadow_ring_context = kmap(page);
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set_context_pdp_root_pointer(shadow_ring_context,
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(void *)workload->shadow_mm->ppgtt_mm.shadow_pdps);
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kunmap(page);
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}
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static int populate_shadow_context(struct intel_vgpu_workload *workload)
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{
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struct intel_vgpu *vgpu = workload->vgpu;
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@ -112,9 +135,6 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload)
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}
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#undef COPY_REG
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set_context_pdp_root_pointer(shadow_ring_context,
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(void *)workload->shadow_mm->ppgtt_mm.shadow_pdps);
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intel_gvt_hypervisor_read_gpa(vgpu,
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workload->ring_context_gpa +
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sizeof(*shadow_ring_context),
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@ -509,6 +529,8 @@ static int prepare_workload(struct intel_vgpu_workload *workload)
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return ret;
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}
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update_shadow_pdps(workload);
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ret = intel_vgpu_sync_oos_pages(workload->vgpu);
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if (ret) {
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gvt_vgpu_err("fail to vgpu sync oos pages\n");
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