RDMA/hns: Cleanups of magic numbers
Some magic numbers are hard to understand, so replace them with macros or add some comments for them. Link: https://lore.kernel.org/r/20200126145504.9700-1-liweihang@huawei.com Signed-off-by: Lang Cheng <chenglang@huawei.com> Signed-off-by: Yixian Liu <liuyixian@huawei.com> Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com> Signed-off-by: Yixing Liu <liuyixing1@huawei.com> Signed-off-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -881,7 +881,7 @@ struct hns_roce_caps {
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u32 cqc_timer_ba_pg_sz;
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u32 cqc_timer_buf_pg_sz;
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u32 cqc_timer_hop_num;
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u32 cqe_ba_pg_sz;
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u32 cqe_ba_pg_sz; /* page_size = 4K*(2^cqe_ba_pg_sz) */
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u32 cqe_buf_pg_sz;
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u32 cqe_hop_num;
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u32 srqwqe_ba_pg_sz;
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@ -1999,7 +1999,7 @@ static int hns_roce_v2_profile(struct hns_roce_dev *hr_dev)
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return ret;
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}
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if (hr_dev->pci_dev->revision == 0x21) {
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if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_B) {
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ret = hns_roce_query_pf_timer_resource(hr_dev);
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if (ret) {
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dev_err(hr_dev->dev,
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@ -2016,7 +2016,7 @@ static int hns_roce_v2_profile(struct hns_roce_dev *hr_dev)
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return ret;
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}
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if (hr_dev->pci_dev->revision == 0x21) {
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if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_B) {
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ret = hns_roce_set_vf_switch_param(hr_dev, 0);
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if (ret) {
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dev_err(hr_dev->dev,
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@ -2298,7 +2298,7 @@ static void hns_roce_v2_exit(struct hns_roce_dev *hr_dev)
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{
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struct hns_roce_v2_priv *priv = hr_dev->priv;
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if (hr_dev->pci_dev->revision == 0x21)
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if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_B)
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hns_roce_function_clear(hr_dev);
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hns_roce_free_link_table(hr_dev, &priv->tpq);
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@ -2757,7 +2757,7 @@ static void hns_roce_free_srq_wqe(struct hns_roce_srq *srq, int wqe_index)
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static void hns_roce_v2_cq_set_ci(struct hns_roce_cq *hr_cq, u32 cons_index)
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{
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*hr_cq->set_ci_db = cons_index & 0xffffff;
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*hr_cq->set_ci_db = cons_index & V2_CQ_DB_PARAMETER_CONS_IDX_M;
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}
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static void __hns_roce_v2_cq_clean(struct hns_roce_cq *hr_cq, u32 qpn,
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@ -4475,7 +4475,7 @@ static int hns_roce_v2_set_path(struct ib_qp *ibqp,
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roce_set_field(qpc_mask->byte_24_mtu_tc, V2_QPC_BYTE_24_HOP_LIMIT_M,
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V2_QPC_BYTE_24_HOP_LIMIT_S, 0);
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if (hr_dev->pci_dev->revision == 0x21 && is_udp)
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if (hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_B && is_udp)
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roce_set_field(context->byte_24_mtu_tc, V2_QPC_BYTE_24_TC_M,
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V2_QPC_BYTE_24_TC_S, grh->traffic_class >> 2);
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else
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@ -309,7 +309,7 @@ static int hns_roce_set_rq_size(struct hns_roce_dev *hr_dev,
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max_cnt = max(1U, cap->max_recv_sge);
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hr_qp->rq.max_gs = roundup_pow_of_two(max_cnt);
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if (hr_dev->caps.max_rq_sg <= 2)
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if (hr_dev->caps.max_rq_sg <= HNS_ROCE_SGE_IN_WQE)
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hr_qp->rq.wqe_shift =
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ilog2(hr_dev->caps.max_rq_desc_sz);
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else
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@ -370,16 +370,17 @@ static int hns_roce_set_user_sq_size(struct hns_roce_dev *hr_dev,
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hr_qp->sq.wqe_shift = ucmd->log_sq_stride;
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max_cnt = max(1U, cap->max_send_sge);
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if (hr_dev->caps.max_sq_sg <= 2)
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if (hr_dev->hw_rev == HNS_ROCE_HW_VER1)
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hr_qp->sq.max_gs = roundup_pow_of_two(max_cnt);
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else
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hr_qp->sq.max_gs = max_cnt;
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if (hr_qp->sq.max_gs > 2)
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if (hr_qp->sq.max_gs > HNS_ROCE_SGE_IN_WQE)
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hr_qp->sge.sge_cnt = roundup_pow_of_two(hr_qp->sq.wqe_cnt *
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(hr_qp->sq.max_gs - 2));
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if ((hr_qp->sq.max_gs > 2) && (hr_dev->pci_dev->revision == 0x20)) {
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if (hr_qp->sq.max_gs > HNS_ROCE_SGE_IN_WQE &&
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hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_A) {
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if (hr_qp->sge.sge_cnt > hr_dev->caps.max_extend_sg) {
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dev_err(hr_dev->dev,
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"The extended sge cnt error! sge_cnt=%d\n",
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@ -392,7 +393,7 @@ static int hns_roce_set_user_sq_size(struct hns_roce_dev *hr_dev,
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ex_sge_num = hr_qp->sge.sge_cnt;
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/* Get buf size, SQ and RQ are aligned to page_szie */
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if (hr_dev->caps.max_sq_sg <= 2) {
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if (hr_dev->hw_rev == HNS_ROCE_HW_VER1) {
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hr_qp->buff_size = round_up((hr_qp->rq.wqe_cnt <<
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hr_qp->rq.wqe_shift), PAGE_SIZE) +
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round_up((hr_qp->sq.wqe_cnt <<
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@ -528,13 +529,15 @@ static int set_extend_sge_param(struct hns_roce_dev *hr_dev,
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}
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/* ud sqwqe's sge use extend sge */
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if (hr_dev->caps.max_sq_sg > 2 && hr_qp->ibqp.qp_type == IB_QPT_GSI) {
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if (hr_dev->hw_rev != HNS_ROCE_HW_VER1 &&
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hr_qp->ibqp.qp_type == IB_QPT_GSI) {
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hr_qp->sge.sge_cnt = roundup_pow_of_two(hr_qp->sq.wqe_cnt *
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hr_qp->sq.max_gs);
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hr_qp->sge.sge_shift = 4;
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}
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if ((hr_qp->sq.max_gs > 2) && hr_dev->pci_dev->revision == 0x20) {
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if (hr_qp->sq.max_gs > 2 &&
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hr_dev->pci_dev->revision == PCI_REVISION_ID_HIP08_A) {
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if (hr_qp->sge.sge_cnt > hr_dev->caps.max_extend_sg) {
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dev_err(dev, "The extended sge cnt error! sge_cnt=%d\n",
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hr_qp->sge.sge_cnt);
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@ -577,7 +580,7 @@ static int hns_roce_set_kernel_sq_size(struct hns_roce_dev *hr_dev,
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/* Get data_seg numbers */
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max_cnt = max(1U, cap->max_send_sge);
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if (hr_dev->caps.max_sq_sg <= 2)
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if (hr_dev->hw_rev == HNS_ROCE_HW_VER1)
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hr_qp->sq.max_gs = roundup_pow_of_two(max_cnt);
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else
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hr_qp->sq.max_gs = max_cnt;
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@ -593,7 +596,7 @@ static int hns_roce_set_kernel_sq_size(struct hns_roce_dev *hr_dev,
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hr_qp->sq.offset = 0;
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size = round_up(hr_qp->sq.wqe_cnt << hr_qp->sq.wqe_shift, page_size);
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if (hr_dev->caps.max_sq_sg > 2 && hr_qp->sge.sge_cnt) {
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if (hr_dev->hw_rev != HNS_ROCE_HW_VER1 && hr_qp->sge.sge_cnt) {
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hr_qp->sge.sge_cnt = max(page_size/(1 << hr_qp->sge.sge_shift),
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(u32)hr_qp->sge.sge_cnt);
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hr_qp->sge.offset = size;
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@ -1078,7 +1081,7 @@ struct ib_qp *hns_roce_create_qp(struct ib_pd *pd,
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hr_qp->phy_port = hr_dev->iboe.phy_port[hr_qp->port];
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/* when hw version is v1, the sqpn is allocated */
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if (hr_dev->caps.max_sq_sg <= 2)
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if (hr_dev->hw_rev == HNS_ROCE_HW_VER1)
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hr_qp->ibqp.qp_num = HNS_ROCE_MAX_PORTS +
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hr_dev->iboe.phy_port[hr_qp->port];
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else
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@ -381,7 +381,8 @@ int hns_roce_create_srq(struct ib_srq *ib_srq,
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srq->wqe_cnt = roundup_pow_of_two(init_attr->attr.max_wr + 1);
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srq->max_gs = init_attr->attr.max_sge;
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srq_desc_size = roundup_pow_of_two(max(16, 16 * srq->max_gs));
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srq_desc_size = roundup_pow_of_two(max(HNS_ROCE_SGE_SIZE,
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HNS_ROCE_SGE_SIZE * srq->max_gs));
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srq->wqe_shift = ilog2(srq_desc_size);
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