media: s5p-mfc: Adding initial support for MFC v10.10
Adding the support for MFC v10.10, with new register file and necessary hw control, decoder, encoder and structural changes. Signed-off-by: Smitha T Murthy <smitha.t@samsung.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Acked-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@s-opensource.com>
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@ -13,6 +13,7 @@ Required properties:
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(c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
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(d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
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(e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
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(f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
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- reg : Physical base address of the IP registers and length of memory
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mapped region.
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@ -0,0 +1,35 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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*
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* Copyright (c) 2017 Samsung Electronics Co., Ltd.
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* http://www.samsung.com/
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*
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* Register definition file for Samsung MFC V10.x Interface (FIMV) driver
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*
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*/
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#ifndef _REGS_MFC_V10_H
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#define _REGS_MFC_V10_H
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#include <linux/sizes.h>
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#include "regs-mfc-v8.h"
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/* MFCv10 register definitions*/
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#define S5P_FIMV_MFC_CLOCK_OFF_V10 0x7120
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#define S5P_FIMV_MFC_STATE_V10 0x7124
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/* MFCv10 Context buffer sizes */
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#define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
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#define MFC_H264_DEC_CTX_BUF_SIZE_V10 (2 * SZ_1M)
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#define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
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#define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
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#define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
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/* MFCv10 variant defines */
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#define MAX_FW_SIZE_V10 (SZ_1M)
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#define MAX_CPB_SIZE_V10 (3 * SZ_1M)
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#define MFC_VERSION_V10 0xA0
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#define MFC_NUM_PORTS_V10 1
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#endif /*_REGS_MFC_V10_H*/
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@ -1607,6 +1607,28 @@ static struct s5p_mfc_variant mfc_drvdata_v8_5433 = {
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.num_clocks = 3,
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};
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static struct s5p_mfc_buf_size_v6 mfc_buf_size_v10 = {
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.dev_ctx = MFC_CTX_BUF_SIZE_V10,
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.h264_dec_ctx = MFC_H264_DEC_CTX_BUF_SIZE_V10,
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.other_dec_ctx = MFC_OTHER_DEC_CTX_BUF_SIZE_V10,
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.h264_enc_ctx = MFC_H264_ENC_CTX_BUF_SIZE_V10,
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.other_enc_ctx = MFC_OTHER_ENC_CTX_BUF_SIZE_V10,
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};
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static struct s5p_mfc_buf_size buf_size_v10 = {
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.fw = MAX_FW_SIZE_V10,
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.cpb = MAX_CPB_SIZE_V10,
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.priv = &mfc_buf_size_v10,
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};
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static struct s5p_mfc_variant mfc_drvdata_v10 = {
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.version = MFC_VERSION_V10,
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.version_bit = MFC_V10_BIT,
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.port_num = MFC_NUM_PORTS_V10,
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.buf_size = &buf_size_v10,
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.fw_name[0] = "s5p-mfc-v10.fw",
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};
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static const struct of_device_id exynos_mfc_match[] = {
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{
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.compatible = "samsung,mfc-v5",
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@ -1623,6 +1645,9 @@ static const struct of_device_id exynos_mfc_match[] = {
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}, {
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.compatible = "samsung,exynos5433-mfc",
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.data = &mfc_drvdata_v8_5433,
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}, {
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.compatible = "samsung,mfc-v10",
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.data = &mfc_drvdata_v10,
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},
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{},
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};
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@ -23,7 +23,7 @@
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#include <media/v4l2-ioctl.h>
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#include <media/videobuf2-v4l2.h>
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#include "regs-mfc.h"
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#include "regs-mfc-v8.h"
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#include "regs-mfc-v10.h"
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#define S5P_MFC_NAME "s5p-mfc"
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@ -715,11 +715,18 @@ void s5p_mfc_cleanup_queue(struct list_head *lh, struct vb2_queue *vq);
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#define IS_MFCV6_PLUS(dev) (dev->variant->version >= 0x60 ? 1 : 0)
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#define IS_MFCV7_PLUS(dev) (dev->variant->version >= 0x70 ? 1 : 0)
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#define IS_MFCV8_PLUS(dev) (dev->variant->version >= 0x80 ? 1 : 0)
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#define IS_MFCV10(dev) (dev->variant->version >= 0xA0 ? 1 : 0)
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#define MFC_V5_BIT BIT(0)
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#define MFC_V6_BIT BIT(1)
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#define MFC_V7_BIT BIT(2)
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#define MFC_V8_BIT BIT(3)
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#define MFC_V10_BIT BIT(5)
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#define MFC_V5PLUS_BITS (MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT | \
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MFC_V8_BIT | MFC_V10_BIT)
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#define MFC_V6PLUS_BITS (MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT | \
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MFC_V10_BIT)
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#define MFC_V7PLUS_BITS (MFC_V7_BIT | MFC_V8_BIT | MFC_V10_BIT)
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#endif /* S5P_MFC_COMMON_H_ */
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@ -239,6 +239,10 @@ int s5p_mfc_init_hw(struct s5p_mfc_dev *dev)
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}
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else
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mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET);
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if (IS_MFCV10(dev))
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mfc_write(dev, 0x0, S5P_FIMV_MFC_CLOCK_OFF_V10);
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mfc_debug(2, "Will now wait for completion of firmware transfer\n");
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if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) {
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mfc_err("Failed to load firmware\n");
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@ -54,7 +54,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 2,
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.versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.name = "4:2:0 2 Planes Y/CrCb",
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 2,
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.versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.name = "H264 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_H264_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "H264/MVC Encoded Stream",
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@ -79,7 +78,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_H264_MVC_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.name = "H263 Encoded Stream",
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@ -87,8 +86,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_H263_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "MPEG1 Encoded Stream",
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@ -96,8 +94,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "MPEG2 Encoded Stream",
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@ -105,8 +102,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_MPEG2_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "MPEG4 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "XviD Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_MPEG4_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "VC1 Encoded Stream",
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@ -132,8 +126,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_VC1_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "VC1 RCV Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_VC1RCV_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "VP8 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_VP8_DEC,
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.type = MFC_FMT_DEC,
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.num_planes = 1,
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.versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
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.versions = MFC_V6PLUS_BITS,
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},
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};
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@ -57,8 +57,7 @@ static struct s5p_mfc_fmt formats[] = {
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 2,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "4:2:0 2 Planes Y/CrCb",
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.codec_mode = S5P_MFC_CODEC_NONE,
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.type = MFC_FMT_RAW,
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.num_planes = 2,
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.versions = MFC_V6_BIT | MFC_V7_BIT | MFC_V8_BIT,
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.versions = MFC_V6PLUS_BITS,
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},
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{
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.name = "H264 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_H264_ENC,
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.type = MFC_FMT_ENC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "MPEG4 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_MPEG4_ENC,
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.type = MFC_FMT_ENC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "H263 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_H263_ENC,
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.type = MFC_FMT_ENC,
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.num_planes = 1,
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.versions = MFC_V5_BIT | MFC_V6_BIT | MFC_V7_BIT |
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MFC_V8_BIT,
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.versions = MFC_V5PLUS_BITS,
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},
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{
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.name = "VP8 Encoded Stream",
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.codec_mode = S5P_MFC_CODEC_VP8_ENC,
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.type = MFC_FMT_ENC,
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.num_planes = 1,
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.versions = MFC_V7_BIT | MFC_V8_BIT,
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.versions = MFC_V7PLUS_BITS,
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},
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};
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@ -356,6 +356,7 @@ static int calc_plane(int width, int height)
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static void s5p_mfc_dec_calc_dpb_size_v6(struct s5p_mfc_ctx *ctx)
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{
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struct s5p_mfc_dev *dev = ctx->dev;
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ctx->buf_width = ALIGN(ctx->img_width, S5P_FIMV_NV12MT_HALIGN_V6);
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ctx->buf_height = ALIGN(ctx->img_height, S5P_FIMV_NV12MT_VALIGN_V6);
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mfc_debug(2, "SEQ Done: Movie dimensions %dx%d,\n"
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if (ctx->codec_mode == S5P_MFC_CODEC_H264_DEC ||
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ctx->codec_mode == S5P_MFC_CODEC_H264_MVC_DEC) {
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ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
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ctx->img_height);
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if (IS_MFCV10(dev))
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ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V10(ctx->img_width,
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ctx->img_height);
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else
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ctx->mv_size = S5P_MFC_DEC_MV_SIZE_V6(ctx->img_width,
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ctx->img_height);
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ctx->mv_size = ALIGN(ctx->mv_size, 16);
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} else {
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ctx->mv_size = 0;
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@ -24,6 +24,8 @@
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#define MB_HEIGHT(y_size) DIV_ROUND_UP(y_size, 16)
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#define S5P_MFC_DEC_MV_SIZE_V6(x, y) (MB_WIDTH(x) * \
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(((MB_HEIGHT(y)+1)/2)*2) * 64 + 128)
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#define S5P_MFC_DEC_MV_SIZE_V10(x, y) (MB_WIDTH(x) * \
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(((MB_HEIGHT(y)+1)/2)*2) * 64 + 512)
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/* Definition */
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#define ENC_MULTI_SLICE_MB_MAX ((1 << 30) - 1)
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