drm/imx: format modifier support
- Add tiled prefetch support to PRE - Add format modifier support to PRG and imx-drm-core - Use runtime PM to control PRG clock - Allow building ipu-v3 under COMPILE_TEST -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEBsBxhV1FaKwXuCOBUMKIHHCeYOsFAlpLNtcXHHAuemFiZWxA cGVuZ3V0cm9uaXguZGUACgkQUMKIHHCeYOsBhQ/+PcWTQv8HaPI1O8qaeQ0g16C4 XCBcpySso6uv1GbVN7PCEgkT03rBlDP6uoqOZicWlHJMlSoAL2GmxAgfsVK4kBGI 6s/MegnWREWJVaII0pI6Gk4eFyVxEmiju5kv2XTCuV7hWIfNys70o6JDDSOL5DzI dPhb2h43izlqW0VwjGrePCf0drWgxPfpdt6ny89C0TnT7N96ObRf8v9Uoueeo5pS 8C8RFBWmERROTjti6EU/jubg3ttKkXs5TenUMnM44VzUQ9kA7P6MfX5vkbLx93Hq 0U3gfglfmyZ2Vr3cOcZbu2fivYCc/++Z3vxTOfcOsyN+nzZAtDSUlZT6Wer/8+Tf 2EWeNGYnTRZRh/4QYnoEzr2Ifh0PNJ4P8c9m7NmfPpiUNL3trer7sekzHlxaUgUu KipFNDxnkSEddha2DxkQ/1kzr0q3DnoMF/y16nytXILO/EeLa7nmUbei7nZU2xcn Yhho513sEqCi7WCx3nLeO9DIVh1jOjld5uCUGwlZ2KzwKf0VnC8VURv8ZR28bzk2 r8N9TINPgt7WF8V1zzrh5IN3PIszzeQeT7npGSOX8kUTzT5UN9VX8ctRFXxDCdyF X9CD9vT5mqGe80e2X5NZ1KyGruT8tCpGrxPhz7SKUxh/IWRsLskU6+fEqu11l2/H WYlwv4KlTteIN/5cM5w= =dt6o -----END PGP SIGNATURE----- Merge tag 'imx-drm-next-2018-01-02' of git://git.pengutronix.de/git/pza/linux into drm-next drm/imx: format modifier support - Add tiled prefetch support to PRE - Add format modifier support to PRG and imx-drm-core - Use runtime PM to control PRG clock - Allow building ipu-v3 under COMPILE_TEST * tag 'imx-drm-next-2018-01-02' of git://git.pengutronix.de/git/pza/linux: gpu: ipu-v3: allow to build with COMPILE_TEST drm/imx: advertise supported plane format modifiers drm/imx: add FB modifier support gpu: ipu-v3: prg: add modifier support gpu: ipu-v3: pre: add tiled prefetch support gpu: ipu-v3: prg: switch to runtime PM
This commit is contained in:
Dave Airlie
commit
b0caa1333b
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@ -257,6 +257,7 @@ static int imx_drm_bind(struct device *dev)
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drm->mode_config.max_height = 4096;
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drm->mode_config.funcs = &imx_drm_mode_config_funcs;
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drm->mode_config.helper_private = &imx_drm_mode_config_helpers;
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drm->mode_config.allow_fb_modifiers = true;
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drm_mode_config_init(drm);
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@ -77,6 +77,18 @@ static const uint32_t ipu_plane_formats[] = {
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DRM_FORMAT_BGRX8888_A8,
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};
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static const uint64_t ipu_format_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID
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};
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static const uint64_t pre_format_modifiers[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_VIVANTE_TILED,
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DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
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DRM_FORMAT_MOD_INVALID
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};
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int ipu_plane_irq(struct ipu_plane *ipu_plane)
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{
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return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
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@ -303,6 +315,22 @@ void ipu_plane_destroy_state(struct drm_plane *plane,
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kfree(ipu_state);
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}
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static bool ipu_plane_format_mod_supported(struct drm_plane *plane,
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uint32_t format, uint64_t modifier)
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{
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struct ipu_soc *ipu = to_ipu_plane(plane)->ipu;
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/* linear is supported for all planes and formats */
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if (modifier == DRM_FORMAT_MOD_LINEAR)
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return true;
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/* without a PRG there are no supported modifiers */
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if (!ipu_prg_present(ipu))
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return false;
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return ipu_prg_format_supported(ipu, format, modifier);
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}
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static const struct drm_plane_funcs ipu_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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@ -310,6 +338,7 @@ static const struct drm_plane_funcs ipu_plane_funcs = {
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.reset = ipu_plane_state_reset,
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.atomic_duplicate_state = ipu_plane_duplicate_state,
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.atomic_destroy_state = ipu_plane_destroy_state,
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.format_mod_supported = ipu_plane_format_mod_supported,
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};
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static int ipu_plane_atomic_check(struct drm_plane *plane,
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@ -550,8 +579,8 @@ static void ipu_plane_atomic_update(struct drm_plane *plane,
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ipu_prg_channel_configure(ipu_plane->ipu_ch, axi_id,
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drm_rect_width(&state->src) >> 16,
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drm_rect_height(&state->src) >> 16,
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fb->pitches[0],
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fb->format->format, &eba);
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fb->pitches[0], fb->format->format,
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fb->modifier, &eba);
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}
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if (old_state->fb && !drm_atomic_crtc_needs_modeset(crtc_state)) {
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@ -700,18 +729,71 @@ static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
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int ipu_planes_assign_pre(struct drm_device *dev,
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struct drm_atomic_state *state)
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{
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struct drm_crtc_state *old_crtc_state, *crtc_state;
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struct drm_plane_state *plane_state;
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struct ipu_plane_state *ipu_state;
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struct ipu_plane *ipu_plane;
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struct drm_plane *plane;
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struct drm_crtc *crtc;
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int available_pres = ipu_prg_max_active_channels();
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int i;
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int ret, i;
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for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, crtc_state, i) {
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ret = drm_atomic_add_affected_planes(state, crtc);
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if (ret)
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return ret;
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}
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/*
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* We are going over the planes in 2 passes: first we assign PREs to
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* planes with a tiling modifier, which need the PREs to resolve into
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* linear. Any failure to assign a PRE there is fatal. In the second
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* pass we try to assign PREs to linear FBs, to improve memory access
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* patterns for them. Failure at this point is non-fatal, as we can
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* scan out linear FBs without a PRE.
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*/
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for_each_new_plane_in_state(state, plane, plane_state, i) {
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ipu_state = to_ipu_plane_state(plane_state);
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ipu_plane = to_ipu_plane(plane);
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if (!plane_state->fb) {
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ipu_state->use_pre = false;
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continue;
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}
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if (!(plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) ||
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plane_state->fb->modifier == DRM_FORMAT_MOD_LINEAR)
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continue;
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if (!ipu_prg_present(ipu_plane->ipu) || !available_pres)
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return -EINVAL;
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if (!ipu_prg_format_supported(ipu_plane->ipu,
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plane_state->fb->format->format,
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plane_state->fb->modifier))
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return -EINVAL;
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ipu_state->use_pre = true;
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available_pres--;
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}
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for_each_new_plane_in_state(state, plane, plane_state, i) {
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struct ipu_plane_state *ipu_state =
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to_ipu_plane_state(plane_state);
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struct ipu_plane *ipu_plane = to_ipu_plane(plane);
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ipu_state = to_ipu_plane_state(plane_state);
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ipu_plane = to_ipu_plane(plane);
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if (!plane_state->fb) {
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ipu_state->use_pre = false;
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continue;
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}
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if ((plane_state->fb->flags & DRM_MODE_FB_MODIFIERS) &&
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plane_state->fb->modifier != DRM_FORMAT_MOD_LINEAR)
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continue;
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/* make sure that modifier is initialized */
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plane_state->fb->modifier = DRM_FORMAT_MOD_LINEAR;
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if (ipu_prg_present(ipu_plane->ipu) && available_pres &&
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plane_state->fb &&
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ipu_prg_format_supported(ipu_plane->ipu,
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plane_state->fb->format->format,
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plane_state->fb->modifier)) {
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@ -731,6 +813,7 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
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enum drm_plane_type type)
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{
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struct ipu_plane *ipu_plane;
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const uint64_t *modifiers = ipu_format_modifiers;
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int ret;
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DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
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@ -746,10 +829,13 @@ struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
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ipu_plane->dma = dma;
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ipu_plane->dp_flow = dp;
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if (ipu_prg_present(ipu))
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modifiers = pre_format_modifiers;
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ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
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&ipu_plane_funcs, ipu_plane_formats,
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ARRAY_SIZE(ipu_plane_formats),
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NULL, type, NULL);
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modifiers, type, NULL);
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if (ret) {
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DRM_ERROR("failed to initialize plane\n");
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kfree(ipu_plane);
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@ -1,7 +1,9 @@
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config IMX_IPUV3_CORE
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tristate "IPUv3 core support"
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depends on SOC_IMX5 || SOC_IMX6Q || ARCH_MULTIPLATFORM
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depends on SOC_IMX5 || SOC_IMX6Q || ARCH_MULTIPLATFORM || COMPILE_TEST
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depends on DRM || !DRM # if DRM=m, this can't be 'y'
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select BITREVERSE
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select GENERIC_ALLOCATOR if DRM
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select GENERIC_IRQ_CHIP
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help
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Choose this if you have a i.MX5/6 system and want to use the Image
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@ -12,6 +12,7 @@
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#include <linux/types.h>
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#include <linux/bitrev.h>
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#include <linux/io.h>
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#include <linux/sizes.h>
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#include <drm/drm_fourcc.h>
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#include "ipu-prv.h"
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@ -17,6 +17,7 @@
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#include <linux/bitrev.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/sizes.h>
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#include "ipu-prv.h"
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/* IC Register Offsets */
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@ -49,6 +49,10 @@
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#define IPU_PRE_TPR_CTRL 0x070
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#define IPU_PRE_TPR_CTRL_TILE_FORMAT(v) ((v & 0xff) << 0)
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#define IPU_PRE_TPR_CTRL_TILE_FORMAT_MASK 0xff
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#define IPU_PRE_TPR_CTRL_TILE_FORMAT_16_BIT (1 << 0)
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#define IPU_PRE_TPR_CTRL_TILE_FORMAT_SPLIT_BUF (1 << 4)
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#define IPU_PRE_TPR_CTRL_TILE_FORMAT_SINGLE_BUF (1 << 5)
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#define IPU_PRE_TPR_CTRL_TILE_FORMAT_SUPER_TILED (1 << 6)
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#define IPU_PRE_PREFETCH_ENG_CTRL 0x080
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#define IPU_PRE_PREF_ENG_CTRL_PREFETCH_EN (1 << 0)
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@ -147,7 +151,7 @@ int ipu_pre_get(struct ipu_pre *pre)
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val = IPU_PRE_CTRL_HANDSHAKE_ABORT_SKIP_EN |
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IPU_PRE_CTRL_HANDSHAKE_EN |
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IPU_PRE_CTRL_TPR_REST_SEL |
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IPU_PRE_CTRL_BLOCK_16 | IPU_PRE_CTRL_SDW_UPDATE;
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IPU_PRE_CTRL_SDW_UPDATE;
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writel(val, pre->regs + IPU_PRE_CTRL);
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pre->in_use = true;
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@ -163,14 +167,17 @@ void ipu_pre_put(struct ipu_pre *pre)
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void ipu_pre_configure(struct ipu_pre *pre, unsigned int width,
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unsigned int height, unsigned int stride, u32 format,
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unsigned int bufaddr)
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uint64_t modifier, unsigned int bufaddr)
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{
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const struct drm_format_info *info = drm_format_info(format);
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u32 active_bpp = info->cpp[0] >> 1;
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u32 val;
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/* calculate safe window for ctrl register updates */
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pre->safe_window_end = height - 2;
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if (modifier == DRM_FORMAT_MOD_LINEAR)
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pre->safe_window_end = height - 2;
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else
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pre->safe_window_end = DIV_ROUND_UP(height, 4) - 1;
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writel(bufaddr, pre->regs + IPU_PRE_CUR_BUF);
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writel(bufaddr, pre->regs + IPU_PRE_NEXT_BUF);
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@ -203,9 +210,25 @@ void ipu_pre_configure(struct ipu_pre *pre, unsigned int width,
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writel(pre->buffer_paddr, pre->regs + IPU_PRE_STORE_ENG_ADDR);
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val = readl(pre->regs + IPU_PRE_TPR_CTRL);
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val &= ~IPU_PRE_TPR_CTRL_TILE_FORMAT_MASK;
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if (modifier != DRM_FORMAT_MOD_LINEAR) {
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/* only support single buffer formats for now */
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val |= IPU_PRE_TPR_CTRL_TILE_FORMAT_SINGLE_BUF;
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if (modifier == DRM_FORMAT_MOD_VIVANTE_SUPER_TILED)
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val |= IPU_PRE_TPR_CTRL_TILE_FORMAT_SUPER_TILED;
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if (info->cpp[0] == 2)
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val |= IPU_PRE_TPR_CTRL_TILE_FORMAT_16_BIT;
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}
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writel(val, pre->regs + IPU_PRE_TPR_CTRL);
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val = readl(pre->regs + IPU_PRE_CTRL);
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val |= IPU_PRE_CTRL_EN_REPEAT | IPU_PRE_CTRL_ENABLE |
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IPU_PRE_CTRL_SDW_UPDATE;
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if (modifier == DRM_FORMAT_MOD_LINEAR)
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val &= ~IPU_PRE_CTRL_BLOCK_EN;
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else
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val |= IPU_PRE_CTRL_BLOCK_EN;
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writel(val, pre->regs + IPU_PRE_CTRL);
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}
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@ -20,6 +20,7 @@
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <video/imx-ipu-v3.h>
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@ -132,28 +133,25 @@ bool ipu_prg_format_supported(struct ipu_soc *ipu, uint32_t format,
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if (info->num_planes != 1)
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return false;
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return true;
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switch (modifier) {
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case DRM_FORMAT_MOD_LINEAR:
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case DRM_FORMAT_MOD_VIVANTE_TILED:
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case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
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return true;
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default:
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return false;
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}
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}
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EXPORT_SYMBOL_GPL(ipu_prg_format_supported);
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int ipu_prg_enable(struct ipu_soc *ipu)
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{
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struct ipu_prg *prg = ipu->prg_priv;
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int ret;
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if (!prg)
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return 0;
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ret = clk_prepare_enable(prg->clk_axi);
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if (ret)
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goto fail_disable_ipg;
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return 0;
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fail_disable_ipg:
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clk_disable_unprepare(prg->clk_ipg);
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return ret;
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return pm_runtime_get_sync(prg->dev);
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}
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EXPORT_SYMBOL_GPL(ipu_prg_enable);
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@ -164,7 +162,7 @@ void ipu_prg_disable(struct ipu_soc *ipu)
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if (!prg)
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return;
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clk_disable_unprepare(prg->clk_axi);
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pm_runtime_put(prg->dev);
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}
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EXPORT_SYMBOL_GPL(ipu_prg_disable);
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@ -255,7 +253,7 @@ void ipu_prg_channel_disable(struct ipuv3_channel *ipu_chan)
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if (!chan->enabled || prg_chan < 0)
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return;
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clk_prepare_enable(prg->clk_ipg);
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pm_runtime_get_sync(prg->dev);
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val = readl(prg->regs + IPU_PRG_CTL);
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val |= IPU_PRG_CTL_BYPASS(prg_chan);
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@ -264,7 +262,7 @@ void ipu_prg_channel_disable(struct ipuv3_channel *ipu_chan)
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val = IPU_PRG_REG_UPDATE_REG_UPDATE;
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writel(val, prg->regs + IPU_PRG_REG_UPDATE);
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clk_disable_unprepare(prg->clk_ipg);
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pm_runtime_put(prg->dev);
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ipu_prg_put_pre(prg, prg_chan);
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@ -275,7 +273,7 @@ EXPORT_SYMBOL_GPL(ipu_prg_channel_disable);
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int ipu_prg_channel_configure(struct ipuv3_channel *ipu_chan,
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unsigned int axi_id, unsigned int width,
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unsigned int height, unsigned int stride,
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u32 format, unsigned long *eba)
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u32 format, uint64_t modifier, unsigned long *eba)
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{
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int prg_chan = ipu_prg_ipu_to_prg_chan(ipu_chan->num);
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struct ipu_prg *prg = ipu_chan->ipu->prg_priv;
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@ -296,14 +294,10 @@ int ipu_prg_channel_configure(struct ipuv3_channel *ipu_chan,
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return ret;
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|
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ipu_pre_configure(prg->pres[chan->used_pre],
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width, height, stride, format, *eba);
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width, height, stride, format, modifier, *eba);
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|
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ret = clk_prepare_enable(prg->clk_ipg);
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if (ret) {
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ipu_prg_put_pre(prg, prg_chan);
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return ret;
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}
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pm_runtime_get_sync(prg->dev);
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||||
|
||||
val = (stride - 1) & IPU_PRG_STRIDE_STRIDE_MASK;
|
||||
writel(val, prg->regs + IPU_PRG_STRIDE(prg_chan));
|
||||
|
|
@ -336,7 +330,7 @@ int ipu_prg_channel_configure(struct ipuv3_channel *ipu_chan,
|
|||
(val & IPU_PRG_STATUS_BUFFER1_READY(prg_chan)),
|
||||
5, 1000);
|
||||
|
||||
clk_disable_unprepare(prg->clk_ipg);
|
||||
pm_runtime_put(prg->dev);
|
||||
|
||||
chan->enabled = true;
|
||||
return 0;
|
||||
|
|
@ -384,6 +378,12 @@ static int ipu_prg_probe(struct platform_device *pdev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_prepare_enable(prg->clk_axi);
|
||||
if (ret) {
|
||||
clk_disable_unprepare(prg->clk_ipg);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* init to free running mode */
|
||||
val = readl(prg->regs + IPU_PRG_CTL);
|
||||
val |= IPU_PRG_CTL_SHADOW_EN;
|
||||
|
|
@ -392,7 +392,8 @@ static int ipu_prg_probe(struct platform_device *pdev)
|
|||
/* disable address threshold */
|
||||
writel(0xffffffff, prg->regs + IPU_PRG_THD);
|
||||
|
||||
clk_disable_unprepare(prg->clk_ipg);
|
||||
pm_runtime_set_active(dev);
|
||||
pm_runtime_enable(dev);
|
||||
|
||||
prg->dev = dev;
|
||||
platform_set_drvdata(pdev, prg);
|
||||
|
|
@ -414,6 +415,40 @@ static int ipu_prg_remove(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int prg_suspend(struct device *dev)
|
||||
{
|
||||
struct ipu_prg *prg = dev_get_drvdata(dev);
|
||||
|
||||
clk_disable_unprepare(prg->clk_axi);
|
||||
clk_disable_unprepare(prg->clk_ipg);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int prg_resume(struct device *dev)
|
||||
{
|
||||
struct ipu_prg *prg = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = clk_prepare_enable(prg->clk_ipg);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = clk_prepare_enable(prg->clk_axi);
|
||||
if (ret) {
|
||||
clk_disable_unprepare(prg->clk_ipg);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static const struct dev_pm_ops prg_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(prg_suspend, prg_resume, NULL)
|
||||
};
|
||||
|
||||
static const struct of_device_id ipu_prg_dt_ids[] = {
|
||||
{ .compatible = "fsl,imx6qp-prg", },
|
||||
{ /* sentinel */ },
|
||||
|
|
@ -424,6 +459,7 @@ struct platform_driver ipu_prg_drv = {
|
|||
.remove = ipu_prg_remove,
|
||||
.driver = {
|
||||
.name = "imx-ipu-prg",
|
||||
.pm = &prg_pm_ops,
|
||||
.of_match_table = ipu_prg_dt_ids,
|
||||
},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -269,8 +269,8 @@ int ipu_pre_get(struct ipu_pre *pre);
|
|||
void ipu_pre_put(struct ipu_pre *pre);
|
||||
u32 ipu_pre_get_baddr(struct ipu_pre *pre);
|
||||
void ipu_pre_configure(struct ipu_pre *pre, unsigned int width,
|
||||
unsigned int height,
|
||||
unsigned int stride, u32 format, unsigned int bufaddr);
|
||||
unsigned int height, unsigned int stride, u32 format,
|
||||
uint64_t modifier, unsigned int bufaddr);
|
||||
void ipu_pre_update(struct ipu_pre *pre, unsigned int bufaddr);
|
||||
|
||||
struct ipu_prg *ipu_prg_lookup_by_phandle(struct device *dev, const char *name,
|
||||
|
|
|
|||
|
|
@ -344,7 +344,7 @@ void ipu_prg_channel_disable(struct ipuv3_channel *ipu_chan);
|
|||
int ipu_prg_channel_configure(struct ipuv3_channel *ipu_chan,
|
||||
unsigned int axi_id, unsigned int width,
|
||||
unsigned int height, unsigned int stride,
|
||||
u32 format, unsigned long *eba);
|
||||
u32 format, uint64_t modifier, unsigned long *eba);
|
||||
|
||||
/*
|
||||
* IPU CMOS Sensor Interface (csi) functions
|
||||
|
|
|
|||
Loading…
Reference in New Issue