staging: comedi: ni_labpc: remove forward declarations 4
Move the analog input support functions to remove the need for the remaining forward declarations. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Cc: Ian Abbott <abbotti@mev.co.uk> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten
Greg Kroah-Hartman
parent
571e06c197
commit
af81f093d0
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@ -215,12 +215,6 @@ enum scan_mode {
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MODE_MULT_CHAN_DOWN,
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};
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static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
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enum scan_mode scan_mode);
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#ifdef CONFIG_ISA_DMA_API
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static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd);
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#endif
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/* analog input ranges */
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#define NUM_LABPC_PLUS_AI_RANGES 16
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/* indicates unipolar ranges */
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@ -441,20 +435,6 @@ static const int dma_buffer_size = 0xff00;
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/* 2 bytes per sample */
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static const int sample_size = 2;
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static inline int labpc_counter_load(struct comedi_device *dev,
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unsigned long base_address,
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unsigned int counter_number,
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unsigned int count, unsigned int mode)
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{
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const struct labpc_boardinfo *thisboard = comedi_board(dev);
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if (thisboard->memory_mapped_io)
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return i8254_mm_load((void __iomem *)base_address, 0,
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counter_number, count, mode);
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else
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return i8254_load(base_address, 0, counter_number, count, mode);
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}
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static void labpc_clear_adc_fifo(const struct comedi_device *dev)
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{
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struct labpc_private *devpriv = dev->private;
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@ -464,22 +444,281 @@ static void labpc_clear_adc_fifo(const struct comedi_device *dev)
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devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
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}
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static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
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static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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{
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const struct labpc_boardinfo *thisboard = comedi_board(dev);
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struct labpc_private *devpriv = dev->private;
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int i, n;
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int chan, range;
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int lsb, msb;
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int timeout = 1000;
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unsigned long flags;
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/* disable timed conversions */
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spin_lock_irqsave(&dev->spinlock, flags);
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devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
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devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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/* disable interrupt generation and dma */
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devpriv->command3_bits = 0;
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devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
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/* set gain and channel */
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devpriv->command1_bits = 0;
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chan = CR_CHAN(insn->chanspec);
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range = CR_RANGE(insn->chanspec);
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devpriv->command1_bits |= thisboard->ai_range_code[range];
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/* munge channel bits for differential/scan disabled mode */
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if (CR_AREF(insn->chanspec) == AREF_DIFF)
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chan *= 2;
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devpriv->command1_bits |= ADC_CHAN_BITS(chan);
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devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
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/* setup command6 register for 1200 boards */
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if (thisboard->register_layout == labpc_1200_layout) {
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/* reference inputs to ground or common? */
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if (CR_AREF(insn->chanspec) != AREF_GROUND)
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devpriv->command6_bits |= ADC_COMMON_BIT;
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else
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devpriv->command6_bits &= ~ADC_COMMON_BIT;
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/* bipolar or unipolar range? */
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if (thisboard->ai_range_is_unipolar[range])
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devpriv->command6_bits |= ADC_UNIP_BIT;
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else
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devpriv->command6_bits &= ~ADC_UNIP_BIT;
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/* don't interrupt on fifo half full */
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devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
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/* don't enable interrupt on counter a1 terminal count? */
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devpriv->command6_bits &= ~A1_INTR_EN_BIT;
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/* write to register */
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devpriv->write_byte(devpriv->command6_bits,
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dev->iobase + COMMAND6_REG);
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}
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/* setup command4 register */
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devpriv->command4_bits = 0;
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devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
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/* single-ended/differential */
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if (CR_AREF(insn->chanspec) == AREF_DIFF)
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devpriv->command4_bits |= ADC_DIFF_BIT;
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devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
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/*
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* initialize pacer counter output to make sure it doesn't
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* cause any problems
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*/
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devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
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labpc_clear_adc_fifo(dev);
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for (n = 0; n < insn->n; n++) {
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/* trigger conversion */
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devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
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for (i = 0; i < timeout; i++) {
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if (devpriv->read_byte(dev->iobase +
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STATUS1_REG) & DATA_AVAIL_BIT)
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break;
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udelay(1);
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}
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if (i == timeout) {
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comedi_error(dev, "timeout");
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return -ETIME;
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}
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lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
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msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
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data[n] = (msb << 8) | lsb;
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}
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return n;
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}
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#ifdef CONFIG_ISA_DMA_API
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/* utility function that suggests a dma transfer size in bytes */
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static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
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{
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unsigned int size;
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unsigned int freq;
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if (cmd->convert_src == TRIG_TIMER)
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freq = 1000000000 / cmd->convert_arg;
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/* return some default value */
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else
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freq = 0xffffffff;
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/* make buffer fill in no more than 1/3 second */
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size = (freq / 3) * sample_size;
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/* set a minimum and maximum size allowed */
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if (size > dma_buffer_size)
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size = dma_buffer_size - dma_buffer_size % sample_size;
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else if (size < sample_size)
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size = sample_size;
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return size;
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}
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#endif
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static int labpc_use_continuous_mode(const struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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if (mode == MODE_SINGLE_CHAN)
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return 1;
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if (cmd->scan_begin_src == TRIG_FOLLOW)
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return 1;
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return 0;
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}
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static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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if (cmd->convert_src != TRIG_TIMER)
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return 0;
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if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
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return cmd->scan_begin_arg;
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return cmd->convert_arg;
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}
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static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
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enum scan_mode mode, unsigned int ns)
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{
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if (cmd->convert_src != TRIG_TIMER)
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return;
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if (mode == MODE_SINGLE_CHAN &&
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cmd->scan_begin_src == TRIG_TIMER) {
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cmd->scan_begin_arg = ns;
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if (cmd->convert_arg > cmd->scan_begin_arg)
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cmd->convert_arg = cmd->scan_begin_arg;
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} else
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cmd->convert_arg = ns;
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}
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static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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if (cmd->scan_begin_src != TRIG_TIMER)
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return 0;
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if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
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return 0;
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return cmd->scan_begin_arg;
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}
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static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
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enum scan_mode mode, unsigned int ns)
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{
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if (cmd->scan_begin_src != TRIG_TIMER)
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return;
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if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
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return;
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cmd->scan_begin_arg = ns;
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}
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/* figures out what counter values to use based on command */
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static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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struct labpc_private *devpriv = dev->private;
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/* max value for 16 bit counter in mode 2 */
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const int max_counter_value = 0x10000;
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/* min value for 16 bit counter in mode 2 */
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const int min_counter_value = 2;
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unsigned int base_period;
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unsigned int scan_period;
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unsigned int convert_period;
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/*
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* if both convert and scan triggers are TRIG_TIMER, then they
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* both rely on counter b0
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*/
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convert_period = labpc_ai_convert_period(cmd, mode);
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scan_period = labpc_ai_scan_period(cmd, mode);
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if (convert_period && scan_period) {
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/*
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* pick the lowest b0 divisor value we can (for maximum input
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* clock speed on convert and scan counters)
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*/
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devpriv->divisor_b0 = (scan_period - 1) /
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(LABPC_TIMER_BASE * max_counter_value) + 1;
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if (devpriv->divisor_b0 < min_counter_value)
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devpriv->divisor_b0 = min_counter_value;
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if (devpriv->divisor_b0 > max_counter_value)
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devpriv->divisor_b0 = max_counter_value;
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base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
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/* set a0 for conversion frequency and b1 for scan frequency */
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switch (cmd->flags & TRIG_ROUND_MASK) {
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default:
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case TRIG_ROUND_NEAREST:
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devpriv->divisor_a0 =
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(convert_period + (base_period / 2)) / base_period;
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devpriv->divisor_b1 =
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(scan_period + (base_period / 2)) / base_period;
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break;
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case TRIG_ROUND_UP:
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devpriv->divisor_a0 =
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(convert_period + (base_period - 1)) / base_period;
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devpriv->divisor_b1 =
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(scan_period + (base_period - 1)) / base_period;
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break;
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case TRIG_ROUND_DOWN:
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devpriv->divisor_a0 = convert_period / base_period;
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devpriv->divisor_b1 = scan_period / base_period;
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break;
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}
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/* make sure a0 and b1 values are acceptable */
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if (devpriv->divisor_a0 < min_counter_value)
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devpriv->divisor_a0 = min_counter_value;
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if (devpriv->divisor_a0 > max_counter_value)
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devpriv->divisor_a0 = max_counter_value;
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if (devpriv->divisor_b1 < min_counter_value)
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devpriv->divisor_b1 = min_counter_value;
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if (devpriv->divisor_b1 > max_counter_value)
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devpriv->divisor_b1 = max_counter_value;
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/* write corrected timings to command */
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labpc_set_ai_convert_period(cmd, mode,
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base_period * devpriv->divisor_a0);
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labpc_set_ai_scan_period(cmd, mode,
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base_period * devpriv->divisor_b1);
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/*
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* if only one TRIG_TIMER is used, we can employ the generic
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* cascaded timing functions
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*/
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} else if (scan_period) {
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/*
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* calculate cascaded counter values
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* that give desired scan timing
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*/
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i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
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&(devpriv->divisor_b1),
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&(devpriv->divisor_b0),
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&scan_period,
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cmd->flags & TRIG_ROUND_MASK);
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labpc_set_ai_scan_period(cmd, mode, scan_period);
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} else if (convert_period) {
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/*
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* calculate cascaded counter values
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* that give desired conversion timing
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*/
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i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
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&(devpriv->divisor_a0),
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&(devpriv->divisor_b0),
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&convert_period,
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cmd->flags & TRIG_ROUND_MASK);
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labpc_set_ai_convert_period(cmd, mode, convert_period);
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}
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}
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static enum scan_mode labpc_ai_scan_mode(const struct comedi_cmd *cmd)
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{
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if (cmd->chanlist_len == 1)
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@ -574,69 +813,6 @@ static int labpc_ai_chanlist_invalid(const struct comedi_device *dev,
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return 0;
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}
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static int labpc_use_continuous_mode(const struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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if (mode == MODE_SINGLE_CHAN)
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return 1;
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if (cmd->scan_begin_src == TRIG_FOLLOW)
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return 1;
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return 0;
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}
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static unsigned int labpc_ai_convert_period(const struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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if (cmd->convert_src != TRIG_TIMER)
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return 0;
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if (mode == MODE_SINGLE_CHAN && cmd->scan_begin_src == TRIG_TIMER)
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return cmd->scan_begin_arg;
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return cmd->convert_arg;
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}
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static void labpc_set_ai_convert_period(struct comedi_cmd *cmd,
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enum scan_mode mode, unsigned int ns)
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{
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if (cmd->convert_src != TRIG_TIMER)
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return;
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if (mode == MODE_SINGLE_CHAN &&
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cmd->scan_begin_src == TRIG_TIMER) {
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cmd->scan_begin_arg = ns;
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if (cmd->convert_arg > cmd->scan_begin_arg)
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cmd->convert_arg = cmd->scan_begin_arg;
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} else
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cmd->convert_arg = ns;
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}
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static unsigned int labpc_ai_scan_period(const struct comedi_cmd *cmd,
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enum scan_mode mode)
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{
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if (cmd->scan_begin_src != TRIG_TIMER)
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return 0;
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if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
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return 0;
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return cmd->scan_begin_arg;
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}
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static void labpc_set_ai_scan_period(struct comedi_cmd *cmd,
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enum scan_mode mode, unsigned int ns)
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{
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if (cmd->scan_begin_src != TRIG_TIMER)
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return;
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if (mode == MODE_SINGLE_CHAN && cmd->convert_src == TRIG_TIMER)
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return;
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cmd->scan_begin_arg = ns;
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}
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static int labpc_ai_cmdtest(struct comedi_device *dev,
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struct comedi_subdevice *s, struct comedi_cmd *cmd)
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{
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@ -736,6 +912,20 @@ static int labpc_ai_cmdtest(struct comedi_device *dev,
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return 0;
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}
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static inline int labpc_counter_load(struct comedi_device *dev,
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unsigned long base_address,
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unsigned int counter_number,
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unsigned int count, unsigned int mode)
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{
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const struct labpc_boardinfo *thisboard = comedi_board(dev);
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if (thisboard->memory_mapped_io)
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return i8254_mm_load((void __iomem *)base_address, 0,
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counter_number, count, mode);
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else
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return i8254_load(base_address, 0, counter_number, count, mode);
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}
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static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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{
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const struct labpc_boardinfo *thisboard = comedi_board(dev);
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@ -1005,216 +1195,20 @@ static int labpc_ai_cmd(struct comedi_device *dev, struct comedi_subdevice *s)
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return 0;
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}
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static int labpc_ai_rinsn(struct comedi_device *dev, struct comedi_subdevice *s,
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struct comedi_insn *insn, unsigned int *data)
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static int labpc_cancel(struct comedi_device *dev, struct comedi_subdevice *s)
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{
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const struct labpc_boardinfo *thisboard = comedi_board(dev);
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struct labpc_private *devpriv = dev->private;
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int i, n;
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int chan, range;
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int lsb, msb;
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int timeout = 1000;
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unsigned long flags;
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/* disable timed conversions */
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spin_lock_irqsave(&dev->spinlock, flags);
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devpriv->command2_bits &= ~SWTRIG_BIT & ~HWTRIG_BIT & ~PRETRIG_BIT;
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devpriv->write_byte(devpriv->command2_bits, dev->iobase + COMMAND2_REG);
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spin_unlock_irqrestore(&dev->spinlock, flags);
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/* disable interrupt generation and dma */
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devpriv->command3_bits = 0;
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devpriv->write_byte(devpriv->command3_bits, dev->iobase + COMMAND3_REG);
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/* set gain and channel */
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devpriv->command1_bits = 0;
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chan = CR_CHAN(insn->chanspec);
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range = CR_RANGE(insn->chanspec);
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devpriv->command1_bits |= thisboard->ai_range_code[range];
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/* munge channel bits for differential/scan disabled mode */
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if (CR_AREF(insn->chanspec) == AREF_DIFF)
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chan *= 2;
|
||||
devpriv->command1_bits |= ADC_CHAN_BITS(chan);
|
||||
devpriv->write_byte(devpriv->command1_bits, dev->iobase + COMMAND1_REG);
|
||||
|
||||
/* setup command6 register for 1200 boards */
|
||||
if (thisboard->register_layout == labpc_1200_layout) {
|
||||
/* reference inputs to ground or common? */
|
||||
if (CR_AREF(insn->chanspec) != AREF_GROUND)
|
||||
devpriv->command6_bits |= ADC_COMMON_BIT;
|
||||
else
|
||||
devpriv->command6_bits &= ~ADC_COMMON_BIT;
|
||||
/* bipolar or unipolar range? */
|
||||
if (thisboard->ai_range_is_unipolar[range])
|
||||
devpriv->command6_bits |= ADC_UNIP_BIT;
|
||||
else
|
||||
devpriv->command6_bits &= ~ADC_UNIP_BIT;
|
||||
/* don't interrupt on fifo half full */
|
||||
devpriv->command6_bits &= ~ADC_FHF_INTR_EN_BIT;
|
||||
/* don't enable interrupt on counter a1 terminal count? */
|
||||
devpriv->command6_bits &= ~A1_INTR_EN_BIT;
|
||||
/* write to register */
|
||||
devpriv->write_byte(devpriv->command6_bits,
|
||||
dev->iobase + COMMAND6_REG);
|
||||
}
|
||||
/* setup command4 register */
|
||||
devpriv->command4_bits = 0;
|
||||
devpriv->command4_bits |= EXT_CONVERT_DISABLE_BIT;
|
||||
/* single-ended/differential */
|
||||
if (CR_AREF(insn->chanspec) == AREF_DIFF)
|
||||
devpriv->command4_bits |= ADC_DIFF_BIT;
|
||||
devpriv->write_byte(devpriv->command4_bits, dev->iobase + COMMAND4_REG);
|
||||
|
||||
/*
|
||||
* initialize pacer counter output to make sure it doesn't
|
||||
* cause any problems
|
||||
*/
|
||||
devpriv->write_byte(INIT_A0_BITS, dev->iobase + COUNTER_A_CONTROL_REG);
|
||||
|
||||
labpc_clear_adc_fifo(dev);
|
||||
|
||||
for (n = 0; n < insn->n; n++) {
|
||||
/* trigger conversion */
|
||||
devpriv->write_byte(0x1, dev->iobase + ADC_CONVERT_REG);
|
||||
|
||||
for (i = 0; i < timeout; i++) {
|
||||
if (devpriv->read_byte(dev->iobase +
|
||||
STATUS1_REG) & DATA_AVAIL_BIT)
|
||||
break;
|
||||
udelay(1);
|
||||
}
|
||||
if (i == timeout) {
|
||||
comedi_error(dev, "timeout");
|
||||
return -ETIME;
|
||||
}
|
||||
lsb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
|
||||
msb = devpriv->read_byte(dev->iobase + ADC_FIFO_REG);
|
||||
data[n] = (msb << 8) | lsb;
|
||||
}
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ISA_DMA_API
|
||||
/* utility function that suggests a dma transfer size in bytes */
|
||||
static unsigned int labpc_suggest_transfer_size(const struct comedi_cmd *cmd)
|
||||
{
|
||||
unsigned int size;
|
||||
unsigned int freq;
|
||||
|
||||
if (cmd->convert_src == TRIG_TIMER)
|
||||
freq = 1000000000 / cmd->convert_arg;
|
||||
/* return some default value */
|
||||
else
|
||||
freq = 0xffffffff;
|
||||
|
||||
/* make buffer fill in no more than 1/3 second */
|
||||
size = (freq / 3) * sample_size;
|
||||
|
||||
/* set a minimum and maximum size allowed */
|
||||
if (size > dma_buffer_size)
|
||||
size = dma_buffer_size - dma_buffer_size % sample_size;
|
||||
else if (size < sample_size)
|
||||
size = sample_size;
|
||||
|
||||
return size;
|
||||
}
|
||||
#endif
|
||||
|
||||
/* figures out what counter values to use based on command */
|
||||
static void labpc_adc_timing(struct comedi_device *dev, struct comedi_cmd *cmd,
|
||||
enum scan_mode mode)
|
||||
{
|
||||
struct labpc_private *devpriv = dev->private;
|
||||
/* max value for 16 bit counter in mode 2 */
|
||||
const int max_counter_value = 0x10000;
|
||||
/* min value for 16 bit counter in mode 2 */
|
||||
const int min_counter_value = 2;
|
||||
unsigned int base_period;
|
||||
unsigned int scan_period;
|
||||
unsigned int convert_period;
|
||||
|
||||
/*
|
||||
* if both convert and scan triggers are TRIG_TIMER, then they
|
||||
* both rely on counter b0
|
||||
*/
|
||||
convert_period = labpc_ai_convert_period(cmd, mode);
|
||||
scan_period = labpc_ai_scan_period(cmd, mode);
|
||||
if (convert_period && scan_period) {
|
||||
/*
|
||||
* pick the lowest b0 divisor value we can (for maximum input
|
||||
* clock speed on convert and scan counters)
|
||||
*/
|
||||
devpriv->divisor_b0 = (scan_period - 1) /
|
||||
(LABPC_TIMER_BASE * max_counter_value) + 1;
|
||||
if (devpriv->divisor_b0 < min_counter_value)
|
||||
devpriv->divisor_b0 = min_counter_value;
|
||||
if (devpriv->divisor_b0 > max_counter_value)
|
||||
devpriv->divisor_b0 = max_counter_value;
|
||||
|
||||
base_period = LABPC_TIMER_BASE * devpriv->divisor_b0;
|
||||
|
||||
/* set a0 for conversion frequency and b1 for scan frequency */
|
||||
switch (cmd->flags & TRIG_ROUND_MASK) {
|
||||
default:
|
||||
case TRIG_ROUND_NEAREST:
|
||||
devpriv->divisor_a0 =
|
||||
(convert_period + (base_period / 2)) / base_period;
|
||||
devpriv->divisor_b1 =
|
||||
(scan_period + (base_period / 2)) / base_period;
|
||||
break;
|
||||
case TRIG_ROUND_UP:
|
||||
devpriv->divisor_a0 =
|
||||
(convert_period + (base_period - 1)) / base_period;
|
||||
devpriv->divisor_b1 =
|
||||
(scan_period + (base_period - 1)) / base_period;
|
||||
break;
|
||||
case TRIG_ROUND_DOWN:
|
||||
devpriv->divisor_a0 = convert_period / base_period;
|
||||
devpriv->divisor_b1 = scan_period / base_period;
|
||||
break;
|
||||
}
|
||||
/* make sure a0 and b1 values are acceptable */
|
||||
if (devpriv->divisor_a0 < min_counter_value)
|
||||
devpriv->divisor_a0 = min_counter_value;
|
||||
if (devpriv->divisor_a0 > max_counter_value)
|
||||
devpriv->divisor_a0 = max_counter_value;
|
||||
if (devpriv->divisor_b1 < min_counter_value)
|
||||
devpriv->divisor_b1 = min_counter_value;
|
||||
if (devpriv->divisor_b1 > max_counter_value)
|
||||
devpriv->divisor_b1 = max_counter_value;
|
||||
/* write corrected timings to command */
|
||||
labpc_set_ai_convert_period(cmd, mode,
|
||||
base_period * devpriv->divisor_a0);
|
||||
labpc_set_ai_scan_period(cmd, mode,
|
||||
base_period * devpriv->divisor_b1);
|
||||
/*
|
||||
* if only one TRIG_TIMER is used, we can employ the generic
|
||||
* cascaded timing functions
|
||||
*/
|
||||
} else if (scan_period) {
|
||||
/*
|
||||
* calculate cascaded counter values
|
||||
* that give desired scan timing
|
||||
*/
|
||||
i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
|
||||
&(devpriv->divisor_b1),
|
||||
&(devpriv->divisor_b0),
|
||||
&scan_period,
|
||||
cmd->flags & TRIG_ROUND_MASK);
|
||||
labpc_set_ai_scan_period(cmd, mode, scan_period);
|
||||
} else if (convert_period) {
|
||||
/*
|
||||
* calculate cascaded counter values
|
||||
* that give desired conversion timing
|
||||
*/
|
||||
i8253_cascade_ns_to_timer_2div(LABPC_TIMER_BASE,
|
||||
&(devpriv->divisor_a0),
|
||||
&(devpriv->divisor_b0),
|
||||
&convert_period,
|
||||
cmd->flags & TRIG_ROUND_MASK);
|
||||
labpc_set_ai_convert_period(cmd, mode, convert_period);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ISA_DMA_API
|
||||
|
|
|
|||
Loading…
Reference in New Issue