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This pull request contains Broadcom ARM-based SoCs Device Tree changes 

for 4.21, please pull the following:
 
 - Rafal relicenses a bunch of DTS files he wrote under the GPL 2.0+/MIT
   license and adds proper SPDX license tags in the process
 
 - Rene adds support for the Linksys EA6500 v2 Wi-Fi router based on
   BCM4708 plus two BCM4360 and BCM4331 radios
 
 - Phil documents and updates the vchiq mailbox compatible string in
   order to establish a correct agreement between the Raspberry Pi
   firmware and the ARM CPU's view of what an ARM CPU cache line size is,
   he also fixes the mailbox "reg" property to be correctly expressed in
   bytes
 
 - Stefan updates the Raspberry Pi Zero DTS files to use SPDX tags
 
 - Florian enables the SATA PHY and AHCI controller on the BCM63138 SoCs,
   he also does a bit of refactoring of aliases for the Northstar Plus
   DTS files
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 BwTTjxAAu8TdzKOrvXxbhZS8k4aenkvKo2J7yWc7Oy3OkxEyveIRWG5Qm9jIG+6v
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 =kE/p
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Merge tag 'arm-soc/for-4.21/devicetree' of https://github.com/Broadcom/stblinux into next/dt

This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 4.21, please pull the following:

- Rafal relicenses a bunch of DTS files he wrote under the GPL 2.0+/MIT
  license and adds proper SPDX license tags in the process

- Rene adds support for the Linksys EA6500 v2 Wi-Fi router based on
  BCM4708 plus two BCM4360 and BCM4331 radios

- Phil documents and updates the vchiq mailbox compatible string in
  order to establish a correct agreement between the Raspberry Pi
  firmware and the ARM CPU's view of what an ARM CPU cache line size is,
  he also fixes the mailbox "reg" property to be correctly expressed in
  bytes

- Stefan updates the Raspberry Pi Zero DTS files to use SPDX tags

- Florian enables the SATA PHY and AHCI controller on the BCM63138 SoCs,
  he also does a bit of refactoring of aliases for the Northstar Plus
  DTS files

* tag 'arm-soc/for-4.21/devicetree' of https://github.com/Broadcom/stblinux:
  ARM: dts: BCM5301X: Describe Northstar pins mux controller
  ARM: dts: BCM5301X: Add basic DT for Linksys EA6500 V2
  ARM: dts: bcm2835-rpi-zero: Switch to SPDX identifier
  ARM: dts: bcm283x: Correct mailbox register sizes
  ARM: dts: bcm283x: Correct vchiq compatible string
  dt-bindings: soc: Document "brcm,bcm2836-vchiq"
  ARM: dts: NSP: Move aliases to bcm-nsp.dtsi
  ARM: dts: BCM53573: Relicense SoC file to the GPL 2.0+ / MIT
  ARM: dts: BCM63xx: Enable SATA AHCI and PHY for BCM963138DVT
  ARM: dts: BCM63xx: enable SATA PHY and AHCI controller
  ARM: dts: BCM53573: Relicense Tenda AC9 file to the GPL 2.0+ / MIT
  ARM: dts: BCM5301X: Relicense BCM47094 file to the GPL 2.0+ / MIT
  ARM: dts: BCM5301X: Relicense BCM47081/BCM4709 files to the GPL 2.0+ / MIT

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-12-03 12:50:41 -08:00
parent b71a29d57d 9994241ac9
commit af43c3f032
28 changed files with 158 additions and 74 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
Documentation/devicetree/bindings/soc/bcm/brcm,bcm2835-vchiq.txt
View File

@ -2,7 +2,8 @@ Broadcom VCHIQ firmware services
Required properties:
- compatible: Should be "brcm,bcm2835-vchiq"
- compatible: Should be "brcm,bcm2835-vchiq" on BCM2835, otherwise
"brcm,bcm2836-vchiq".
- reg: Physical base address and length of the doorbell register pair
- interrupts: The interrupt number
See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt

1
arch/arm/boot/dts/Makefile
View File

@ -89,6 +89,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4708-asus-rt-ac68u.dtb \
bcm4708-buffalo-wzr-1750dhp.dtb \
bcm4708-linksys-ea6300-v1.dtb \
bcm4708-linksys-ea6500-v2.dtb \
bcm4708-luxul-xap-1510.dtb \
bcm4708-luxul-xwc-1000.dtb \
bcm4708-netgear-r6250.dtb \

8
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -41,6 +41,14 @@
model = "Broadcom Northstar Plus SoC";
interrupt-parent = <&gic>;
aliases {
serial0 = &uart0;
serial1 = &uart1;
ethernet0 = &amac0;
ethernet1 = &amac1;
ethernet2 = &amac2;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;

8
arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
View File

@ -1,12 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Stefan Wahren <stefan.wahren@i2se.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;

8
arch/arm/boot/dts/bcm2835-rpi-zero.dts
View File

@ -1,12 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Stefan Wahren <stefan.wahren@i2se.com>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;

4
arch/arm/boot/dts/bcm2835-rpi.dtsi
View File

@ -30,9 +30,9 @@
#power-domain-cells = <1>;
};
mailbox@7e00b840 {
vchiq: mailbox@7e00b840 {
compatible = "brcm,bcm2835-vchiq";
reg = <0x7e00b840 0xf>;
reg = <0x7e00b840 0x3c>;
interrupts = <0 2>;
};
};

2
arch/arm/boot/dts/bcm2836-rpi-2-b.dts
View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2836.dtsi"
#include "bcm2835-rpi.dtsi"
#include "bcm2836-rpi.dtsi"
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"

6
arch/arm/boot/dts/bcm2836-rpi.dtsi Normal file
View File

@ -0,0 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
#include "bcm2835-rpi.dtsi"
&vchiq {
compatible = "brcm,bcm2836-vchiq", "brcm,bcm2835-vchiq";
};

2
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2837.dtsi"
#include "bcm2835-rpi.dtsi"
#include "bcm2836-rpi.dtsi"
#include "bcm283x-rpi-lan7515.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"

2
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2837.dtsi"
#include "bcm2835-rpi.dtsi"
#include "bcm2836-rpi.dtsi"
#include "bcm283x-rpi-smsc9514.dtsi"
#include "bcm283x-rpi-usb-host.dtsi"

2
arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
View File

@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "bcm2837.dtsi"
#include "bcm2835-rpi.dtsi"
#include "bcm2836-rpi.dtsi"
/ {
memory {

45
arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts Normal file
View File

@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2017 Rafał Miłecki <rafal@milecki.pl>
* Copyright (C) 2018 Rene Kjellerup <rk.katana.steel@gmail.com>
*/
/dts-v1/;
#include "bcm4708.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "linksys,ea6500-v2", "brcm,bcm4708";
model = "Linksys EA6500 V2";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
};
};
};
&usb3_phy {
status = "okay";
};

13
arch/arm/boot/dts/bcm47081.dtsi
View File

@ -1,20 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for BCM47081 SoC.
*
* Copyright © 2014 Rafał Miłecki <zajec5@gmail.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
* REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
* AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
* INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
* LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE
* OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#include "bcm5301x.dtsi"

3
arch/arm/boot/dts/bcm4709.dtsi
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
#include "bcm4708.dtsi"

3
arch/arm/boot/dts/bcm47094.dtsi
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
#include "bcm4708.dtsi"

3
arch/arm/boot/dts/bcm47189-tenda-ac9.dts
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
/dts-v1/;

44
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -37,6 +37,8 @@
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
pinctrl-names = "default";
pinctrl-0 = <&pinmux_uart1>;
status = "disabled";
};
};
@ -391,6 +393,48 @@
status = "disabled";
};
dmu@1800c000 {
compatible = "simple-bus";
ranges = <0 0x1800c000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
cru@100 {
compatible = "simple-bus";
reg = <0x100 0x1a4>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
pin-controller@1c0 {
compatible = "brcm,bcm4708-pinmux";
reg = <0x1c0 0x24>;
reg-names = "cru_gpio_control";
spi-pins {
groups = "spi_grp";
function = "spi";
};
i2c {
groups = "i2c_grp";
function = "i2c";
};
pwm {
groups = "pwm0_grp", "pwm1_grp",
"pwm2_grp", "pwm3_grp";
function = "pwm";
};
pinmux_uart1: uart1 {
groups = "uart1_grp";
function = "uart1";
};
};
};
};
lcpll0: lcpll0@1800c100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";

3
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -1,7 +1,6 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
*
* Licensed under the ISC license.
*/
#include <dt-bindings/gpio/gpio.h>

31
arch/arm/boot/dts/bcm63138.dtsi
View File

@ -143,6 +143,37 @@
reg = <0x4800e0 0x10>;
#reset-cells = <2>;
};
ahci: sata@8000 {
compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
reg = <0xa000 0x9ac>, <0x8040 0x24>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&pmb0 3 1>;
reset-names = "ahci";
status = "disabled";
sata0: sata-port@0 {
reg = <0>;
phys = <&sata_phy0>;
};
};
sata_phy: sata-phy@8100 {
compatible = "brcm,bcm63138-sata-phy", "brcm,phy-sata3";
reg = <0x8100 0x1e00>;
reg-names = "phy";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
sata_phy0: sata-phy@0 {
reg = <0>;
#phy-cells = <0>;
};
};
};
/* Legacy UBUS base */

4
arch/arm/boot/dts/bcm958522er.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus SVK (BCM958522ER)";
compatible = "brcm,bcm58522", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};

4
arch/arm/boot/dts/bcm958525er.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus SVK (BCM958525ER)";
compatible = "brcm,bcm58525", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};

4
arch/arm/boot/dts/bcm958525xmc.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus XMC (BCM958525xmc)";
compatible = "brcm,bcm58525", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};

4
arch/arm/boot/dts/bcm958622hr.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus SVK (BCM958622HR)";
compatible = "brcm,bcm58622", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};

4
arch/arm/boot/dts/bcm958623hr.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus SVK (BCM958623HR)";
compatible = "brcm,bcm58623", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};

4
arch/arm/boot/dts/bcm958625hr.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus SVK (BCM958625HR)";
compatible = "brcm,bcm58625", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};

5
arch/arm/boot/dts/bcm958625k.dts
View File

@ -38,11 +38,6 @@
model = "NorthStar Plus SVK (BCM958625K)";
compatible = "brcm,bcm58625", "brcm,nsp";
aliases {
serial0 = &uart0;
serial1 = &uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};

8
arch/arm/boot/dts/bcm963138dvt.dts
View File

@ -41,3 +41,11 @@
brcm,nand-oob-sectors-size = <16>;
};
};
&ahci {
status = "okay";
};
&sata_phy {
status = "okay";
};

4
arch/arm/boot/dts/bcm988312hr.dts
View File

@ -39,10 +39,6 @@
model = "NorthStar Plus SVK (BCM988312HR)";
compatible = "brcm,bcm88312", "brcm,nsp";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};