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This adds the board for the Netxeon R89 used in different 

TV-boxes and the initial support for two Chromebooks from
 the veyron family.
 Additionally a non-critical fix for the watchdog irq
 on rk3288, addition of the gmac reset line, a ramp delay
 for the cpu regulator on the firefly board and cpu affinity
 for the arm-pmu spi irqs.
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Merge tag 'v4.3-rockchip32-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "Rockchip dts changes for 4.3, part1" from Heiko Stuebner:

This adds the board for the Netxeon R89 used in different TV-boxes and
the initial support for two Chromebooks from the veyron family.

Additionally a non-critical fix for the watchdog irq on rk3288, addition
of the gmac reset line, a ramp delay for the cpu regulator on the firefly
board and cpu affinity for the arm-pmu spi irqs.

* tag 'v4.3-rockchip32-dts1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: add rk3288 arm-pmu irq affinity
  dt-bindings: document rk3368 R88 board from Rockchip
  ARM: dts: rockchip: add missing device_type = "memory" to boards
  ARM: dts: rockchip: add veyron-pinky board
  ARM: dts: rockchip: add veyron-jerry board
  ARM: dts: rockchip: add shared rk3288-veyron files
  ARM: dts: Add sbs-battery dts fragment used by chromebooks
  ARM: dts: rockchip: add Netxeon R89 board
  dt-bindings: add vendor prefix for Netxeon Technology
  ARM: dts: rockchip: fix rk3288 watchdog irq
  ARM: dts: rockchip: Add ramp delay for vdd_cpu in firefly board dts
  ARM: dts: rockchip: Add STMMAC reset signal in GMAC interface for rk3288

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-07-17 10:37:26 -07:00
parent fb61a92190 4863dcd394
commit af3761246c
18 changed files with 1748 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
Documentation/devicetree/bindings/arm/rockchip.txt
View File

@ -26,3 +26,23 @@ Rockchip platforms device tree bindings
- ChipSPARK PopMetal-RK3288 board:
Required root node properties:
- compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
- Netxeon R89 board:
Required root node properties:
- compatible = "netxeon,r89", "rockchip,rk3288";
- Google Jerry (Hisense Chromebook C11 and more):
Required root node properties:
- compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
"google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
"google,veyron-jerry-rev3", "google,veyron-jerry",
"google,veyron", "rockchip,rk3288";
- Google Pinky (dev-board):
Required root node properties:
- compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
"google,veyron", "rockchip,rk3288";
- Rockchip R88 board:
Required root node properties:
- compatible = "rockchip,r88", "rockchip,rk3368";

1
Documentation/devicetree/bindings/vendor-prefixes.txt
View File

@ -144,6 +144,7 @@ national National Semiconductor
neonode Neonode Inc.
netgear NETGEAR
netlogic Broadcom Corporation (formerly NetLogic Microsystems)
netxeon Shenzhen Netxeon Technology CO., LTD
newhaven Newhaven Display International
nintendo Nintendo
nokia Nokia

5
arch/arm/boot/dts/Makefile
View File

@ -495,7 +495,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-evb-act8846.dtb \
rk3288-evb-rk808.dtb \
rk3288-firefly-beta.dtb \
rk3288-firefly.dtb
rk3288-firefly.dtb \
rk3288-r89.dtb \
rk3288-veyron-jerry.dtb \
rk3288-veyron-pinky.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \

52
arch/arm/boot/dts/cros-ec-sbs.dtsi Normal file
View File

@ -0,0 +1,52 @@
/*
* Smart battery dts fragment for devices that use cros-ec-sbs
*
* Copyright (c) 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
&i2c_tunnel {
battery: sbs-battery@b {
compatible = "sbs,sbs-battery";
reg = <0xb>;
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <1>;
};
};

1
arch/arm/boot/dts/rk3066a-bqcurie2.dts
View File

@ -49,6 +49,7 @@
compatible = "mundoreader,bq-curie2", "rockchip,rk3066a";
memory {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

1
arch/arm/boot/dts/rk3066a-marsboard.dts
View File

@ -48,6 +48,7 @@
compatible = "haoyu,marsboard-rk3066", "rockchip,rk3066a";
memory {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

1
arch/arm/boot/dts/rk3066a-rayeager.dts
View File

@ -48,6 +48,7 @@
compatible = "chipspark,rayeager-px2", "rockchip,rk3066a";
memory {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

1
arch/arm/boot/dts/rk3188-radxarock.dts
View File

@ -48,6 +48,7 @@
compatible = "radxa,rock", "rockchip,rk3188";
memory {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

1
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@ -43,6 +43,7 @@
/ {
memory {
device_type = "memory";
reg = <0x0 0x80000000>;
};

3
arch/arm/boot/dts/rk3288-firefly.dtsi
View File

@ -44,6 +44,7 @@
/ {
memory {
device_type = "memory";
reg = <0 0x80000000>;
};
@ -213,6 +214,8 @@
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
regulator-enable-ramp-delay = <300>;
regulator-ramp-delay = <8000>;
vin-supply = <&vcc_sys>;
};

1
arch/arm/boot/dts/rk3288-popmetal.dts
View File

@ -49,6 +49,7 @@
compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
memory{
device_type = "memory";
reg = <0 0x80000000>;
};

413
arch/arm/boot/dts/rk3288-r89.dts Normal file
View File

@ -0,0 +1,413 @@
/*
* Copyright (c) 2015 Heiko Stuebner <heiko@sntech.de>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <dt-bindings/pwm/pwm.h>
#include "rk3288.dtsi"
/ {
compatible = "netxeon,r89", "rockchip,rk3288";
memory {
device_type = "memory";
reg = <0x0 0x80000000>;
};
ext_gmac: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "ext_gmac";
#clock-cells = <0>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
pinctrl-names = "default";
pinctrl-0 = <&pwrbtn>;
button@0 {
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
linux,code = <116>;
label = "GPIO Key Power";
linux,input-type = <1>;
gpio-key,wakeup = <1>;
debounce-interval = <100>;
};
};
vcc_host: vcc-host-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host_vbus_drv>;
regulator-name = "vcc_host";
regulator-always-on;
regulator-boot-on;
};
vcc_otg: vcc-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "vcc_otg";
regulator-always-on;
regulator-boot-on;
};
vcc_sdmmc: sdmmc-regulator {
compatible = "regulator-fixed";
regulator-name = "sdmmc-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio7 11 GPIO_ACTIVE_LOW>;
startup-delay-us = <100000>;
vin-supply = <&vcc_io>;
};
vcc_sys: sys-regulator {
compatible = "regulator-fixed";
regulator-name = "sys-supply";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
};
&gmac {
phy-supply = <&vcc_lan>;
phy-mode = "rgmii";
clock_in_out = "input";
snps,reset-gpio = <&gpio4 7 0>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 1000000>;
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
tx_delay = <0x30>;
rx_delay = <0x10>;
status = "ok";
};
&hdmi {
status = "okay";
};
&i2c0 {
status = "okay";
vdd_cpu: pmic@40 {
compatible = "silergy,syr827";
reg = <0x40>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "VDD_CPU";
regulator-enable-ramp-delay = <300>;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <8000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
vdd_gpu: pmic@41 {
compatible = "silergy,syr828";
reg = <0x41>;
fcs,suspend-voltage-selector = <1>;
regulator-name = "VDD_GPU";
regulator-enable-ramp-delay = <300>;
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-ramp-delay = <8000>;
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_sys>;
};
rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
#clock-cells = <0>;
clock-output-names = "xin32k";
interrupt-parent = <&gpio0>;
interrupts = <4 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int>;
};
act8846: pmic@5a {
compatible = "active-semi,act8846";
reg = <0x5a>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_vsel>, <&pwr_hold>;
system-power-controller;
regulators {
vcc_ddr: REG1 {
regulator-name = "VCC_DDR";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
};
vcc_io: REG2 {
regulator-name = "VCC_IO";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_log: REG3 {
regulator-name = "VDD_LOG";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
vcc_20: REG4 {
regulator-name = "VCC_20";
regulator-min-microvolt = <2000000>;
regulator-max-microvolt = <2000000>;
regulator-always-on;
};
vccio_sd: REG5 {
regulator-name = "VCCIO_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd10_lcd: REG6 {
regulator-name = "VDD10_LCD";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
vcc_wl: REG7 {
regulator-name = "VCC_WL";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vcca_33: REG8 {
regulator-name = "VCCA_33";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vcc_lan: REG9 {
regulator-name = "VCC_LAN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vdd_10: REG10 {
regulator-name = "VDD_10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
vcc_18: REG11 {
regulator-name = "VCC_18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vcc18_lcd: REG12 {
regulator-name = "VCC18_LCD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
};
};
&i2c5 {
status = "okay";
};
&pinctrl {
pcfg_output_high: pcfg-output-high {
output-high;
};
pcfg_output_low: pcfg-output-low {
output-low;
};
act8846 {
pmic_vsel: pmic-vsel {
rockchip,pins = <7 1 RK_FUNC_GPIO &pcfg_output_low>;
};
pwr_hold: pwr-hold {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_output_high>;
};
};
buttons {
pwrbtn: pwrbtn {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int: pmic-int {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb {
host_vbus_drv: host-vbus-drv {
rockchip,pins = <0 14 RK_FUNC_GPIO &pcfg_pull_none>;
};
otg_vbus_drv: otg-vbus-drv {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm0 {
status = "okay";
};
&saradc {
vref-supply = <&vcc_18>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
disable-wp;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>;
vmmc-supply = <&vcc_sdmmc>;
vqmmc-supply = <&vccio_sd>;
status = "okay";
};
&tsadc {
rockchip,hw-tshut-mode = <0>;
rockchip,hw-tshut-polarity = <0>;
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&uart3 {
status = "okay";
};
&uart4 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host1 {
status = "okay";
};
&usb_otg {
status = "okay";
};
&usbphy {
status = "okay";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&wdt {
status = "okay";
};

232
arch/arm/boot/dts/rk3288-veyron-chromebook.dtsi Normal file
View File

@ -0,0 +1,232 @@
/*
* Google Veyron (and derivatives) board device tree source
* Chromebook specific parts
*
* Copyright 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/clock/rockchip,rk808.h>
#include <dt-bindings/input/input.h>
#include "rk3288-veyron.dtsi"
#include "rk3288-veyron-sdmmc.dtsi"
/ {
aliases {
/* Assign 20 so we don't get confused w/ builtin ones */
i2c20 = &i2c_tunnel;
};
gpio-charger {
compatible = "gpio-charger";
charger-type = "mains";
gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ac_present_ap>;
};
/* A non-regulated voltage from power supply or battery */
vccsys: vccsys {
compatible = "regulator-fixed";
regulator-name = "vccsys";
regulator-boot-on;
regulator-always-on;
};
vcc33_sys: vcc33-sys {
vin-supply = <&vccsys>;
};
vcc_5v: vcc-5v {
vin-supply = <&vccsys>;
};
/* This turns on vbus for host1 (dwc2) */
vcc5_host1: vcc5-host1-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 11 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host1_pwr_en>;
regulator-name = "vcc5_host1";
regulator-always-on;
regulator-boot-on;
};
/* This turns on vbus for otg for host mode (dwc2) */
vcc5v_otg: vcc5v-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usbotg_pwren_h>;
regulator-name = "vcc5_host2";
regulator-always-on;
regulator-boot-on;
};
};
&gpio_keys {
pinctrl-0 = <&pwr_key_l &ap_lid_int_l>;
lid {
label = "Lid";
gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
gpio-key,wakeup;
linux,code = <0>; /* SW_LID */
linux,input-type = <5>; /* EV_SW */
debounce-interval = <1>;
};
};
&rk808 {
vcc11-supply = <&vcc_5v>;
regulators {
vcc33_ccd: LDO_REG8 {
regulator-name = "vcc33_ccd";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
};
};
&spi0 {
status = "okay";
cros_ec: ec@0 {
compatible = "google,cros-ec-spi";
reg = <0>;
google,cros-ec-spi-pre-delay = <30>;
interrupt-parent = <&gpio7>;
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&ec_int>;
spi-max-frequency = <3000000>;
i2c_tunnel: i2c-tunnel {
compatible = "google,cros-ec-i2c-tunnel";
google,remote-bus = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
&i2c4 {
trackpad@15 {
compatible = "elan,ekth3000";
reg = <0x15>;
interrupt-parent = <&gpio7>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
pinctrl-names = "default";
pinctrl-0 = <&trackpad_int>;
vcc-supply = <&vcc33_io>;
wakeup-source;
};
};
&pinctrl {
pinctrl-0 = <
/* Common for sleep and wake, but no owners */
&global_pwroff
/* Wake only */
&suspend_l_wake
>;
pinctrl-1 = <
/* Common for sleep and wake, but no owners */
&global_pwroff
/* Sleep only */
&suspend_l_sleep
>;
buttons {
ap_lid_int_l: ap-lid-int-l {
rockchip,pins = <0 6 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
charger {
ac_present_ap: ac-present-ap {
rockchip,pins = <0 8 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
cros-ec {
ec_int: ec-int {
rockchip,pins = <7 7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
suspend {
suspend_l_wake: suspend-l-wake {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_low>;
};
suspend_l_sleep: suspend-l-sleep {
rockchip,pins = <0 17 RK_FUNC_GPIO &pcfg_output_high>;
};
};
trackpad {
trackpad_int: trackpad-int {
rockchip,pins = <7 3 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb-host {
host1_pwr_en: host1-pwr-en {
rockchip,pins = <0 11 RK_FUNC_GPIO &pcfg_pull_none>;
};
usbotg_pwren_h: usbotg-pwren-h {
rockchip,pins = <0 12 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
#include "cros-ec-keyboard.dtsi"

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/*
* Google Veyron Jerry Rev 3+ board device tree source
*
* Copyright 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "rk3288-veyron-chromebook.dtsi"
#include "cros-ec-sbs.dtsi"
/ {
model = "Google Jerry";
compatible = "google,veyron-jerry-rev7", "google,veyron-jerry-rev6",
"google,veyron-jerry-rev5", "google,veyron-jerry-rev4",
"google,veyron-jerry-rev3", "google,veyron-jerry",
"google,veyron", "rockchip,rk3288";
panel_regulator: panel-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio7 14 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_h>;
regulator-name = "panel_regulator";
vin-supply = <&vcc33_sys>;
};
vcc18_lcd: vcc18-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&avdd_1v8_disp_en>;
regulator-name = "vcc18_lcd";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc18_wl>;
};
backlight_regulator: backlight-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_pwr_en>;
regulator-name = "backlight_regulator";
vin-supply = <&vcc33_sys>;
startup-delay-us = <15000>;
};
};
&rk808 {
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
regulators {
mic_vcc: LDO_REG2 {
regulator-name = "mic_vcc";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
};
};
&sdmmc {
disable-wp;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
&sdmmc_bus4>;
};
&vcc_5v {
enable-active-high;
gpio = <&gpio7 21 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&drv_5v>;
};
&vcc50_hdmi {
enable-active-high;
gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&vcc50_hdmi_en>;
};
&pinctrl {
backlight {
bl_pwr_en: bl_pwr_en {
rockchip,pins = <2 12 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
buck-5v {
drv_5v: drv-5v {
rockchip,pins = <7 21 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
hdmi {
vcc50_hdmi_en: vcc50-hdmi-en {
rockchip,pins = <5 19 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
lcd {
lcd_enable_h: lcd-en {
rockchip,pins = <7 14 RK_FUNC_GPIO &pcfg_pull_none>;
};
avdd_1v8_disp_en: avdd-1v8-disp-en {
rockchip,pins = <2 13 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
dvs_1: dvs-1 {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>;
};
dvs_2: dvs-2 {
rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>;
};
};
};
&i2c4 {
status = "okay";
/*
* Trackpad pin control is shared between Elan and Synaptics devices
* so we have to pull it up to the bus level.
*/
pinctrl-names = "default";
pinctrl-0 = <&i2c4_xfer &trackpad_int>;
trackpad@15 {
/*
* Remove the inherited pinctrl settings to avoid clashing
* with bus-wide ones.
*/
/delete-property/pinctrl-names;
/delete-property/pinctrl-0;
};
trackpad@2c {
compatible = "hid-over-i2c";
interrupt-parent = <&gpio7>;
interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
reg = <0x2c>;
hid-descr-addr = <0x0020>;
vcc-supply = <&vcc33_io>;
wakeup-source;
};
};

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/*
* Google Veyron Pinky Rev 2 board device tree source
*
* Copyright 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "rk3288-veyron-chromebook.dtsi"
#include "cros-ec-sbs.dtsi"
/ {
model = "Google Pinky";
compatible = "google,veyron-pinky-rev2", "google,veyron-pinky",
"google,veyron", "rockchip,rk3288";
/delete-node/emmc-pwrseq;
};
&emmc {
/*
* Use a pullup instead of a drive since the output is 3.3V and
* really should be 1.8V (oops). The external pulldown will help
* bring the voltage down if we only drive with a pullup here.
* Therefore disable the powerseq (and actual reset) for pinky.
*/
/delete-property/mmc-pwrseq;
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_reset>;
};
&gpio_keys {
pinctrl-0 = <&pwr_key_h &ap_lid_int_l>;
power {
gpios = <&gpio0 5 GPIO_ACTIVE_HIGH>;
};
};
/* Touchpad connector */
&i2c3 {
status = "okay";
clock-frequency = <400000>;
i2c-scl-falling-time-ns = <50>;
i2c-scl-rising-time-ns = <300>;
};
&pinctrl {
buttons {
pwr_key_h: pwr-key-h {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
emmc {
emmc_reset: emmc-reset {
rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdmmc {
sdmmc_wp_gpio: sdmmc-wp-gpio {
rockchip,pins = <7 10 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
};
&rk808 {
regulators {
vcc18_lcd: SWITCH_REG2 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vcc18_lcd";
regulator-state-mem {
regulator-on-in-suspend;
};
};
};
};
&sdmmc {
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_gpio
&sdmmc_wp_gpio &sdmmc_bus4>;
wp-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
};
&tsadc {
/* Some connection is flaky making the tsadc hang the system */
status = "disabled";
};

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/*
* Google Veyron (and derivatives) fragment for sdmmc cards
*
* Copyright 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
&io_domains {
sdcard-supply = <&vccio_sd>;
};
&pinctrl {
sdmmc {
/*
* We run sdmmc at max speed; bump up drive strength.
* We also have external pulls, so disable the internal ones.
*/
sdmmc_bus4: sdmmc-bus4 {
rockchip,pins = <6 16 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<6 17 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<6 18 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<6 19 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_clk: sdmmc-clk {
rockchip,pins = <6 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdmmc_cmd: sdmmc-cmd {
rockchip,pins = <6 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
/*
* Builtin CD line is hooked to ground to prevent JTAG at boot
* (and also to get the voltage rail correct).
* Configure gpio6_C6 as GPIO so dw_mmc builtin CD doesn't
* think there's a card inserted
*/
sdmmc_cd_disabled: sdmmc-cd-disabled {
rockchip,pins = <6 22 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* This is where we actually hook up CD */
sdmmc_cd_gpio: sdmmc-cd-gpio {
rockchip,pins = <7 5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&rk808 {
vcc9-supply = <&vcc_5v>;
regulators {
vccio_sd: LDO_REG4 {
regulator-name = "vccio_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc33_sd: LDO_REG5 {
regulator-name = "vcc33_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
};
};
};
};
&sdmmc {
status = "okay";
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
card-detect-delay = <200>;
cd-gpios = <&gpio7 5 GPIO_ACTIVE_LOW>;
num-slots = <1>;
vmmc-supply = <&vcc33_sd>;
vqmmc-supply = <&vccio_sd>;
};

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/*
* Google Veyron (and derivatives) board device tree source
*
* Copyright 2015 Google, Inc
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/clock/rockchip,rk808.h>
#include <dt-bindings/input/input.h>
#include "rk3288.dtsi"
/ {
memory {
device_type = "memory";
reg = <0x0 0x80000000>;
};
gpio_keys: gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pwr_key_l>;
power {
label = "Power";
gpios = <&gpio0 5 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <100>;
gpio-key,wakeup;
};
};
gpio-restart {
compatible = "gpio-restart";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ap_warm_reset_h>;
priority = <200>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
pinctrl-0 = <&emmc_reset>;
pinctrl-names = "default";
reset-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
};
io_domains: io-domains {
compatible = "rockchip,rk3288-io-voltage-domain";
rockchip,grf = <&grf>;
bb-supply = <&vcc33_io>;
dvp-supply = <&vcc_18>;
flash0-supply = <&vcc18_flashio>;
gpio1830-supply = <&vcc33_io>;
gpio30-supply = <&vcc33_io>;
lcdc-supply = <&vcc33_lcd>;
wifi-supply = <&vcc18_wl>;
};
sdio_pwrseq: sdio-pwrseq {
compatible = "mmc-pwrseq-simple";
clocks = <&rk808 RK808_CLKOUT1>;
clock-names = "ext_clock";
pinctrl-names = "default";
pinctrl-0 = <&bt_enable_l>, <&wifi_enable_h>;
/*
* On the module itself this is one of these (depending
* on the actual card populated):
* - SDIO_RESET_L_WL_REG_ON
* - PDN (power down when low)
*/
reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>;
};
vcc_5v: vcc-5v {
compatible = "regulator-fixed";
regulator-name = "vcc_5v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
vcc33_sys: vcc33-sys {
compatible = "regulator-fixed";
regulator-name = "vcc33_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
vcc50_hdmi: vcc50-hdmi {
compatible = "regulator-fixed";
regulator-name = "vcc50_hdmi";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc_5v>;
};
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
};
&emmc {
status = "okay";
broken-cd;
bus-width = <8>;
cap-mmc-highspeed;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
};
&hdmi {
status = "okay";
};
&i2c0 {
status = "okay";
clock-frequency = <400000>;
i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
i2c-scl-rising-time-ns = <100>; /* 45ns measured */
rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
clock-output-names = "xin32k", "wifibt_32kin";
interrupt-parent = <&gpio0>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
#clock-cells = <1>;
vcc1-supply = <&vcc33_sys>;
vcc2-supply = <&vcc33_sys>;
vcc3-supply = <&vcc33_sys>;
vcc4-supply = <&vcc33_sys>;
vcc6-supply = <&vcc_5v>;
vcc7-supply = <&vcc33_sys>;
vcc8-supply = <&vcc33_sys>;
vcc12-supply = <&vcc_18>;
vddio-supply = <&vcc33_io>;
regulators {
vdd_cpu: DCDC_REG1 {
regulator-name = "vdd_arm";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <750000>;
regulator-max-microvolt = <1450000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vdd_gpu: DCDC_REG2 {
regulator-name = "vdd_gpu";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1250000>;
regulator-ramp-delay = <6001>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vcc135_ddr: DCDC_REG3 {
regulator-name = "vcc135_ddr";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
/*
* vcc_18 has several aliases. (vcc18_flashio and
* vcc18_wl). We'll add those aliases here just to
* make it easier to follow the schematic. The signals
* are actually hooked together and only separated for
* power measurement purposes).
*/
vcc18_wl: vcc18_flashio: vcc_18: DCDC_REG4 {
regulator-name = "vcc_18";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
/*
* Note that both vcc33_io and vcc33_pmuio are always
* powered together. To simplify the logic in the dts
* we just refer to vcc33_io every time something is
* powered from vcc33_pmuio. In fact, on later boards
* (such as danger) they're the same net.
*/
vcc33_io: LDO_REG1 {
regulator-name = "vcc33_io";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vdd_10: LDO_REG3 {
regulator-name = "vdd_10";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vdd10_lcd_pwren_h: LDO_REG7 {
regulator-name = "vdd10_lcd_pwren_h";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-state-mem {
regulator-off-in-suspend;
};
};
vcc33_lcd: SWITCH_REG1 {
regulator-name = "vcc33_lcd";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-off-in-suspend;
};
};
};
};
};
&i2c1 {
status = "okay";
clock-frequency = <400000>;
i2c-scl-falling-time-ns = <50>; /* 2.5ns measured */
i2c-scl-rising-time-ns = <100>; /* 40ns measured */
tpm: tpm@20 {
compatible = "infineon,slb9645tt";
reg = <0x20>;
powered-while-suspended;
};
};
&i2c2 {
status = "okay";
/* 100kHz since 4.7k resistors don't rise fast enough */
clock-frequency = <100000>;
i2c-scl-falling-time-ns = <50>; /* 10ns measured */
i2c-scl-rising-time-ns = <800>; /* 600ns measured */
};
&i2c4 {
status = "okay";
clock-frequency = <400000>;
i2c-scl-falling-time-ns = <50>; /* 11ns measured */
i2c-scl-rising-time-ns = <300>; /* 225ns measured */
};
&i2c5 {
status = "okay";
clock-frequency = <100000>;
i2c-scl-falling-time-ns = <300>;
i2c-scl-rising-time-ns = <1000>;
};
&pwm1 {
status = "okay";
};
&sdio0 {
status = "okay";
broken-cd;
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
num-slots = <1>;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_clk &sdio0_cmd &sdio0_bus4>;
vmmc-supply = <&vcc33_sys>;
vqmmc-supply = <&vcc18_wl>;
};
&spi2 {
status = "okay";
rx-sample-delay-ns = <12>;
};
&tsadc {
status = "okay";
tsadc-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */
tsadc-tshut-polarity = <1>; /* tshut polarity 0:LOW 1:HIGH */
};
&uart0 {
status = "okay";
/* We need to go faster than 24MHz, so adjust clock parents / rates */
assigned-clocks = <&cru SCLK_UART0>;
assigned-clock-rates = <48000000>;
/* Pins don't include flow control by default; add that in */
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
};
&uart1 {
status = "okay";
};
&uart2 {
status = "okay";
};
&usbphy {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
needs-reset-on-resume;
};
&usb_host1 {
status = "okay";
};
&usb_otg {
status = "okay";
assigned-clocks = <&cru SCLK_USBPHY480M_SRC>;
assigned-clock-parents = <&cru SCLK_OTGPHY0>;
dr_mode = "host";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&wdt {
status = "okay";
};
&pinctrl {
pinctrl-names = "default", "sleep";
pinctrl-0 = <
/* Common for sleep and wake, but no owners */
&global_pwroff
>;
pinctrl-1 = <
/* Common for sleep and wake, but no owners */
&global_pwroff
>;
pcfg_pull_none_drv_8ma: pcfg-pull-none-drv-8ma {
bias-disable;
drive-strength = <8>;
};
pcfg_pull_up_drv_8ma: pcfg-pull-up-drv-8ma {
bias-pull-up;
drive-strength = <8>;
};
pcfg_output_high: pcfg-output-high {
output-high;
};
pcfg_output_low: pcfg-output-low {
output-low;
};
buttons {
pwr_key_l: pwr-key-l {
rockchip,pins = <0 5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
emmc {
emmc_reset: emmc-reset {
rockchip,pins = <2 9 RK_FUNC_GPIO &pcfg_pull_none>;
};
/*
* We run eMMC at max speed; bump up drive strength.
* We also have external pulls, so disable the internal ones.
*/
emmc_clk: emmc-clk {
rockchip,pins = <3 18 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <3 16 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
emmc_bus8: emmc-bus8 {
rockchip,pins = <3 0 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 1 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 2 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 3 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 4 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 5 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 6 RK_FUNC_2 &pcfg_pull_none_drv_8ma>,
<3 7 RK_FUNC_2 &pcfg_pull_none_drv_8ma>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
reboot {
ap_warm_reset_h: ap-warm-reset-h {
rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
recovery-switch {
rec_mode_l: rec-mode-l {
rockchip,pins = <0 9 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdio0 {
wifi_enable_h: wifienable-h {
rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>;
};
/* NOTE: mislabelled on schematic; should be bt_enable_h */
bt_enable_l: bt-enable-l {
rockchip,pins = <4 29 RK_FUNC_GPIO &pcfg_pull_none>;
};
/*
* We run sdio0 at max speed; bump up drive strength.
* We also have external pulls, so disable the internal ones.
*/
sdio0_bus4: sdio0-bus4 {
rockchip,pins = <4 20 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<4 21 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<4 22 RK_FUNC_1 &pcfg_pull_none_drv_8ma>,
<4 23 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdio0_cmd: sdio0-cmd {
rockchip,pins = <4 24 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
sdio0_clk: sdio0-clk {
rockchip,pins = <4 25 RK_FUNC_1 &pcfg_pull_none_drv_8ma>;
};
};
tpm {
tpm_int_h: tpm-int-h {
rockchip,pins = <7 4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
/*
* On Marvell-based hardware this is a no-connect. Make sure we enable
* the pullup so that the line doesn't float. The pullup shouldn't
* hurt on Broadcom-based hardware since the other side is actively
* driving this signal. As proof: we've already got a pullup on RX.
*/
uart0 {
uart0_cts: uart0-cts {
rockchip,pins = <4 18 RK_FUNC_1 &pcfg_pull_up>;
};
};
write-protect {
fw_wp_ap: fw-wp-ap {
rockchip,pins = <7 6 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

11
arch/arm/boot/dts/rk3288.dtsi
View File

@ -78,6 +78,7 @@
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
};
cpus {
@ -110,19 +111,19 @@
clock-latency = <40000>;
clocks = <&cru ARMCLK>;
};
cpu@501 {
cpu1: cpu@501 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x501>;
resets = <&cru SRST_CORE1>;
};
cpu@502 {
cpu2: cpu@502 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x502>;
resets = <&cru SRST_CORE2>;
};
cpu@503 {
cpu3: cpu@503 {
device_type = "cpu";
compatible = "arm,cortex-a12";
reg = <0x503>;
@ -447,6 +448,8 @@
"mac_clk_rx", "mac_clk_tx",
"clk_mac_ref", "clk_mac_refout",
"aclk_mac", "pclk_mac";
resets = <&cru SRST_MAC>;
reset-names = "stmmaceth";
status = "disabled";
};
@ -626,7 +629,7 @@
compatible = "rockchip,rk3288-wdt", "snps,dw-wdt";
reg = <0xff800000 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};