Merge branch 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (133 commits) ARM: EXYNOS4: Change devname for FIMD clkdev ARM: S3C64XX: Cleanup mach/regs-fb.h from mach-s3c64xx ARM: S5PV210: Cleanup mach/regs-fb.h from mach-s5pv210 ARM: S5PC100: Cleanup mach/regs-fb.h from mach-s5pc100 ARM: S3C24XX: Use generic s3c_set_platdata for devices ARM: S3C64XX: Use generic s3c_set_platdata for OneNAND ARM: SAMSUNG: Use generic s3c_set_platdata for NAND ARM: SAMSUNG: Use generic s3c_set_platdata for USB OHCI ARM: SAMSUNG: Use generic s3c_set_platdata for HWMON ARM: SAMSUNG: Use generic s3c_set_platdata for FB ARM: SAMSUNG: Use generic s3c_set_platdata for TS ARM: S3C64XX: Add PWM backlight support on SMDK6410 ARM: S5P64X0: Add PWM backlight support on SMDK6450 ARM: S5P64X0: Add PWM backlight support on SMDK6440 ARM: S5PC100: Add PWM backlight support on SMDKC100 ARM: S5PV210: Add PWM backlight support on SMDKV210 ARM: EXYNOS4: Add PWM backlight support on SMDKC210 ARM: EXYNOS4: Add PWM backlight support on SMDKV310 ARM: SAMSUNG: Create a common infrastructure for PWM backlight support clocksource: convert 32-bit down counting clocksource on S5PV210/S5P64X0 ... Fix up trivial conflict in arch/arm/mach-imx/mach-scb9328.c
This commit is contained in:
commit
ae4c42e4e4
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@ -686,6 +686,7 @@ config ARCH_S3C2410
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|||
select GENERIC_GPIO
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||||
select ARCH_HAS_CPUFREQ
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select ARCH_USES_GETTIMEOFFSET
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select HAVE_S3C2410_I2C if I2C
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help
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@ -703,6 +704,7 @@ config ARCH_S3C64XX
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select CPU_V6
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select ARM_VIC
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select NO_IOPORT
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select ARCH_USES_GETTIMEOFFSET
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select ARCH_HAS_CPUFREQ
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@ -727,6 +729,8 @@ config ARCH_S5P64X0
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select CPU_V6
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select GENERIC_GPIO
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select HAVE_S3C2410_WATCHDOG if WATCHDOG
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select GENERIC_CLOCKEVENTS
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select HAVE_SCHED_CLOCK
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@ -740,6 +744,7 @@ config ARCH_S5PC100
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bool "Samsung S5PC100"
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select GENERIC_GPIO
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select CPU_V7
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select ARM_L1_CACHE_SHIFT_6
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select ARCH_USES_GETTIMEOFFSET
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@ -755,6 +760,8 @@ config ARCH_S5PV210
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select ARCH_SPARSEMEM_ENABLE
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select GENERIC_GPIO
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select ARM_L1_CACHE_SHIFT_6
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select ARCH_HAS_CPUFREQ
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select GENERIC_CLOCKEVENTS
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@ -771,6 +778,7 @@ config ARCH_EXYNOS4
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select ARCH_SPARSEMEM_ENABLE
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select GENERIC_GPIO
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select HAVE_CLK
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select CLKDEV_LOOKUP
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select ARCH_HAS_CPUFREQ
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select GENERIC_CLOCKEVENTS
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select HAVE_S3C_RTC if RTC_CLASS
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@ -856,6 +864,7 @@ config ARCH_OMAP
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select HAVE_CLK
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select ARCH_REQUIRE_GPIOLIB
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select ARCH_HAS_CPUFREQ
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select HAVE_SCHED_CLOCK
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select ARCH_HAS_HOLES_MEMORYMODEL
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|
|
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@ -5,7 +5,6 @@ CONFIG_SYSVIPC=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=18
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CONFIG_SYSFS_DEPRECATED_V2=y
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CONFIG_BLK_DEV_INITRD=y
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# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
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CONFIG_MODULES=y
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|
@ -13,6 +12,7 @@ CONFIG_MODULE_UNLOAD=y
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CONFIG_MODULE_FORCE_UNLOAD=y
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# CONFIG_BLK_DEV_BSG is not set
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CONFIG_ARCH_PXA=y
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CONFIG_GPIO_PCA953X=y
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CONFIG_MACH_CM_X300=y
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CONFIG_NO_HZ=y
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CONFIG_AEABI=y
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@ -23,7 +23,6 @@ CONFIG_CMDLINE="root=/dev/mtdblock5 rootfstype=ubifs console=ttyS2,38400"
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CONFIG_CPU_FREQ=y
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CONFIG_CPU_FREQ_GOV_USERSPACE=y
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CONFIG_FPE_NWFPE=y
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CONFIG_PM=y
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CONFIG_APM_EMULATION=y
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CONFIG_NET=y
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CONFIG_PACKET=y
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|
@ -40,8 +39,8 @@ CONFIG_IP_PNP_RARP=y
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# CONFIG_INET_DIAG is not set
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# CONFIG_IPV6 is not set
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CONFIG_BT=m
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CONFIG_BT_L2CAP=m
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CONFIG_BT_SCO=m
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CONFIG_BT_L2CAP=y
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CONFIG_BT_SCO=y
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CONFIG_BT_RFCOMM=m
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CONFIG_BT_RFCOMM_TTY=y
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CONFIG_BT_BNEP=m
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|
@ -60,7 +59,6 @@ CONFIG_MTD_NAND_PXA3xx=y
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CONFIG_MTD_UBI=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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# CONFIG_MISC_DEVICES is not set
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CONFIG_SCSI=y
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CONFIG_BLK_DEV_SD=y
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||||
CONFIG_NETDEVICES=y
|
||||
|
@ -81,16 +79,15 @@ CONFIG_TOUCHSCREEN_WM97XX=m
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|||
# CONFIG_TOUCHSCREEN_WM9705 is not set
|
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# CONFIG_TOUCHSCREEN_WM9713 is not set
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||||
# CONFIG_SERIO is not set
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# CONFIG_LEGACY_PTYS is not set
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CONFIG_SERIAL_PXA=y
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CONFIG_SERIAL_PXA_CONSOLE=y
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||||
# CONFIG_LEGACY_PTYS is not set
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C=y
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CONFIG_I2C_PXA=y
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CONFIG_SPI=y
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CONFIG_SPI_GPIO=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_GPIO_PCA953X=y
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# CONFIG_HWMON is not set
|
||||
CONFIG_PMIC_DA903X=y
|
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CONFIG_REGULATOR=y
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||||
|
@ -102,7 +99,6 @@ CONFIG_LCD_CLASS_DEVICE=y
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|||
CONFIG_LCD_TDO24M=y
|
||||
# CONFIG_BACKLIGHT_GENERIC is not set
|
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CONFIG_BACKLIGHT_DA903X=m
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
CONFIG_FONTS=y
|
||||
|
@ -131,7 +127,6 @@ CONFIG_HID_GREENASIA=y
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|||
CONFIG_HID_SMARTJOYPLUS=y
|
||||
CONFIG_HID_TOPSEED=y
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||||
CONFIG_HID_THRUSTMASTER=y
|
||||
CONFIG_HID_WACOM=m
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CONFIG_HID_ZEROPLUS=y
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CONFIG_USB=y
|
||||
CONFIG_USB_DEVICEFS=y
|
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|
@ -152,7 +147,6 @@ CONFIG_RTC_DRV_PXA=y
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|||
CONFIG_EXT2_FS=y
|
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CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_MSDOS_FS=m
|
||||
CONFIG_VFAT_FS=m
|
||||
CONFIG_TMPFS=y
|
||||
|
@ -164,7 +158,6 @@ CONFIG_NFS_V3=y
|
|||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_SMB_FS=m
|
||||
CONFIG_CIFS=m
|
||||
CONFIG_CIFS_WEAK_PW_HASH=y
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
|
@ -172,9 +165,7 @@ CONFIG_NLS_CODEPAGE_437=m
|
|||
CONFIG_NLS_ISO8859_1=m
|
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CONFIG_DEBUG_FS=y
|
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CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DETECT_SOFTLOCKUP is not set
|
||||
# CONFIG_SCHED_DEBUG is not set
|
||||
# CONFIG_RCU_CPU_STALL_DETECTOR is not set
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
# CONFIG_FTRACE is not set
|
||||
CONFIG_DEBUG_USER=y
|
||||
|
@ -182,7 +173,6 @@ CONFIG_DEBUG_LL=y
|
|||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_MICHAEL_MIC=m
|
||||
CONFIG_CRYPTO_AES=m
|
||||
CONFIG_CRYPTO_ARC4=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
# CONFIG_CRYPTO_HW is not set
|
||||
CONFIG_CRC_T10DIF=y
|
||||
|
|
|
@ -61,7 +61,6 @@ struct scoop_pcmcia_dev {
|
|||
struct scoop_pcmcia_config {
|
||||
struct scoop_pcmcia_dev *devs;
|
||||
int num_devs;
|
||||
void (*pcmcia_init)(void);
|
||||
void (*power_ctrl)(struct device *scoop, unsigned short cpr, int nr);
|
||||
};
|
||||
|
||||
|
|
|
@ -719,9 +719,15 @@ static void __init cdce_clk_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
#define DM6467T_EVM_REF_FREQ 33000000
|
||||
|
||||
static void __init davinci_map_io(void)
|
||||
{
|
||||
dm646x_init();
|
||||
|
||||
if (machine_is_davinci_dm6467tevm())
|
||||
davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
|
||||
|
||||
cdce_clk_init();
|
||||
}
|
||||
|
||||
|
@ -785,17 +791,6 @@ static __init void evm_init(void)
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|||
soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
|
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}
|
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|
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#define DM646X_EVM_REF_FREQ 27000000
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#define DM6467T_EVM_REF_FREQ 33000000
|
||||
|
||||
void __init dm646x_board_setup_refclk(struct clk *clk)
|
||||
{
|
||||
if (machine_is_davinci_dm6467tevm())
|
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clk->rate = DM6467T_EVM_REF_FREQ;
|
||||
else
|
||||
clk->rate = DM646X_EVM_REF_FREQ;
|
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}
|
||||
|
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MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
|
||||
.boot_params = (0x80000100),
|
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.map_io = davinci_map_io,
|
||||
|
|
|
@ -368,6 +368,12 @@ static unsigned long clk_leafclk_recalc(struct clk *clk)
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|||
return clk->parent->rate;
|
||||
}
|
||||
|
||||
int davinci_simple_set_rate(struct clk *clk, unsigned long rate)
|
||||
{
|
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clk->rate = rate;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static unsigned long clk_pllclk_recalc(struct clk *clk)
|
||||
{
|
||||
u32 ctrl, mult = 1, prediv = 1, postdiv = 1;
|
||||
|
@ -506,6 +512,38 @@ int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
|
|||
}
|
||||
EXPORT_SYMBOL(davinci_set_pllrate);
|
||||
|
||||
/**
|
||||
* davinci_set_refclk_rate() - Set the reference clock rate
|
||||
* @rate: The new rate.
|
||||
*
|
||||
* Sets the reference clock rate to a given value. This will most likely
|
||||
* result in the entire clock tree getting updated.
|
||||
*
|
||||
* This is used to support boards which use a reference clock different
|
||||
* than that used by default in <soc>.c file. The reference clock rate
|
||||
* should be updated early in the boot process; ideally soon after the
|
||||
* clock tree has been initialized once with the default reference clock
|
||||
* rate (davinci_common_init()).
|
||||
*
|
||||
* Returns 0 on success, error otherwise.
|
||||
*/
|
||||
int davinci_set_refclk_rate(unsigned long rate)
|
||||
{
|
||||
struct clk *refclk;
|
||||
|
||||
refclk = clk_get(NULL, "ref");
|
||||
if (IS_ERR(refclk)) {
|
||||
pr_err("%s: failed to get reference clock.\n", __func__);
|
||||
return PTR_ERR(refclk);
|
||||
}
|
||||
|
||||
clk_set_rate(refclk, rate);
|
||||
|
||||
clk_put(refclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init davinci_clk_init(struct clk_lookup *clocks)
|
||||
{
|
||||
struct clk_lookup *c;
|
||||
|
|
|
@ -123,6 +123,8 @@ int davinci_clk_init(struct clk_lookup *clocks);
|
|||
int davinci_set_pllrate(struct pll_data *pll, unsigned int prediv,
|
||||
unsigned int mult, unsigned int postdiv);
|
||||
int davinci_set_sysclk_rate(struct clk *clk, unsigned long rate);
|
||||
int davinci_set_refclk_rate(unsigned long rate);
|
||||
int davinci_simple_set_rate(struct clk *clk, unsigned long rate);
|
||||
|
||||
extern struct platform_device davinci_wdt_device;
|
||||
extern void davinci_watchdog_reset(struct platform_device *);
|
||||
|
|
|
@ -43,6 +43,7 @@
|
|||
/*
|
||||
* Device specific clocks
|
||||
*/
|
||||
#define DM646X_REF_FREQ 27000000
|
||||
#define DM646X_AUX_FREQ 24000000
|
||||
|
||||
static struct pll_data pll1_data = {
|
||||
|
@ -57,6 +58,8 @@ static struct pll_data pll2_data = {
|
|||
|
||||
static struct clk ref_clk = {
|
||||
.name = "ref_clk",
|
||||
.rate = DM646X_REF_FREQ,
|
||||
.set_rate = davinci_simple_set_rate,
|
||||
};
|
||||
|
||||
static struct clk aux_clkin = {
|
||||
|
@ -902,7 +905,6 @@ int __init dm646x_init_edma(struct edma_rsv_info *rsv)
|
|||
|
||||
void __init dm646x_init(void)
|
||||
{
|
||||
dm646x_board_setup_refclk(&ref_clk);
|
||||
davinci_common_init(&davinci_soc_info_dm646x);
|
||||
}
|
||||
|
||||
|
|
|
@ -15,7 +15,6 @@
|
|||
#include <mach/asp.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/davinci_emac.h>
|
||||
|
||||
#define DM646X_EMAC_BASE (0x01C80000)
|
||||
|
@ -31,7 +30,6 @@
|
|||
void __init dm646x_init(void);
|
||||
void __init dm646x_init_mcasp0(struct snd_platform_data *pdata);
|
||||
void __init dm646x_init_mcasp1(struct snd_platform_data *pdata);
|
||||
void __init dm646x_board_setup_refclk(struct clk *clk);
|
||||
int __init dm646x_init_edma(struct edma_rsv_info *rsv);
|
||||
|
||||
void dm646x_video_init(void);
|
||||
|
|
|
@ -110,6 +110,8 @@ config MACH_SMDKC210
|
|||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select EXYNOS4_DEV_PD
|
||||
select EXYNOS4_DEV_SYSMMU
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
|
@ -127,8 +129,10 @@ config MACH_SMDKV310
|
|||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select EXYNOS4_DEV_PD
|
||||
select SAMSUNG_DEV_PWM
|
||||
select EXYNOS4_DEV_SYSMMU
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_KEYPAD
|
||||
|
|
|
@ -27,24 +27,20 @@
|
|||
|
||||
static struct clk clk_sclk_hdmi27m = {
|
||||
.name = "sclk_hdmi27m",
|
||||
.id = -1,
|
||||
.rate = 27000000,
|
||||
};
|
||||
|
||||
static struct clk clk_sclk_hdmiphy = {
|
||||
.name = "sclk_hdmiphy",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static struct clk clk_sclk_usbphy0 = {
|
||||
.name = "sclk_usbphy0",
|
||||
.id = -1,
|
||||
.rate = 27000000,
|
||||
};
|
||||
|
||||
static struct clk clk_sclk_usbphy1 = {
|
||||
.name = "sclk_usbphy1",
|
||||
.id = -1,
|
||||
};
|
||||
|
||||
static int exynos4_clksrc_mask_top_ctrl(struct clk *clk, int enable)
|
||||
|
@ -132,7 +128,6 @@ static int exynos4_clk_ip_perir_ctrl(struct clk *clk, int enable)
|
|||
static struct clksrc_clk clk_mout_apll = {
|
||||
.clk = {
|
||||
.name = "mout_apll",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clk_src_apll,
|
||||
.reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 },
|
||||
|
@ -141,7 +136,6 @@ static struct clksrc_clk clk_mout_apll = {
|
|||
static struct clksrc_clk clk_sclk_apll = {
|
||||
.clk = {
|
||||
.name = "sclk_apll",
|
||||
.id = -1,
|
||||
.parent = &clk_mout_apll.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 },
|
||||
|
@ -150,7 +144,6 @@ static struct clksrc_clk clk_sclk_apll = {
|
|||
static struct clksrc_clk clk_mout_epll = {
|
||||
.clk = {
|
||||
.name = "mout_epll",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clk_src_epll,
|
||||
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 4, .size = 1 },
|
||||
|
@ -159,7 +152,6 @@ static struct clksrc_clk clk_mout_epll = {
|
|||
static struct clksrc_clk clk_mout_mpll = {
|
||||
.clk = {
|
||||
.name = "mout_mpll",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clk_src_mpll,
|
||||
.reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 8, .size = 1 },
|
||||
|
@ -178,7 +170,6 @@ static struct clksrc_sources clkset_moutcore = {
|
|||
static struct clksrc_clk clk_moutcore = {
|
||||
.clk = {
|
||||
.name = "moutcore",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_moutcore,
|
||||
.reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 16, .size = 1 },
|
||||
|
@ -187,7 +178,6 @@ static struct clksrc_clk clk_moutcore = {
|
|||
static struct clksrc_clk clk_coreclk = {
|
||||
.clk = {
|
||||
.name = "core_clk",
|
||||
.id = -1,
|
||||
.parent = &clk_moutcore.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 0, .size = 3 },
|
||||
|
@ -196,7 +186,6 @@ static struct clksrc_clk clk_coreclk = {
|
|||
static struct clksrc_clk clk_armclk = {
|
||||
.clk = {
|
||||
.name = "armclk",
|
||||
.id = -1,
|
||||
.parent = &clk_coreclk.clk,
|
||||
},
|
||||
};
|
||||
|
@ -204,7 +193,6 @@ static struct clksrc_clk clk_armclk = {
|
|||
static struct clksrc_clk clk_aclk_corem0 = {
|
||||
.clk = {
|
||||
.name = "aclk_corem0",
|
||||
.id = -1,
|
||||
.parent = &clk_coreclk.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 },
|
||||
|
@ -213,7 +201,6 @@ static struct clksrc_clk clk_aclk_corem0 = {
|
|||
static struct clksrc_clk clk_aclk_cores = {
|
||||
.clk = {
|
||||
.name = "aclk_cores",
|
||||
.id = -1,
|
||||
.parent = &clk_coreclk.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 4, .size = 3 },
|
||||
|
@ -222,7 +209,6 @@ static struct clksrc_clk clk_aclk_cores = {
|
|||
static struct clksrc_clk clk_aclk_corem1 = {
|
||||
.clk = {
|
||||
.name = "aclk_corem1",
|
||||
.id = -1,
|
||||
.parent = &clk_coreclk.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 8, .size = 3 },
|
||||
|
@ -231,7 +217,6 @@ static struct clksrc_clk clk_aclk_corem1 = {
|
|||
static struct clksrc_clk clk_periphclk = {
|
||||
.clk = {
|
||||
.name = "periphclk",
|
||||
.id = -1,
|
||||
.parent = &clk_coreclk.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 12, .size = 3 },
|
||||
|
@ -252,7 +237,6 @@ static struct clksrc_sources clkset_mout_corebus = {
|
|||
static struct clksrc_clk clk_mout_corebus = {
|
||||
.clk = {
|
||||
.name = "mout_corebus",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_mout_corebus,
|
||||
.reg_src = { .reg = S5P_CLKSRC_DMC, .shift = 4, .size = 1 },
|
||||
|
@ -261,7 +245,6 @@ static struct clksrc_clk clk_mout_corebus = {
|
|||
static struct clksrc_clk clk_sclk_dmc = {
|
||||
.clk = {
|
||||
.name = "sclk_dmc",
|
||||
.id = -1,
|
||||
.parent = &clk_mout_corebus.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 12, .size = 3 },
|
||||
|
@ -270,7 +253,6 @@ static struct clksrc_clk clk_sclk_dmc = {
|
|||
static struct clksrc_clk clk_aclk_cored = {
|
||||
.clk = {
|
||||
.name = "aclk_cored",
|
||||
.id = -1,
|
||||
.parent = &clk_sclk_dmc.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 16, .size = 3 },
|
||||
|
@ -279,7 +261,6 @@ static struct clksrc_clk clk_aclk_cored = {
|
|||
static struct clksrc_clk clk_aclk_corep = {
|
||||
.clk = {
|
||||
.name = "aclk_corep",
|
||||
.id = -1,
|
||||
.parent = &clk_aclk_cored.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 20, .size = 3 },
|
||||
|
@ -288,7 +269,6 @@ static struct clksrc_clk clk_aclk_corep = {
|
|||
static struct clksrc_clk clk_aclk_acp = {
|
||||
.clk = {
|
||||
.name = "aclk_acp",
|
||||
.id = -1,
|
||||
.parent = &clk_mout_corebus.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 0, .size = 3 },
|
||||
|
@ -297,7 +277,6 @@ static struct clksrc_clk clk_aclk_acp = {
|
|||
static struct clksrc_clk clk_pclk_acp = {
|
||||
.clk = {
|
||||
.name = "pclk_acp",
|
||||
.id = -1,
|
||||
.parent = &clk_aclk_acp.clk,
|
||||
},
|
||||
.reg_div = { .reg = S5P_CLKDIV_DMC0, .shift = 4, .size = 3 },
|
||||
|
@ -318,7 +297,6 @@ static struct clksrc_sources clkset_aclk = {
|
|||
static struct clksrc_clk clk_aclk_200 = {
|
||||
.clk = {
|
||||
.name = "aclk_200",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_aclk,
|
||||
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 12, .size = 1 },
|
||||
|
@ -328,7 +306,6 @@ static struct clksrc_clk clk_aclk_200 = {
|
|||
static struct clksrc_clk clk_aclk_100 = {
|
||||
.clk = {
|
||||
.name = "aclk_100",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_aclk,
|
||||
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 16, .size = 1 },
|
||||
|
@ -338,7 +315,6 @@ static struct clksrc_clk clk_aclk_100 = {
|
|||
static struct clksrc_clk clk_aclk_160 = {
|
||||
.clk = {
|
||||
.name = "aclk_160",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_aclk,
|
||||
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 20, .size = 1 },
|
||||
|
@ -348,7 +324,6 @@ static struct clksrc_clk clk_aclk_160 = {
|
|||
static struct clksrc_clk clk_aclk_133 = {
|
||||
.clk = {
|
||||
.name = "aclk_133",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_aclk,
|
||||
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 24, .size = 1 },
|
||||
|
@ -368,7 +343,6 @@ static struct clksrc_sources clkset_vpllsrc = {
|
|||
static struct clksrc_clk clk_vpllsrc = {
|
||||
.clk = {
|
||||
.name = "vpll_src",
|
||||
.id = -1,
|
||||
.enable = exynos4_clksrc_mask_top_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
},
|
||||
|
@ -389,7 +363,6 @@ static struct clksrc_sources clkset_sclk_vpll = {
|
|||
static struct clksrc_clk clk_sclk_vpll = {
|
||||
.clk = {
|
||||
.name = "sclk_vpll",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_sclk_vpll,
|
||||
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
|
||||
|
@ -398,161 +371,151 @@ static struct clksrc_clk clk_sclk_vpll = {
|
|||
static struct clk init_clocks_off[] = {
|
||||
{
|
||||
.name = "timers",
|
||||
.id = -1,
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1<<24),
|
||||
}, {
|
||||
.name = "csis",
|
||||
.id = 0,
|
||||
.devname = "s5p-mipi-csis.0",
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "csis",
|
||||
.id = 1,
|
||||
.devname = "s5p-mipi-csis.1",
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 5),
|
||||
}, {
|
||||
.name = "fimc",
|
||||
.id = 0,
|
||||
.devname = "exynos4-fimc.0",
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
}, {
|
||||
.name = "fimc",
|
||||
.id = 1,
|
||||
.devname = "exynos4-fimc.1",
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 1),
|
||||
}, {
|
||||
.name = "fimc",
|
||||
.id = 2,
|
||||
.devname = "exynos4-fimc.2",
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 2),
|
||||
}, {
|
||||
.name = "fimc",
|
||||
.id = 3,
|
||||
.devname = "exynos4-fimc.3",
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
}, {
|
||||
.name = "fimd",
|
||||
.id = 0,
|
||||
.devname = "exynos4-fb.0",
|
||||
.enable = exynos4_clk_ip_lcd0_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
}, {
|
||||
.name = "fimd",
|
||||
.id = 1,
|
||||
.devname = "exynos4-fb.1",
|
||||
.enable = exynos4_clk_ip_lcd1_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
}, {
|
||||
.name = "sataphy",
|
||||
.id = -1,
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
}, {
|
||||
.name = "hsmmc",
|
||||
.id = 0,
|
||||
.devname = "s3c-sdhci.0",
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 5),
|
||||
}, {
|
||||
.name = "hsmmc",
|
||||
.id = 1,
|
||||
.devname = "s3c-sdhci.1",
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 6),
|
||||
}, {
|
||||
.name = "hsmmc",
|
||||
.id = 2,
|
||||
.devname = "s3c-sdhci.2",
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 7),
|
||||
}, {
|
||||
.name = "hsmmc",
|
||||
.id = 3,
|
||||
.devname = "s3c-sdhci.3",
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 8),
|
||||
}, {
|
||||
.name = "hsmmc",
|
||||
.id = 4,
|
||||
.name = "dwmmc",
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 9),
|
||||
}, {
|
||||
.name = "sata",
|
||||
.id = -1,
|
||||
.parent = &clk_aclk_133.clk,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 10),
|
||||
}, {
|
||||
.name = "pdma",
|
||||
.id = 0,
|
||||
.devname = "s3c-pl330.0",
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
}, {
|
||||
.name = "pdma",
|
||||
.id = 1,
|
||||
.devname = "s3c-pl330.1",
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 1),
|
||||
}, {
|
||||
.name = "adc",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 15),
|
||||
}, {
|
||||
.name = "keypad",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_perir_ctrl,
|
||||
.ctrlbit = (1 << 16),
|
||||
}, {
|
||||
.name = "rtc",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_perir_ctrl,
|
||||
.ctrlbit = (1 << 15),
|
||||
}, {
|
||||
.name = "watchdog",
|
||||
.id = -1,
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_perir_ctrl,
|
||||
.ctrlbit = (1 << 14),
|
||||
}, {
|
||||
.name = "usbhost",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl ,
|
||||
.ctrlbit = (1 << 12),
|
||||
}, {
|
||||
.name = "otg",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 13),
|
||||
}, {
|
||||
.name = "spi",
|
||||
.id = 0,
|
||||
.devname = "s3c64xx-spi.0",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 16),
|
||||
}, {
|
||||
.name = "spi",
|
||||
.id = 1,
|
||||
.devname = "s3c64xx-spi.1",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 17),
|
||||
}, {
|
||||
.name = "spi",
|
||||
.id = 2,
|
||||
.devname = "s3c64xx-spi.2",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 18),
|
||||
}, {
|
||||
.name = "iis",
|
||||
.id = 0,
|
||||
.devname = "samsung-i2s.0",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 19),
|
||||
}, {
|
||||
.name = "iis",
|
||||
.id = 1,
|
||||
.devname = "samsung-i2s.1",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 20),
|
||||
}, {
|
||||
.name = "iis",
|
||||
.id = 2,
|
||||
.devname = "samsung-i2s.2",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 21),
|
||||
}, {
|
||||
|
@ -562,125 +525,110 @@ static struct clk init_clocks_off[] = {
|
|||
.ctrlbit = (1 << 27),
|
||||
}, {
|
||||
.name = "fimg2d",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_image_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 0,
|
||||
.devname = "s3c2440-i2c.0",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 6),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 1,
|
||||
.devname = "s3c2440-i2c.1",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 7),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 2,
|
||||
.devname = "s3c2440-i2c.2",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 8),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 3,
|
||||
.devname = "s3c2440-i2c.3",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 9),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 4,
|
||||
.devname = "s3c2440-i2c.4",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 10),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 5,
|
||||
.devname = "s3c2440-i2c.5",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 11),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 6,
|
||||
.devname = "s3c2440-i2c.6",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 12),
|
||||
}, {
|
||||
.name = "i2c",
|
||||
.id = 7,
|
||||
.devname = "s3c2440-i2c.7",
|
||||
.parent = &clk_aclk_100.clk,
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 13),
|
||||
}, {
|
||||
.name = "SYSMMU_MDMA",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_image_ctrl,
|
||||
.ctrlbit = (1 << 5),
|
||||
}, {
|
||||
.name = "SYSMMU_FIMC0",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 7),
|
||||
}, {
|
||||
.name = "SYSMMU_FIMC1",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 8),
|
||||
}, {
|
||||
.name = "SYSMMU_FIMC2",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 9),
|
||||
}, {
|
||||
.name = "SYSMMU_FIMC3",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 10),
|
||||
}, {
|
||||
.name = "SYSMMU_JPEG",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_cam_ctrl,
|
||||
.ctrlbit = (1 << 11),
|
||||
}, {
|
||||
.name = "SYSMMU_FIMD0",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_lcd0_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "SYSMMU_FIMD1",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_lcd1_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "SYSMMU_PCIe",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 18),
|
||||
}, {
|
||||
.name = "SYSMMU_G2D",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_image_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
}, {
|
||||
.name = "SYSMMU_ROTATOR",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_image_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "SYSMMU_TV",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_tv_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "SYSMMU_MFC_L",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_mfc_ctrl,
|
||||
.ctrlbit = (1 << 1),
|
||||
}, {
|
||||
.name = "SYSMMU_MFC_R",
|
||||
.id = -1,
|
||||
.enable = exynos4_clk_ip_mfc_ctrl,
|
||||
.ctrlbit = (1 << 2),
|
||||
}
|
||||
|
@ -689,32 +637,32 @@ static struct clk init_clocks_off[] = {
|
|||
static struct clk init_clocks[] = {
|
||||
{
|
||||
.name = "uart",
|
||||
.id = 0,
|
||||
.devname = "s5pv210-uart.0",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 1,
|
||||
.devname = "s5pv210-uart.1",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 1),
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 2,
|
||||
.devname = "s5pv210-uart.2",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 2),
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 3,
|
||||
.devname = "s5pv210-uart.3",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 3),
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 4,
|
||||
.devname = "s5pv210-uart.4",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
}, {
|
||||
.name = "uart",
|
||||
.id = 5,
|
||||
.devname = "s5pv210-uart.5",
|
||||
.enable = exynos4_clk_ip_peril_ctrl,
|
||||
.ctrlbit = (1 << 5),
|
||||
}
|
||||
|
@ -750,7 +698,6 @@ static struct clksrc_sources clkset_mout_g2d0 = {
|
|||
static struct clksrc_clk clk_mout_g2d0 = {
|
||||
.clk = {
|
||||
.name = "mout_g2d0",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_mout_g2d0,
|
||||
.reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 0, .size = 1 },
|
||||
|
@ -769,7 +716,6 @@ static struct clksrc_sources clkset_mout_g2d1 = {
|
|||
static struct clksrc_clk clk_mout_g2d1 = {
|
||||
.clk = {
|
||||
.name = "mout_g2d1",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_mout_g2d1,
|
||||
.reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 4, .size = 1 },
|
||||
|
@ -788,7 +734,6 @@ static struct clksrc_sources clkset_mout_g2d = {
|
|||
static struct clksrc_clk clk_dout_mmc0 = {
|
||||
.clk = {
|
||||
.name = "dout_mmc0",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_group,
|
||||
.reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 0, .size = 4 },
|
||||
|
@ -798,7 +743,6 @@ static struct clksrc_clk clk_dout_mmc0 = {
|
|||
static struct clksrc_clk clk_dout_mmc1 = {
|
||||
.clk = {
|
||||
.name = "dout_mmc1",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_group,
|
||||
.reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 4, .size = 4 },
|
||||
|
@ -808,7 +752,6 @@ static struct clksrc_clk clk_dout_mmc1 = {
|
|||
static struct clksrc_clk clk_dout_mmc2 = {
|
||||
.clk = {
|
||||
.name = "dout_mmc2",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_group,
|
||||
.reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 8, .size = 4 },
|
||||
|
@ -818,7 +761,6 @@ static struct clksrc_clk clk_dout_mmc2 = {
|
|||
static struct clksrc_clk clk_dout_mmc3 = {
|
||||
.clk = {
|
||||
.name = "dout_mmc3",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_group,
|
||||
.reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 12, .size = 4 },
|
||||
|
@ -828,7 +770,6 @@ static struct clksrc_clk clk_dout_mmc3 = {
|
|||
static struct clksrc_clk clk_dout_mmc4 = {
|
||||
.clk = {
|
||||
.name = "dout_mmc4",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_group,
|
||||
.reg_src = { .reg = S5P_CLKSRC_FSYS, .shift = 16, .size = 4 },
|
||||
|
@ -839,7 +780,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
{
|
||||
.clk = {
|
||||
.name = "uclk1",
|
||||
.id = 0,
|
||||
.devname = "s5pv210-uart.0",
|
||||
.enable = exynos4_clksrc_mask_peril0_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
},
|
||||
|
@ -849,7 +790,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "uclk1",
|
||||
.id = 1,
|
||||
.devname = "s5pv210-uart.1",
|
||||
.enable = exynos4_clksrc_mask_peril0_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
},
|
||||
|
@ -859,7 +800,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "uclk1",
|
||||
.id = 2,
|
||||
.devname = "s5pv210-uart.2",
|
||||
.enable = exynos4_clksrc_mask_peril0_ctrl,
|
||||
.ctrlbit = (1 << 8),
|
||||
},
|
||||
|
@ -869,7 +810,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "uclk1",
|
||||
.id = 3,
|
||||
.devname = "s5pv210-uart.3",
|
||||
.enable = exynos4_clksrc_mask_peril0_ctrl,
|
||||
.ctrlbit = (1 << 12),
|
||||
},
|
||||
|
@ -879,7 +820,6 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_pwm",
|
||||
.id = -1,
|
||||
.enable = exynos4_clksrc_mask_peril0_ctrl,
|
||||
.ctrlbit = (1 << 24),
|
||||
},
|
||||
|
@ -889,7 +829,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_csis",
|
||||
.id = 0,
|
||||
.devname = "s5p-mipi-csis.0",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 24),
|
||||
},
|
||||
|
@ -899,7 +839,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_csis",
|
||||
.id = 1,
|
||||
.devname = "s5p-mipi-csis.1",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 28),
|
||||
},
|
||||
|
@ -909,7 +849,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_cam",
|
||||
.id = 0,
|
||||
.devname = "exynos4-fimc.0",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 16),
|
||||
},
|
||||
|
@ -919,7 +859,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_cam",
|
||||
.id = 1,
|
||||
.devname = "exynos4-fimc.1",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 20),
|
||||
},
|
||||
|
@ -929,7 +869,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimc",
|
||||
.id = 0,
|
||||
.devname = "exynos4-fimc.0",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
},
|
||||
|
@ -939,7 +879,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimc",
|
||||
.id = 1,
|
||||
.devname = "exynos4-fimc.1",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
},
|
||||
|
@ -949,7 +889,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimc",
|
||||
.id = 2,
|
||||
.devname = "exynos4-fimc.2",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 8),
|
||||
},
|
||||
|
@ -959,7 +899,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimc",
|
||||
.id = 3,
|
||||
.devname = "exynos4-fimc.3",
|
||||
.enable = exynos4_clksrc_mask_cam_ctrl,
|
||||
.ctrlbit = (1 << 12),
|
||||
},
|
||||
|
@ -969,7 +909,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimd",
|
||||
.id = 0,
|
||||
.devname = "exynos4-fb.0",
|
||||
.enable = exynos4_clksrc_mask_lcd0_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
},
|
||||
|
@ -979,7 +919,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimd",
|
||||
.id = 1,
|
||||
.devname = "exynos4-fb.1",
|
||||
.enable = exynos4_clksrc_mask_lcd1_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
},
|
||||
|
@ -989,7 +929,6 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_sata",
|
||||
.id = -1,
|
||||
.enable = exynos4_clksrc_mask_fsys_ctrl,
|
||||
.ctrlbit = (1 << 24),
|
||||
},
|
||||
|
@ -999,7 +938,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_spi",
|
||||
.id = 0,
|
||||
.devname = "s3c64xx-spi.0",
|
||||
.enable = exynos4_clksrc_mask_peril1_ctrl,
|
||||
.ctrlbit = (1 << 16),
|
||||
},
|
||||
|
@ -1009,7 +948,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_spi",
|
||||
.id = 1,
|
||||
.devname = "s3c64xx-spi.1",
|
||||
.enable = exynos4_clksrc_mask_peril1_ctrl,
|
||||
.ctrlbit = (1 << 20),
|
||||
},
|
||||
|
@ -1019,7 +958,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_spi",
|
||||
.id = 2,
|
||||
.devname = "s3c64xx-spi.2",
|
||||
.enable = exynos4_clksrc_mask_peril1_ctrl,
|
||||
.ctrlbit = (1 << 24),
|
||||
},
|
||||
|
@ -1029,7 +968,6 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_fimg2d",
|
||||
.id = -1,
|
||||
},
|
||||
.sources = &clkset_mout_g2d,
|
||||
.reg_src = { .reg = S5P_CLKSRC_IMAGE, .shift = 8, .size = 1 },
|
||||
|
@ -1037,7 +975,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_mmc",
|
||||
.id = 0,
|
||||
.devname = "s3c-sdhci.0",
|
||||
.parent = &clk_dout_mmc0.clk,
|
||||
.enable = exynos4_clksrc_mask_fsys_ctrl,
|
||||
.ctrlbit = (1 << 0),
|
||||
|
@ -1046,7 +984,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_mmc",
|
||||
.id = 1,
|
||||
.devname = "s3c-sdhci.1",
|
||||
.parent = &clk_dout_mmc1.clk,
|
||||
.enable = exynos4_clksrc_mask_fsys_ctrl,
|
||||
.ctrlbit = (1 << 4),
|
||||
|
@ -1055,7 +993,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_mmc",
|
||||
.id = 2,
|
||||
.devname = "s3c-sdhci.2",
|
||||
.parent = &clk_dout_mmc2.clk,
|
||||
.enable = exynos4_clksrc_mask_fsys_ctrl,
|
||||
.ctrlbit = (1 << 8),
|
||||
|
@ -1064,7 +1002,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_mmc",
|
||||
.id = 3,
|
||||
.devname = "s3c-sdhci.3",
|
||||
.parent = &clk_dout_mmc3.clk,
|
||||
.enable = exynos4_clksrc_mask_fsys_ctrl,
|
||||
.ctrlbit = (1 << 12),
|
||||
|
@ -1072,8 +1010,7 @@ static struct clksrc_clk clksrcs[] = {
|
|||
.reg_div = { .reg = S5P_CLKDIV_FSYS2, .shift = 24, .size = 8 },
|
||||
}, {
|
||||
.clk = {
|
||||
.name = "sclk_mmc",
|
||||
.id = 4,
|
||||
.name = "sclk_dwmmc",
|
||||
.parent = &clk_dout_mmc4.clk,
|
||||
.enable = exynos4_clksrc_mask_fsys_ctrl,
|
||||
.ctrlbit = (1 << 16),
|
||||
|
|
|
@ -0,0 +1,7 @@
|
|||
#ifndef __MACH_CLKDEV_H__
|
||||
#define __MACH_CLKDEV_H__
|
||||
|
||||
#define __clk_get(clk) ({ 1; })
|
||||
#define __clk_put(clk) do {} while (0)
|
||||
|
||||
#endif
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/smsc911x.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
@ -27,6 +28,8 @@
|
|||
#include <plat/sdhci.h>
|
||||
#include <plat/iic.h>
|
||||
#include <plat/pd.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/backlight.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
|
@ -191,6 +194,17 @@ static void __init smdkc210_smsc911x_init(void)
|
|||
(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
|
||||
}
|
||||
|
||||
/* LCD Backlight data */
|
||||
static struct samsung_bl_gpio_info smdkc210_bl_gpio_info = {
|
||||
.no = EXYNOS4_GPD0(1),
|
||||
.func = S3C_GPIO_SFN(2),
|
||||
};
|
||||
|
||||
static struct platform_pwm_backlight_data smdkc210_bl_data = {
|
||||
.pwm_id = 1,
|
||||
.pwm_period_ns = 1000,
|
||||
};
|
||||
|
||||
static void __init smdkc210_map_io(void)
|
||||
{
|
||||
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
|
||||
|
@ -210,6 +224,8 @@ static void __init smdkc210_machine_init(void)
|
|||
s3c_sdhci2_set_platdata(&smdkc210_hsmmc2_pdata);
|
||||
s3c_sdhci3_set_platdata(&smdkc210_hsmmc3_pdata);
|
||||
|
||||
samsung_bl_set(&smdkc210_bl_gpio_info, &smdkc210_bl_data);
|
||||
|
||||
platform_add_devices(smdkc210_devices, ARRAY_SIZE(smdkc210_devices));
|
||||
}
|
||||
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/pwm_backlight.h>
|
||||
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
@ -29,6 +30,8 @@
|
|||
#include <plat/sdhci.h>
|
||||
#include <plat/iic.h>
|
||||
#include <plat/pd.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
#include <plat/backlight.h>
|
||||
|
||||
#include <mach/map.h>
|
||||
|
||||
|
@ -209,6 +212,17 @@ static void __init smdkv310_smsc911x_init(void)
|
|||
(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
|
||||
}
|
||||
|
||||
/* LCD Backlight data */
|
||||
static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
|
||||
.no = EXYNOS4_GPD0(1),
|
||||
.func = S3C_GPIO_SFN(2),
|
||||
};
|
||||
|
||||
static struct platform_pwm_backlight_data smdkv310_bl_data = {
|
||||
.pwm_id = 1,
|
||||
.pwm_period_ns = 1000,
|
||||
};
|
||||
|
||||
static void __init smdkv310_map_io(void)
|
||||
{
|
||||
s5p_init_io(NULL, 0, S5P_VA_CHIPID);
|
||||
|
@ -230,6 +244,8 @@ static void __init smdkv310_machine_init(void)
|
|||
|
||||
samsung_keypad_set_platdata(&smdkv310_keypad_data);
|
||||
|
||||
samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
|
||||
|
||||
platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
|
||||
}
|
||||
|
||||
|
|
|
@ -167,6 +167,7 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
|
|||
bool "Eukrea MBIMXSD development board"
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMXSD evaluation board.
|
||||
|
@ -265,6 +266,7 @@ config MACH_EUKREA_MBIMX27_BASEBOARD
|
|||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMX27 evaluation board.
|
||||
|
@ -403,6 +405,7 @@ config MACH_MX31LITE
|
|||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_RTC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
Include support for MX31 LITEKIT platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
@ -471,6 +474,7 @@ config MACH_MX31MOBOARD
|
|||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MXC_ULPI if USB_ULPI
|
||||
help
|
||||
Include support for mx31moboard platform. This includes specific
|
||||
|
@ -577,6 +581,7 @@ config MACH_EUKREA_MBIMXSD35_BASEBOARD
|
|||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMXSD evaluation board.
|
||||
|
|
|
@ -476,7 +476,6 @@ void imx_dma_enable(int channel)
|
|||
imx_dmav1_writel(imx_dmav1_readl(DMA_CCR(channel)) | CCR_CEN |
|
||||
CCR_ACRPT, DMA_CCR(channel));
|
||||
|
||||
#ifdef CONFIG_ARCH_MX2
|
||||
if ((cpu_is_mx21() || cpu_is_mx27()) &&
|
||||
imxdma->sg && imx_dma_hw_chain(imxdma)) {
|
||||
imxdma->sg = sg_next(imxdma->sg);
|
||||
|
@ -488,7 +487,6 @@ void imx_dma_enable(int channel)
|
|||
DMA_CCR(channel));
|
||||
}
|
||||
}
|
||||
#endif
|
||||
imxdma->in_use = 1;
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
@ -519,7 +517,6 @@ void imx_dma_disable(int channel)
|
|||
}
|
||||
EXPORT_SYMBOL(imx_dma_disable);
|
||||
|
||||
#ifdef CONFIG_ARCH_MX2
|
||||
static void imx_dma_watchdog(unsigned long chno)
|
||||
{
|
||||
struct imx_dma_channel *imxdma = &imx_dma_channels[chno];
|
||||
|
@ -531,7 +528,6 @@ static void imx_dma_watchdog(unsigned long chno)
|
|||
if (imxdma->err_handler)
|
||||
imxdma->err_handler(chno, imxdma->data, IMX_DMA_ERR_TIMEOUT);
|
||||
}
|
||||
#endif
|
||||
|
||||
static irqreturn_t dma_err_handler(int irq, void *dev_id)
|
||||
{
|
||||
|
@ -655,10 +651,8 @@ static irqreturn_t dma_irq_handler(int irq, void *dev_id)
|
|||
{
|
||||
int i, disr;
|
||||
|
||||
#ifdef CONFIG_ARCH_MX2
|
||||
if (cpu_is_mx21() || cpu_is_mx27())
|
||||
dma_err_handler(irq, dev_id);
|
||||
#endif
|
||||
|
||||
disr = imx_dmav1_readl(DMA_DISR);
|
||||
|
||||
|
@ -704,7 +698,6 @@ int imx_dma_request(int channel, const char *name)
|
|||
imxdma->name = name;
|
||||
local_irq_restore(flags); /* request_irq() can block */
|
||||
|
||||
#ifdef CONFIG_ARCH_MX2
|
||||
if (cpu_is_mx21() || cpu_is_mx27()) {
|
||||
ret = request_irq(MX2x_INT_DMACH0 + channel,
|
||||
dma_irq_handler, 0, "DMA", NULL);
|
||||
|
@ -718,7 +711,6 @@ int imx_dma_request(int channel, const char *name)
|
|||
imxdma->watchdog.function = &imx_dma_watchdog;
|
||||
imxdma->watchdog.data = channel;
|
||||
}
|
||||
#endif
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -745,10 +737,8 @@ void imx_dma_free(int channel)
|
|||
imx_dma_disable(channel);
|
||||
imxdma->name = NULL;
|
||||
|
||||
#ifdef CONFIG_ARCH_MX2
|
||||
if (cpu_is_mx21() || cpu_is_mx27())
|
||||
free_irq(MX2x_INT_DMACH0 + channel, NULL);
|
||||
#endif
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
@ -804,21 +794,13 @@ static int __init imx_dma_init(void)
|
|||
int ret = 0;
|
||||
int i;
|
||||
|
||||
#ifdef CONFIG_ARCH_MX1
|
||||
if (cpu_is_mx1())
|
||||
imx_dmav1_baseaddr = MX1_IO_ADDRESS(MX1_DMA_BASE_ADDR);
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_MACH_MX21
|
||||
if (cpu_is_mx21())
|
||||
else if (cpu_is_mx21())
|
||||
imx_dmav1_baseaddr = MX21_IO_ADDRESS(MX21_DMA_BASE_ADDR);
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_MACH_MX27
|
||||
if (cpu_is_mx27())
|
||||
else if (cpu_is_mx27())
|
||||
imx_dmav1_baseaddr = MX27_IO_ADDRESS(MX27_DMA_BASE_ADDR);
|
||||
else
|
||||
#endif
|
||||
return 0;
|
||||
|
||||
dma_clk = clk_get(NULL, "dma");
|
||||
|
@ -829,7 +811,6 @@ static int __init imx_dma_init(void)
|
|||
/* reset DMA module */
|
||||
imx_dmav1_writel(DCR_DRST, DMA_DCR);
|
||||
|
||||
#ifdef CONFIG_ARCH_MX1
|
||||
if (cpu_is_mx1()) {
|
||||
ret = request_irq(MX1_DMA_INT, dma_irq_handler, 0, "DMA", NULL);
|
||||
if (ret) {
|
||||
|
@ -844,7 +825,7 @@ static int __init imx_dma_init(void)
|
|||
return ret;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
||||
/* enable DMA module */
|
||||
imx_dmav1_writel(DCR_DEN, DMA_DCR);
|
||||
|
||||
|
|
|
@ -112,7 +112,7 @@ eukrea_mbimx27_keymap_data __initconst = {
|
|||
.keymap_size = ARRAY_SIZE(eukrea_mbimx27_keymap),
|
||||
};
|
||||
|
||||
static struct gpio_led gpio_leds[] = {
|
||||
static const struct gpio_led eukrea_mbimx27_gpio_leds[] __initconst = {
|
||||
{
|
||||
.name = "led1",
|
||||
.default_trigger = "heartbeat",
|
||||
|
@ -127,17 +127,10 @@ static struct gpio_led gpio_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data gpio_led_info = {
|
||||
.leds = gpio_leds,
|
||||
.num_leds = ARRAY_SIZE(gpio_leds),
|
||||
};
|
||||
|
||||
static struct platform_device leds_gpio = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &gpio_led_info,
|
||||
},
|
||||
static const struct gpio_led_platform_data
|
||||
eukrea_mbimx27_gpio_led_info __initconst = {
|
||||
.leds = eukrea_mbimx27_gpio_leds,
|
||||
.num_leds = ARRAY_SIZE(eukrea_mbimx27_gpio_leds),
|
||||
};
|
||||
|
||||
static struct imx_fb_videomode eukrea_mbimx27_modes[] = {
|
||||
|
@ -293,10 +286,6 @@ static struct i2c_board_info eukrea_mbimx27_i2c_devices[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&leds_gpio,
|
||||
};
|
||||
|
||||
static const struct imxmmc_platform_data sdhc_pdata __initconst = {
|
||||
.dat3_card_detect = 1,
|
||||
};
|
||||
|
@ -377,5 +366,5 @@ void __init eukrea_mbimx27_baseboard_init(void)
|
|||
|
||||
imx27_add_imx_keypad(&eukrea_mbimx27_keymap_data);
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
gpio_led_register_device(-1, &eukrea_mbimx27_gpio_led_info);
|
||||
}
|
||||
|
|
|
@ -173,7 +173,7 @@ static struct platform_device eukrea_mbimxsd_lcd_powerdev = {
|
|||
.dev.platform_data = &eukrea_mbimxsd_lcd_power_data,
|
||||
};
|
||||
|
||||
static struct gpio_led eukrea_mbimxsd_leds[] = {
|
||||
static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {
|
||||
{
|
||||
.name = "led1",
|
||||
.default_trigger = "heartbeat",
|
||||
|
@ -182,19 +182,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
|
||||
static const struct gpio_led_platform_data
|
||||
eukrea_mbimxsd_led_info __initconst = {
|
||||
.leds = eukrea_mbimxsd_leds,
|
||||
.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
|
||||
};
|
||||
|
||||
static struct platform_device eukrea_mbimxsd_leds_gpio = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &eukrea_mbimxsd_led_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
|
||||
{
|
||||
.gpio = GPIO_SWITCH1,
|
||||
|
@ -212,7 +205,6 @@ static const struct gpio_keys_platform_data
|
|||
};
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&eukrea_mbimxsd_leds_gpio,
|
||||
&eukrea_mbimxsd_lcd_powerdev,
|
||||
};
|
||||
|
||||
|
@ -287,5 +279,6 @@ void __init eukrea_mbimxsd25_baseboard_init(void)
|
|||
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
|
||||
imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
|
||||
}
|
||||
|
|
|
@ -193,19 +193,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
|
||||
static const struct gpio_led_platform_data
|
||||
eukrea_mbimxsd_led_info __initconst = {
|
||||
.leds = eukrea_mbimxsd_leds,
|
||||
.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
|
||||
};
|
||||
|
||||
static struct platform_device eukrea_mbimxsd_leds_gpio = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &eukrea_mbimxsd_led_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
|
||||
{
|
||||
.gpio = GPIO_SWITCH1,
|
||||
|
@ -223,7 +216,6 @@ static const struct gpio_keys_platform_data
|
|||
};
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&eukrea_mbimxsd_leds_gpio,
|
||||
&eukrea_mbimxsd_lcd_powerdev,
|
||||
};
|
||||
|
||||
|
@ -299,5 +291,6 @@ void __init eukrea_mbimxsd35_baseboard_init(void)
|
|||
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
|
||||
imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
|
||||
}
|
||||
|
|
|
@ -99,11 +99,6 @@ static struct platform_device dm9000x_device = {
|
|||
}
|
||||
};
|
||||
|
||||
/* --- SERIAL RESSOURCE --- */
|
||||
static const struct imxuart_platform_data uart0_pdata __initconst = {
|
||||
.flags = 0,
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart1_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
@ -121,7 +116,7 @@ static void __init apf9328_init(void)
|
|||
ARRAY_SIZE(apf9328_pins),
|
||||
"APF9328");
|
||||
|
||||
imx1_add_imx_uart0(&uart0_pdata);
|
||||
imx1_add_imx_uart0(NULL);
|
||||
imx1_add_imx_uart1(&uart1_pdata);
|
||||
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
@ -34,7 +34,7 @@
|
|||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/iomux.h>
|
||||
#include <mach/iomux-mx27.h>
|
||||
|
||||
#include "devices-imx27.h"
|
||||
|
||||
|
|
|
@ -47,6 +47,7 @@
|
|||
#define SPI2_SS0 IMX_GPIO_NR(4, 21)
|
||||
#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(3, 28))
|
||||
#define PMIC_INT IMX_GPIO_NR(3, 14)
|
||||
#define SD1_CD IMX_GPIO_NR(2, 26)
|
||||
|
||||
static const int mx27pdk_pins[] __initconst = {
|
||||
/* UART1 */
|
||||
|
@ -135,13 +136,13 @@ static const struct matrix_keymap_data mx27_3ds_keymap_data __initconst = {
|
|||
static int mx27_3ds_sdhc1_init(struct device *dev, irq_handler_t detect_irq,
|
||||
void *data)
|
||||
{
|
||||
return request_irq(IRQ_GPIOB(26), detect_irq, IRQF_TRIGGER_FALLING |
|
||||
IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
|
||||
return request_irq(gpio_to_irq(SD1_CD), detect_irq,
|
||||
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, "sdhc1-card-detect", data);
|
||||
}
|
||||
|
||||
static void mx27_3ds_sdhc1_exit(struct device *dev, void *data)
|
||||
{
|
||||
free_irq(IRQ_GPIOB(26), data);
|
||||
free_irq(gpio_to_irq(SD1_CD), data);
|
||||
}
|
||||
|
||||
static const struct imxmmc_platform_data sdhc1_pdata __initconst = {
|
||||
|
@ -261,11 +262,11 @@ static struct mc13xxx_platform_data mc13783_pdata = {
|
|||
};
|
||||
|
||||
/* SPI */
|
||||
static int spi2_internal_chipselect[] = {SPI2_SS0};
|
||||
static int spi2_chipselect[] = {SPI2_SS0};
|
||||
|
||||
static const struct spi_imx_master spi2_pdata __initconst = {
|
||||
.chipselect = spi2_internal_chipselect,
|
||||
.num_chipselect = ARRAY_SIZE(spi2_internal_chipselect),
|
||||
.chipselect = spi2_chipselect,
|
||||
.num_chipselect = ARRAY_SIZE(spi2_chipselect),
|
||||
};
|
||||
|
||||
static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
|
||||
|
@ -275,7 +276,7 @@ static struct spi_board_info mx27_3ds_spi_devs[] __initdata = {
|
|||
.bus_num = 1,
|
||||
.chip_select = 0, /* SS0 */
|
||||
.platform_data = &mc13783_pdata,
|
||||
.irq = IRQ_GPIOC(14),
|
||||
.irq = gpio_to_irq(PMIC_INT),
|
||||
.mode = SPI_CS_HIGH,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -425,7 +425,7 @@ static int __init moboard_usbh2_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct gpio_led mx31moboard_leds[] = {
|
||||
static const struct gpio_led mx31moboard_leds[] __initconst = {
|
||||
{
|
||||
.name = "coreboard-led-0:red:running",
|
||||
.default_trigger = "heartbeat",
|
||||
|
@ -442,26 +442,17 @@ static struct gpio_led mx31moboard_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data mx31moboard_led_pdata = {
|
||||
static const struct gpio_led_platform_data mx31moboard_led_pdata __initconst = {
|
||||
.num_leds = ARRAY_SIZE(mx31moboard_leds),
|
||||
.leds = mx31moboard_leds,
|
||||
};
|
||||
|
||||
static struct platform_device mx31moboard_leds_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &mx31moboard_led_pdata,
|
||||
},
|
||||
};
|
||||
|
||||
static const struct ipu_platform_data mx3_ipu_data __initconst = {
|
||||
.irq_base = MXC_IPU_IRQ_START,
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
&mx31moboard_flash,
|
||||
&mx31moboard_leds_device,
|
||||
};
|
||||
|
||||
static struct mx3_camera_pdata camera_pdata __initdata = {
|
||||
|
@ -513,6 +504,7 @@ static void __init mx31moboard_init(void)
|
|||
"moboard");
|
||||
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
gpio_led_register_device(-1, &mx31moboard_led_pdata);
|
||||
|
||||
imx31_add_imx_uart0(&uart0_pdata);
|
||||
imx31_add_imx_uart4(&uart4_pdata);
|
||||
|
|
|
@ -43,7 +43,7 @@
|
|||
|
||||
#include "devices-imx35.h"
|
||||
|
||||
#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 1)
|
||||
#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 1))
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
|
|
|
@ -101,21 +101,7 @@ static const int mxc_uart1_pins[] = {
|
|||
PC12_PF_UART1_RXD,
|
||||
};
|
||||
|
||||
static int uart1_mxc_init(struct platform_device *pdev)
|
||||
{
|
||||
return mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
|
||||
ARRAY_SIZE(mxc_uart1_pins), "UART1");
|
||||
}
|
||||
|
||||
static void uart1_mxc_exit(struct platform_device *pdev)
|
||||
{
|
||||
mxc_gpio_release_multiple_pins(mxc_uart1_pins,
|
||||
ARRAY_SIZE(mxc_uart1_pins));
|
||||
}
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.init = uart1_mxc_init,
|
||||
.exit = uart1_mxc_exit,
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
||||
|
@ -131,6 +117,9 @@ static void __init scb9328_init(void)
|
|||
{
|
||||
imx1_soc_init();
|
||||
|
||||
mxc_gpio_setup_multiple_pins(mxc_uart1_pins,
|
||||
ARRAY_SIZE(mxc_uart1_pins), "UART1");
|
||||
|
||||
imx1_add_imx_uart0(&uart_pdata);
|
||||
|
||||
printk(KERN_INFO"Scb9328: Adding devices\n");
|
||||
|
|
|
@ -161,7 +161,7 @@ static const struct spi_imx_master spi0_pdata __initconst = {
|
|||
|
||||
/* GPIO LEDs */
|
||||
|
||||
static struct gpio_led litekit_leds[] = {
|
||||
static const struct gpio_led litekit_leds[] __initconst = {
|
||||
{
|
||||
.name = "GPIO0",
|
||||
.gpio = IOMUX_TO_GPIO(MX31_PIN_COMPARE),
|
||||
|
@ -176,19 +176,12 @@ static struct gpio_led litekit_leds[] = {
|
|||
}
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data litekit_led_platform_data = {
|
||||
static const struct gpio_led_platform_data
|
||||
litekit_led_platform_data __initconst = {
|
||||
.leds = litekit_leds,
|
||||
.num_leds = ARRAY_SIZE(litekit_leds),
|
||||
};
|
||||
|
||||
static struct platform_device litekit_led_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &litekit_led_platform_data,
|
||||
},
|
||||
};
|
||||
|
||||
void __init mx31lite_db_init(void)
|
||||
{
|
||||
mxc_iomux_setup_multiple_pins(litekit_db_board_pins,
|
||||
|
@ -197,7 +190,7 @@ void __init mx31lite_db_init(void)
|
|||
imx31_add_imx_uart0(&uart_pdata);
|
||||
imx31_add_mxc_mmc(0, &mmc_pdata);
|
||||
imx31_add_spi_imx0(&spi0_pdata);
|
||||
platform_device_register(&litekit_led_device);
|
||||
gpio_led_register_device(-1, &litekit_led_platform_data);
|
||||
imx31_add_imx2_wdt(NULL);
|
||||
imx31_add_mxc_rtc(NULL);
|
||||
}
|
||||
|
|
|
@ -1,61 +0,0 @@
|
|||
/*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
/* DO NOT EDIT!! - this file automatically generated
|
||||
* from .s file by awk -f s2h.awk
|
||||
*/
|
||||
/* Bit field definitions
|
||||
* Copyright (C) ARM Limited 1998. All rights reserved.
|
||||
*/
|
||||
|
||||
#ifndef __bits_h
|
||||
#define __bits_h 1
|
||||
|
||||
#define BIT0 0x00000001
|
||||
#define BIT1 0x00000002
|
||||
#define BIT2 0x00000004
|
||||
#define BIT3 0x00000008
|
||||
#define BIT4 0x00000010
|
||||
#define BIT5 0x00000020
|
||||
#define BIT6 0x00000040
|
||||
#define BIT7 0x00000080
|
||||
#define BIT8 0x00000100
|
||||
#define BIT9 0x00000200
|
||||
#define BIT10 0x00000400
|
||||
#define BIT11 0x00000800
|
||||
#define BIT12 0x00001000
|
||||
#define BIT13 0x00002000
|
||||
#define BIT14 0x00004000
|
||||
#define BIT15 0x00008000
|
||||
#define BIT16 0x00010000
|
||||
#define BIT17 0x00020000
|
||||
#define BIT18 0x00040000
|
||||
#define BIT19 0x00080000
|
||||
#define BIT20 0x00100000
|
||||
#define BIT21 0x00200000
|
||||
#define BIT22 0x00400000
|
||||
#define BIT23 0x00800000
|
||||
#define BIT24 0x01000000
|
||||
#define BIT25 0x02000000
|
||||
#define BIT26 0x04000000
|
||||
#define BIT27 0x08000000
|
||||
#define BIT28 0x10000000
|
||||
#define BIT29 0x20000000
|
||||
#define BIT30 0x40000000
|
||||
#define BIT31 0x80000000
|
||||
|
||||
#endif
|
||||
|
||||
/* END */
|
|
@ -109,6 +109,7 @@ config MACH_EUKREA_MBIMX51_BASEBOARD
|
|||
bool
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMX51 evaluation board.
|
||||
|
@ -135,6 +136,7 @@ config MACH_EUKREA_MBIMXSD51_BASEBOARD
|
|||
prompt "Eukrea MBIMXSD development board"
|
||||
bool
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
This adds board specific devices that can be found on Eukrea's
|
||||
MBIMXSD evaluation board.
|
||||
|
@ -151,6 +153,7 @@ config MX51_EFIKA_COMMON
|
|||
|
||||
config MACH_MX51_EFIKAMX
|
||||
bool "Support MX51 Genesi Efika MX nettop"
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MX51_EFIKA_COMMON
|
||||
help
|
||||
Include support for Genesi Efika MX nettop. This includes specific
|
||||
|
@ -158,6 +161,7 @@ config MACH_MX51_EFIKAMX
|
|||
|
||||
config MACH_MX51_EFIKASB
|
||||
bool "Support MX51 Genesi Efika Smartbook"
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MX51_EFIKA_COMMON
|
||||
help
|
||||
Include support for Genesi Efika Smartbook. This includes specific
|
||||
|
|
|
@ -43,10 +43,6 @@
|
|||
#define CPUIMX51_QUARTB_GPIO IMX_GPIO_NR(3, 25)
|
||||
#define CPUIMX51_QUARTC_GPIO IMX_GPIO_NR(3, 26)
|
||||
#define CPUIMX51_QUARTD_GPIO IMX_GPIO_NR(3, 27)
|
||||
#define CPUIMX51_QUARTA_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTA_GPIO)
|
||||
#define CPUIMX51_QUARTB_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTB_GPIO)
|
||||
#define CPUIMX51_QUARTC_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTC_GPIO)
|
||||
#define CPUIMX51_QUARTD_IRQ (MXC_INTERNAL_IRQS + CPUIMX51_QUARTD_GPIO)
|
||||
#define CPUIMX51_QUART_XTAL 14745600
|
||||
#define CPUIMX51_QUART_REGSHIFT 17
|
||||
|
||||
|
@ -61,7 +57,7 @@
|
|||
static struct plat_serial8250_port serial_platform_data[] = {
|
||||
{
|
||||
.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x400000),
|
||||
.irq = CPUIMX51_QUARTA_IRQ,
|
||||
.irq = gpio_to_irq(CPUIMX51_QUARTA_GPIO),
|
||||
.irqflags = IRQF_TRIGGER_HIGH,
|
||||
.uartclk = CPUIMX51_QUART_XTAL,
|
||||
.regshift = CPUIMX51_QUART_REGSHIFT,
|
||||
|
@ -69,7 +65,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
|
|||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
|
||||
}, {
|
||||
.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x800000),
|
||||
.irq = CPUIMX51_QUARTB_IRQ,
|
||||
.irq = gpio_to_irq(CPUIMX51_QUARTB_GPIO),
|
||||
.irqflags = IRQF_TRIGGER_HIGH,
|
||||
.uartclk = CPUIMX51_QUART_XTAL,
|
||||
.regshift = CPUIMX51_QUART_REGSHIFT,
|
||||
|
@ -77,7 +73,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
|
|||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
|
||||
}, {
|
||||
.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x1000000),
|
||||
.irq = CPUIMX51_QUARTC_IRQ,
|
||||
.irq = gpio_to_irq(CPUIMX51_QUARTC_GPIO),
|
||||
.irqflags = IRQF_TRIGGER_HIGH,
|
||||
.uartclk = CPUIMX51_QUART_XTAL,
|
||||
.regshift = CPUIMX51_QUART_REGSHIFT,
|
||||
|
@ -85,7 +81,7 @@ static struct plat_serial8250_port serial_platform_data[] = {
|
|||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP,
|
||||
}, {
|
||||
.mapbase = (unsigned long)(MX51_CS1_BASE_ADDR + 0x2000000),
|
||||
.irq = CPUIMX51_QUARTD_IRQ,
|
||||
.irq = irq_to_gpio(CPUIMX51_QUARTD_GPIO),
|
||||
.irqflags = IRQF_TRIGGER_HIGH,
|
||||
.uartclk = CPUIMX51_QUART_XTAL,
|
||||
.regshift = CPUIMX51_QUART_REGSHIFT,
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/gpio.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
@ -26,7 +27,7 @@
|
|||
#include "devices-imx51.h"
|
||||
#include "devices.h"
|
||||
|
||||
#define EXPIO_PARENT_INT (MXC_INTERNAL_IRQS + GPIO_PORTA + 6)
|
||||
#define EXPIO_PARENT_INT gpio_to_irq(IMX_GPIO_NR(1, 6))
|
||||
#define MX51_3DS_ECSPI2_CS (GPIO_PORTC + 28)
|
||||
|
||||
static iomux_v3_cfg_t mx51_3ds_pads[] = {
|
||||
|
|
|
@ -36,7 +36,7 @@
|
|||
|
||||
#define BABBAGE_USB_HUB_RESET IMX_GPIO_NR(1, 7)
|
||||
#define BABBAGE_USBH1_STP IMX_GPIO_NR(1, 27)
|
||||
#define BABBAGE_PHY_RESET IMX_GPIO_NR(2, 5)
|
||||
#define BABBAGE_USB_PHY_RESET IMX_GPIO_NR(2, 5)
|
||||
#define BABBAGE_FEC_PHY_RESET IMX_GPIO_NR(2, 14)
|
||||
#define BABBAGE_POWER_KEY IMX_GPIO_NR(2, 21)
|
||||
#define BABBAGE_ECSPI1_CS0 IMX_GPIO_NR(4, 24)
|
||||
|
@ -110,6 +110,9 @@ static iomux_v3_cfg_t mx51babbage_pads[] = {
|
|||
/* USB HUB reset line*/
|
||||
MX51_PAD_GPIO1_7__GPIO1_7,
|
||||
|
||||
/* USB PHY reset line */
|
||||
MX51_PAD_EIM_D21__GPIO2_5,
|
||||
|
||||
/* FEC */
|
||||
MX51_PAD_EIM_EB2__FEC_MDIO,
|
||||
MX51_PAD_EIM_EB3__FEC_RDATA1,
|
||||
|
@ -169,34 +172,31 @@ static struct imxi2c_platform_data babbage_hsi2c_data = {
|
|||
.bitrate = 400000,
|
||||
};
|
||||
|
||||
static struct gpio mx51_babbage_usbh1_gpios[] = {
|
||||
{ BABBAGE_USBH1_STP, GPIOF_OUT_INIT_LOW, "usbh1_stp" },
|
||||
{ BABBAGE_USB_PHY_RESET, GPIOF_OUT_INIT_LOW, "usbh1_phy_reset" },
|
||||
};
|
||||
|
||||
static int gpio_usbh1_active(void)
|
||||
{
|
||||
iomux_v3_cfg_t usbh1stp_gpio = MX51_PAD_USBH1_STP__GPIO1_27;
|
||||
iomux_v3_cfg_t phyreset_gpio = MX51_PAD_EIM_D21__GPIO2_5;
|
||||
int ret;
|
||||
|
||||
/* Set USBH1_STP to GPIO and toggle it */
|
||||
mxc_iomux_v3_setup_pad(usbh1stp_gpio);
|
||||
ret = gpio_request(BABBAGE_USBH1_STP, "usbh1_stp");
|
||||
ret = gpio_request_array(mx51_babbage_usbh1_gpios,
|
||||
ARRAY_SIZE(mx51_babbage_usbh1_gpios));
|
||||
|
||||
if (ret) {
|
||||
pr_debug("failed to get MX51_PAD_USBH1_STP__GPIO_1_27: %d\n", ret);
|
||||
pr_debug("failed to get USBH1 pins: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
gpio_direction_output(BABBAGE_USBH1_STP, 0);
|
||||
gpio_set_value(BABBAGE_USBH1_STP, 1);
|
||||
|
||||
msleep(100);
|
||||
gpio_free(BABBAGE_USBH1_STP);
|
||||
|
||||
/* De-assert USB PHY RESETB */
|
||||
mxc_iomux_v3_setup_pad(phyreset_gpio);
|
||||
ret = gpio_request(BABBAGE_PHY_RESET, "phy_reset");
|
||||
|
||||
if (ret) {
|
||||
pr_debug("failed to get MX51_PAD_EIM_D21__GPIO_2_5: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
gpio_direction_output(BABBAGE_PHY_RESET, 1);
|
||||
gpio_set_value(BABBAGE_USBH1_STP, 1);
|
||||
gpio_set_value(BABBAGE_USB_PHY_RESET, 1);
|
||||
gpio_free_array(mx51_babbage_usbh1_gpios,
|
||||
ARRAY_SIZE(mx51_babbage_usbh1_gpios));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -139,7 +139,7 @@ static void __init mx51_efikamx_board_id(void)
|
|||
}
|
||||
}
|
||||
|
||||
static struct gpio_led mx51_efikamx_leds[] = {
|
||||
static struct gpio_led mx51_efikamx_leds[] __initdata = {
|
||||
{
|
||||
.name = "efikamx:green",
|
||||
.default_trigger = "default-on",
|
||||
|
@ -157,19 +157,12 @@ static struct gpio_led mx51_efikamx_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data mx51_efikamx_leds_data = {
|
||||
static const struct gpio_led_platform_data
|
||||
mx51_efikamx_leds_data __initconst = {
|
||||
.leds = mx51_efikamx_leds,
|
||||
.num_leds = ARRAY_SIZE(mx51_efikamx_leds),
|
||||
};
|
||||
|
||||
static struct platform_device mx51_efikamx_leds_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &mx51_efikamx_leds_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_button mx51_efikamx_powerkey[] = {
|
||||
{
|
||||
.code = KEY_POWER,
|
||||
|
@ -250,7 +243,7 @@ static void __init mx51_efikamx_init(void)
|
|||
mx51_efikamx_leds[2].default_trigger = "mmc1";
|
||||
}
|
||||
|
||||
platform_device_register(&mx51_efikamx_leds_device);
|
||||
gpio_led_register_device(-1, &mx51_efikamx_leds_data);
|
||||
imx_add_gpio_keys(&mx51_efikamx_powerkey_data);
|
||||
|
||||
if (system_rev == 0x11) {
|
||||
|
|
|
@ -132,7 +132,7 @@ static void __init mx51_efikasb_usb(void)
|
|||
mxc_register_device(&mxc_usbh2_device, &usbh2_config);
|
||||
}
|
||||
|
||||
static struct gpio_led mx51_efikasb_leds[] = {
|
||||
static const struct gpio_led mx51_efikasb_leds[] __initconst = {
|
||||
{
|
||||
.name = "efikasb:green",
|
||||
.default_trigger = "default-on",
|
||||
|
@ -146,19 +146,12 @@ static struct gpio_led mx51_efikasb_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data mx51_efikasb_leds_data = {
|
||||
static const struct gpio_led_platform_data
|
||||
mx51_efikasb_leds_data __initconst = {
|
||||
.leds = mx51_efikasb_leds,
|
||||
.num_leds = ARRAY_SIZE(mx51_efikasb_leds),
|
||||
};
|
||||
|
||||
static struct platform_device mx51_efikasb_leds_device = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &mx51_efikasb_leds_data,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_button mx51_efikasb_keys[] = {
|
||||
{
|
||||
.code = KEY_POWER,
|
||||
|
@ -258,9 +251,8 @@ static void __init efikasb_board_init(void)
|
|||
mx51_efikasb_usb();
|
||||
imx51_add_sdhci_esdhc_imx(1, NULL);
|
||||
|
||||
platform_device_register(&mx51_efikasb_leds_device);
|
||||
gpio_led_register_device(-1, &mx51_efikasb_leds_data);
|
||||
imx_add_gpio_keys(&mx51_efikasb_keys_data);
|
||||
|
||||
}
|
||||
|
||||
static void __init mx51_efikasb_timer_init(void)
|
||||
|
|
|
@ -31,13 +31,12 @@
|
|||
#include "devices.h"
|
||||
|
||||
#define MBIMX51_TSC2007_GPIO IMX_GPIO_NR(3, 30)
|
||||
#define MBIMX51_TSC2007_IRQ (MXC_INTERNAL_IRQS + MBIMX51_TSC2007_GPIO)
|
||||
#define MBIMX51_LED0 IMX_GPIO_NR(3, 5)
|
||||
#define MBIMX51_LED1 IMX_GPIO_NR(3, 6)
|
||||
#define MBIMX51_LED2 IMX_GPIO_NR(3, 7)
|
||||
#define MBIMX51_LED3 IMX_GPIO_NR(3, 8)
|
||||
|
||||
static struct gpio_led mbimx51_leds[] = {
|
||||
static const struct gpio_led mbimx51_leds[] __initconst = {
|
||||
{
|
||||
.name = "led0",
|
||||
.default_trigger = "heartbeat",
|
||||
|
@ -64,23 +63,11 @@ static struct gpio_led mbimx51_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data mbimx51_leds_info = {
|
||||
static const struct gpio_led_platform_data mbimx51_leds_info __initconst = {
|
||||
.leds = mbimx51_leds,
|
||||
.num_leds = ARRAY_SIZE(mbimx51_leds),
|
||||
};
|
||||
|
||||
static struct platform_device mbimx51_leds_gpio = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &mbimx51_leds_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
&mbimx51_leds_gpio,
|
||||
};
|
||||
|
||||
static iomux_v3_cfg_t mbimx51_pads[] = {
|
||||
/* UART2 */
|
||||
MX51_PAD_UART2_RXD__UART2_RXD,
|
||||
|
@ -173,7 +160,7 @@ struct tsc2007_platform_data tsc2007_data = {
|
|||
static struct i2c_board_info mbimx51_i2c_devices[] = {
|
||||
{
|
||||
I2C_BOARD_INFO("tsc2007", 0x49),
|
||||
.irq = MBIMX51_TSC2007_IRQ,
|
||||
.irq = gpio_to_irq(MBIMX51_TSC2007_GPIO),
|
||||
.platform_data = &tsc2007_data,
|
||||
}, {
|
||||
I2C_BOARD_INFO("tlv320aic23", 0x1a),
|
||||
|
@ -204,13 +191,14 @@ void __init eukrea_mbimx51_baseboard_init(void)
|
|||
gpio_direction_output(MBIMX51_LED3, 1);
|
||||
gpio_free(MBIMX51_LED3);
|
||||
|
||||
platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
gpio_led_register_device(-1, &mbimx51_leds_info);
|
||||
|
||||
imx51_add_imx_keypad(&mbimx51_map_data);
|
||||
|
||||
gpio_request(MBIMX51_TSC2007_GPIO, "tsc2007_irq");
|
||||
gpio_direction_input(MBIMX51_TSC2007_GPIO);
|
||||
irq_set_irq_type(MBIMX51_TSC2007_IRQ, IRQF_TRIGGER_FALLING);
|
||||
irq_set_irq_type(gpio_to_irq(MBIMX51_TSC2007_GPIO),
|
||||
IRQF_TRIGGER_FALLING);
|
||||
i2c_register_board_info(1, mbimx51_i2c_devices,
|
||||
ARRAY_SIZE(mbimx51_i2c_devices));
|
||||
|
||||
|
|
|
@ -74,7 +74,7 @@ static iomux_v3_cfg_t eukrea_mbimxsd_pads[] = {
|
|||
#define GPIO_LED1 IMX_GPIO_NR(3, 30)
|
||||
#define GPIO_SWITCH1 IMX_GPIO_NR(3, 31)
|
||||
|
||||
static struct gpio_led eukrea_mbimxsd_leds[] = {
|
||||
static const struct gpio_led eukrea_mbimxsd_leds[] __initconst = {
|
||||
{
|
||||
.name = "led1",
|
||||
.default_trigger = "heartbeat",
|
||||
|
@ -83,19 +83,12 @@ static struct gpio_led eukrea_mbimxsd_leds[] = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct gpio_led_platform_data eukrea_mbimxsd_led_info = {
|
||||
static const struct gpio_led_platform_data
|
||||
eukrea_mbimxsd_led_info __initconst = {
|
||||
.leds = eukrea_mbimxsd_leds,
|
||||
.num_leds = ARRAY_SIZE(eukrea_mbimxsd_leds),
|
||||
};
|
||||
|
||||
static struct platform_device eukrea_mbimxsd_leds_gpio = {
|
||||
.name = "leds-gpio",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.platform_data = &eukrea_mbimxsd_led_info,
|
||||
},
|
||||
};
|
||||
|
||||
static struct gpio_keys_button eukrea_mbimxsd_gpio_buttons[] = {
|
||||
{
|
||||
.gpio = GPIO_SWITCH1,
|
||||
|
@ -112,10 +105,6 @@ static const struct gpio_keys_platform_data
|
|||
.nbuttons = ARRAY_SIZE(eukrea_mbimxsd_gpio_buttons),
|
||||
};
|
||||
|
||||
static struct platform_device *platform_devices[] __initdata = {
|
||||
&eukrea_mbimxsd_leds_gpio,
|
||||
};
|
||||
|
||||
static const struct imxuart_platform_data uart_pdata __initconst = {
|
||||
.flags = IMXUART_HAVE_RTSCTS,
|
||||
};
|
||||
|
@ -154,6 +143,6 @@ void __init eukrea_mbimxsd51_baseboard_init(void)
|
|||
i2c_register_board_info(0, eukrea_mbimxsd_i2c_devices,
|
||||
ARRAY_SIZE(eukrea_mbimxsd_i2c_devices));
|
||||
|
||||
platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
|
||||
gpio_led_register_device(-1, &eukrea_mbimxsd_led_info);
|
||||
imx_add_gpio_keys(&eukrea_mbimxsd_button_data);
|
||||
}
|
||||
|
|
|
@ -55,6 +55,7 @@ config MACH_MX28EVK
|
|||
config MODULE_TX28
|
||||
bool
|
||||
select SOC_IMX28
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MXS_HAVE_AMBA_DUART
|
||||
select MXS_HAVE_PLATFORM_AUART
|
||||
select MXS_HAVE_PLATFORM_FEC
|
||||
|
|
|
@ -109,7 +109,7 @@ static const iomux_cfg_t tx28_stk5v3_pads[] __initconst = {
|
|||
(MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_NOPULL),
|
||||
};
|
||||
|
||||
static struct gpio_led tx28_stk5v3_leds[] = {
|
||||
static const struct gpio_led tx28_stk5v3_leds[] __initconst = {
|
||||
{
|
||||
.name = "GPIO-LED",
|
||||
.default_trigger = "heartbeat",
|
||||
|
@ -151,8 +151,7 @@ static void __init tx28_stk5v3_init(void)
|
|||
/* spi via ssp will be added when available */
|
||||
spi_register_board_info(tx28_spi_board_info,
|
||||
ARRAY_SIZE(tx28_spi_board_info));
|
||||
mxs_add_platform_device("leds-gpio", 0, NULL, 0,
|
||||
&tx28_stk5v3_led_data, sizeof(tx28_stk5v3_led_data));
|
||||
gpio_led_register_device(0, &tx28_stk5v3_led_data);
|
||||
mx28_add_mxs_i2c(0);
|
||||
i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo,
|
||||
ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo));
|
||||
|
|
|
@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value)
|
|||
static void __init ams_delta_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct map_desc ams_delta_io_desc[] __initdata = {
|
||||
|
@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = ams_delta_init_irq,
|
||||
.init_machine = ams_delta_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
||||
EXPORT_SYMBOL(ams_delta_latch1_write);
|
||||
|
|
|
@ -329,7 +329,7 @@ static void __init omap_fsample_init(void)
|
|||
static void __init omap_fsample_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
/* Only FPGA needs to be mapped here. All others are done with ioremap */
|
||||
|
@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_fsample_init_irq,
|
||||
.init_machine = omap_fsample_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
static void __init omap_generic_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
/* assume no Mini-AB port */
|
||||
|
@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_generic_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = {
|
|||
static void __init h2_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_usb_config h2_usb_config __initdata = {
|
||||
|
@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = h2_init_irq,
|
||||
.init_machine = h2_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -439,7 +439,7 @@ static void __init h3_init(void)
|
|||
static void __init h3_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static void __init h3_map_io(void)
|
||||
|
@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = h3_init_irq,
|
||||
.init_machine = h3_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void)
|
|||
{
|
||||
printk(KERN_INFO "htcherald_init_irq.\n");
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
MACHINE_START(HERALD, "HTC Herald")
|
||||
|
@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = htcherald_init_irq,
|
||||
.init_machine = htcherald_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void)
|
|||
static void __init innovator_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP15XX
|
||||
|
@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = innovator_init_irq,
|
||||
.init_machine = innovator_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void)
|
|||
omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004);
|
||||
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static const unsigned int nokia770_keymap[] = {
|
||||
|
@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_nokia770_init_irq,
|
||||
.init_machine = omap_nokia770_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -282,7 +282,7 @@ static void __init osk_init_cf(void)
|
|||
static void __init osk_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_usb_config osk_usb_config __initdata = {
|
||||
|
@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = osk_init_irq,
|
||||
.init_machine = osk_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -62,7 +62,7 @@
|
|||
static void __init omap_palmte_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static const unsigned int palmte_keymap[] = {
|
||||
|
@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_palmte_init_irq,
|
||||
.init_machine = omap_palmte_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = {
|
|||
static void __init omap_palmtt_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static struct omap_usb_config palmtt_usb_config __initdata = {
|
||||
|
@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_palmtt_init_irq,
|
||||
.init_machine = omap_palmtt_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -61,7 +61,7 @@ static void __init
|
|||
omap_palmz71_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static const unsigned int palmz71_keymap[] = {
|
||||
|
@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_palmz71_init_irq,
|
||||
.init_machine = omap_palmz71_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void)
|
|||
static void __init omap_perseus2_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
/* Only FPGA needs to be mapped here. All others are done with ioremap */
|
||||
static struct map_desc omap_perseus2_io_desc[] __initdata = {
|
||||
|
@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_perseus2_init_irq,
|
||||
.init_machine = omap_perseus2_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -411,7 +411,7 @@ static void __init omap_sx1_init(void)
|
|||
static void __init omap_sx1_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
/*----------------------------------------*/
|
||||
|
||||
|
@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = omap_sx1_init_irq,
|
||||
.init_machine = omap_sx1_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = {
|
|||
static void __init voiceblue_init_irq(void)
|
||||
{
|
||||
omap1_init_common_hw();
|
||||
omap_init_irq();
|
||||
omap1_init_irq();
|
||||
}
|
||||
|
||||
static void __init voiceblue_map_io(void)
|
||||
|
@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910")
|
|||
.reserve = omap_reserve,
|
||||
.init_irq = voiceblue_init_irq,
|
||||
.init_machine = voiceblue_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap1_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = {
|
|||
.irq_set_wake = omap_wake_irq,
|
||||
};
|
||||
|
||||
void __init omap_init_irq(void)
|
||||
void __init omap1_init_irq(void)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
|
|
|
@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id)
|
|||
* On 1510, 1610 and 1710, McBSP1 and McBSP3
|
||||
* are DSP public peripherals.
|
||||
*/
|
||||
if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
|
||||
if (id == 0 || id == 2) {
|
||||
if (dsp_use++ == 0) {
|
||||
api_clk = clk_get(NULL, "api_ck");
|
||||
dsp_clk = clk_get(NULL, "dsp_ck");
|
||||
|
@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id)
|
|||
|
||||
static void omap1_mcbsp_free(unsigned int id)
|
||||
{
|
||||
if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) {
|
||||
if (id == 0 || id == 2) {
|
||||
if (--dsp_use == 0) {
|
||||
if (!IS_ERR(api_clk)) {
|
||||
clk_disable(api_clk);
|
||||
|
|
|
@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void)
|
|||
* Timer initialization
|
||||
* ---------------------------------------------------------------------------
|
||||
*/
|
||||
static void __init omap_timer_init(void)
|
||||
static void __init omap1_timer_init(void)
|
||||
{
|
||||
if (omap_32k_timer_usable()) {
|
||||
preferred_sched_clock_init(1);
|
||||
|
@ -307,6 +307,6 @@ static void __init omap_timer_init(void)
|
|||
}
|
||||
}
|
||||
|
||||
struct sys_timer omap_timer = {
|
||||
.init = omap_timer_init,
|
||||
struct sys_timer omap1_timer = {
|
||||
.init = omap1_timer_init,
|
||||
};
|
||||
|
|
|
@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void)
|
|||
bool __init omap_32k_timer_init(void)
|
||||
{
|
||||
omap_init_clocksource_32k();
|
||||
|
||||
#ifdef CONFIG_OMAP_DM_TIMER
|
||||
omap_dm_timer_init();
|
||||
#endif
|
||||
omap_init_32k_timer();
|
||||
|
||||
return true;
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
#
|
||||
|
||||
# Common support
|
||||
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \
|
||||
obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \
|
||||
common.o gpio.o dma.o wd_timer.o
|
||||
|
||||
omap-2-3-common = irq.o sdrc.o
|
||||
|
@ -145,9 +145,19 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o
|
|||
obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o
|
||||
|
||||
# hwmod data
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \
|
||||
omap_hwmod_2xxx_3xxx_ipblock_data.o \
|
||||
omap_hwmod_2xxx_interconnect_data.o \
|
||||
omap_hwmod_2xxx_3xxx_interconnect_data.o \
|
||||
omap_hwmod_2420_data.o
|
||||
obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \
|
||||
omap_hwmod_2xxx_3xxx_ipblock_data.o \
|
||||
omap_hwmod_2xxx_interconnect_data.o \
|
||||
omap_hwmod_2xxx_3xxx_interconnect_data.o \
|
||||
omap_hwmod_2430_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \
|
||||
omap_hwmod_2xxx_3xxx_interconnect_data.o \
|
||||
omap_hwmod_3xxx_data.o
|
||||
obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o
|
||||
|
||||
# EMU peripherals
|
||||
|
@ -269,4 +279,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o
|
|||
disp-$(CONFIG_OMAP2_DSS) := display.o
|
||||
obj-y += $(disp-m) $(disp-y)
|
||||
|
||||
obj-y += common-board-devices.o
|
||||
obj-y += common-board-devices.o twl-common.o
|
||||
|
|
|
@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap_2430sdp_map_io,
|
||||
.init_early = omap_2430sdp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_2430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void)
|
|||
omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL);
|
||||
}
|
||||
|
||||
static int sdp3430_batt_table[] = {
|
||||
/* 0 C*/
|
||||
30800, 29500, 28300, 27100,
|
||||
26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
|
||||
17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
|
||||
11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
|
||||
8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
|
||||
5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
|
||||
4040, 3910, 3790, 3670, 3550
|
||||
};
|
||||
|
||||
static struct twl4030_bci_platform_data sdp3430_bci_data = {
|
||||
.battery_tmp_tbl = sdp3430_batt_table,
|
||||
.tblsize = ARRAY_SIZE(sdp3430_batt_table),
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 1,
|
||||
|
@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
|
|||
.setup = sdp3430_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data sdp3430_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_madc_platform_data sdp3430_madc_data = {
|
||||
.irq_line = 1,
|
||||
};
|
||||
|
||||
/* regulator consumer mappings */
|
||||
|
||||
/* ads7846 on SPI */
|
||||
|
@ -307,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
|
|||
REGULATOR_SUPPLY("vcc", "spi1.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
@ -433,54 +399,10 @@ static struct regulator_init_data sdp3430_vsim = {
|
|||
.consumer_supplies = sdp3430_vsim_supplies,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video */
|
||||
static struct regulator_init_data sdp3430_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies),
|
||||
.consumer_supplies = sdp3430_vdda_dac_supplies,
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp3430_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies),
|
||||
.consumer_supplies = sdp3430_vpll2_supplies,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data sdp3430_audio;
|
||||
|
||||
static struct twl4030_codec_data sdp3430_codec = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &sdp3430_audio,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data sdp3430_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.bci = &sdp3430_bci_data,
|
||||
.gpio = &sdp3430_gpio_data,
|
||||
.madc = &sdp3430_madc_data,
|
||||
.keypad = &sdp3430_kp_data,
|
||||
.usb = &sdp3430_usb_data,
|
||||
.codec = &sdp3430_codec,
|
||||
|
||||
.vaux1 = &sdp3430_vaux1,
|
||||
.vaux2 = &sdp3430_vaux2,
|
||||
|
@ -489,14 +411,21 @@ static struct twl4030_platform_data sdp3430_twldata = {
|
|||
.vmmc1 = &sdp3430_vmmc1,
|
||||
.vmmc2 = &sdp3430_vmmc2,
|
||||
.vsim = &sdp3430_vsim,
|
||||
.vdac = &sdp3430_vdac,
|
||||
.vpll2 = &sdp3430_vpll2,
|
||||
};
|
||||
|
||||
static int __init omap3430_i2c_init(void)
|
||||
{
|
||||
/* i2c1 for PMIC only */
|
||||
omap3_pmic_get_config(&sdp3430_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
sdp3430_twldata.vdac->constraints.apply_uV = true;
|
||||
sdp3430_twldata.vpll2->constraints.apply_uV = true;
|
||||
sdp3430_twldata.vpll2->constraints.name = "VDVI";
|
||||
|
||||
omap3_pmic_init("twl4030", &sdp3430_twldata);
|
||||
|
||||
/* i2c2 on camera connector (for sensor control) and optional isp1301 */
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
/* i2c3 on display connector (for DVI, tfp410) */
|
||||
|
@ -804,7 +733,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_3430sdp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_3430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_sdp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_sdp_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -40,7 +40,6 @@
|
|||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "timer-gp.h"
|
||||
#include "control.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
|
@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void)
|
|||
{
|
||||
omap2_init_common_infrastructure();
|
||||
omap2_init_common_devices(NULL, NULL);
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(1);
|
||||
#endif
|
||||
}
|
||||
|
||||
static struct omap_musb_board_data musb_board_data = {
|
||||
|
@ -306,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = {
|
|||
.power = 100,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data omap4_usbphy_data = {
|
||||
.phy_init = omap4430_phy_init,
|
||||
.phy_exit = omap4430_phy_exit,
|
||||
.phy_power = omap4430_phy_power,
|
||||
.phy_set_clock = omap4430_phy_set_clk,
|
||||
.phy_suspend = omap4430_phy_suspend,
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 2,
|
||||
|
@ -333,16 +321,7 @@ static struct omap2_hsmmc_info mmc[] = {
|
|||
};
|
||||
|
||||
static struct regulator_consumer_supply sdp4430_vaux_supply[] = {
|
||||
{
|
||||
.supply = "vmmc",
|
||||
.dev_name = "omap_hsmmc.1",
|
||||
},
|
||||
};
|
||||
static struct regulator_consumer_supply sdp4430_vmmc_supply[] = {
|
||||
{
|
||||
.supply = "vmmc",
|
||||
.dev_name = "omap_hsmmc.0",
|
||||
},
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static int omap4_twl6030_hsmmc_late_init(struct device *dev)
|
||||
|
@ -399,65 +378,10 @@ static struct regulator_init_data sdp4430_vaux1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply),
|
||||
.consumer_supplies = sdp4430_vaux_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vaux2 = {
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 2800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vaux3 = {
|
||||
.constraints = {
|
||||
.min_uV = 1000000,
|
||||
.max_uV = 3000000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 card */
|
||||
static struct regulator_init_data sdp4430_vmmc = {
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 3000000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = sdp4430_vmmc_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vpp = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 2500000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vusim = {
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
|
@ -471,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vana = {
|
||||
.constraints = {
|
||||
.min_uV = 2100000,
|
||||
.max_uV = 2100000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vcxio = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_vusb = {
|
||||
.constraints = {
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data sdp4430_clk32kg = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data sdp4430_twldata = {
|
||||
.irq_base = TWL6030_IRQ_BASE,
|
||||
.irq_end = TWL6030_IRQ_END,
|
||||
|
||||
/* Regulators */
|
||||
.vmmc = &sdp4430_vmmc,
|
||||
.vpp = &sdp4430_vpp,
|
||||
.vusim = &sdp4430_vusim,
|
||||
.vana = &sdp4430_vana,
|
||||
.vcxio = &sdp4430_vcxio,
|
||||
.vdac = &sdp4430_vdac,
|
||||
.vusb = &sdp4430_vusb,
|
||||
.vaux1 = &sdp4430_vaux1,
|
||||
.vaux2 = &sdp4430_vaux2,
|
||||
.vaux3 = &sdp4430_vaux3,
|
||||
.clk32kg = &sdp4430_clk32kg,
|
||||
.usb = &omap4_usbphy_data
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {
|
||||
|
@ -556,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = {
|
|||
};
|
||||
static int __init omap4_i2c_init(void)
|
||||
{
|
||||
omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB,
|
||||
TWL_COMMON_REGULATOR_VDAC |
|
||||
TWL_COMMON_REGULATOR_VAUX2 |
|
||||
TWL_COMMON_REGULATOR_VAUX3 |
|
||||
TWL_COMMON_REGULATOR_VMMC |
|
||||
TWL_COMMON_REGULATOR_VPP |
|
||||
TWL_COMMON_REGULATOR_VANA |
|
||||
TWL_COMMON_REGULATOR_VCXIO |
|
||||
TWL_COMMON_REGULATOR_VUSB |
|
||||
TWL_COMMON_REGULATOR_CLK32KG);
|
||||
omap4_pmic_init("twl6030", &sdp4430_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo,
|
||||
|
@ -773,5 +643,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board")
|
|||
.init_early = omap_4430sdp_init_early,
|
||||
.init_irq = gic_init_irq,
|
||||
.init_machine = omap_4430sdp_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap4_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = am3517_crane_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = am3517_crane_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = am3517_evm_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = am3517_evm_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap_apollon_map_io,
|
||||
.init_early = omap_apollon_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_apollon_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = {
|
|||
static struct omap_nand_platform_data cm_t35_nand_data = {
|
||||
.parts = cm_t35_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
|
||||
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
.cs = 0,
|
||||
|
||||
};
|
||||
|
||||
static void __init cm_t35_init_nand(void)
|
||||
|
@ -337,19 +335,17 @@ static void __init cm_t35_init_display(void)
|
|||
}
|
||||
}
|
||||
|
||||
static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply cm_t35_vsim_supply = {
|
||||
.supply = "vmmc_aux",
|
||||
static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply cm_t35_vdac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
static struct regulator_consumer_supply cm_t35_vdvi_supply =
|
||||
REGULATOR_SUPPLY("vdvi", "omapdss");
|
||||
static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
|
||||
REGULATOR_SUPPLY("vdvi", "omapdss"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
static struct regulator_init_data cm_t35_vmmc1 = {
|
||||
|
@ -362,8 +358,8 @@ static struct regulator_init_data cm_t35_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &cm_t35_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
|
||||
.consumer_supplies = cm_t35_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
|
||||
|
@ -377,41 +373,8 @@ static struct regulator_init_data cm_t35_vsim = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &cm_t35_vsim_supply,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
static struct regulator_init_data cm_t35_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &cm_t35_vdac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_init_data cm_t35_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &cm_t35_vdvi_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data cm_t35_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
.num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
|
||||
.consumer_supplies = cm_t35_vsim_supply,
|
||||
};
|
||||
|
||||
static uint32_t cm_t35_keymap[] = {
|
||||
|
@ -481,10 +444,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
|
|||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
/* link regulators to MMC adapters */
|
||||
cm_t35_vmmc1_supply.dev = mmc[0].dev;
|
||||
cm_t35_vsim_supply.dev = mmc[0].dev;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -496,21 +455,23 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
|
|||
};
|
||||
|
||||
static struct twl4030_platform_data cm_t35_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &cm_t35_kp_data,
|
||||
.usb = &cm_t35_usb_data,
|
||||
.gpio = &cm_t35_gpio_data,
|
||||
.vmmc1 = &cm_t35_vmmc1,
|
||||
.vsim = &cm_t35_vsim,
|
||||
.vdac = &cm_t35_vdac,
|
||||
.vpll2 = &cm_t35_vpll2,
|
||||
};
|
||||
|
||||
static void __init cm_t35_init_i2c(void)
|
||||
{
|
||||
omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
cm_t35_twldata.vpll2->constraints.name = "VDVI";
|
||||
cm_t35_twldata.vpll2->num_consumer_supplies =
|
||||
ARRAY_SIZE(cm_t35_vdvi_supply);
|
||||
cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
|
||||
|
||||
omap3_pmic_init("tps65930", &cm_t35_twldata);
|
||||
}
|
||||
|
||||
|
@ -646,7 +607,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = cm_t35_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = cm_t35_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = {
|
|||
static struct omap_nand_platform_data cm_t3517_nand_data = {
|
||||
.parts = cm_t3517_nand_partitions,
|
||||
.nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions),
|
||||
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
.cs = 0,
|
||||
};
|
||||
|
||||
|
@ -304,7 +303,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = cm_t3517_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = cm_t3517_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -58,7 +58,6 @@
|
|||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "timer-gp.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#define OMAP_DM9000_GPIO_IRQ 25
|
||||
|
@ -130,13 +129,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
|
|||
gpio_set_value_cansleep(dssdev->reset_gpio, 0);
|
||||
}
|
||||
|
||||
static struct regulator_consumer_supply devkit8000_vmmc1_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
|
||||
|
||||
static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* ads7846 on SPI */
|
||||
static struct regulator_consumer_supply devkit8000_vio_supply =
|
||||
REGULATOR_SUPPLY("vcc", "spi2.0");
|
||||
static struct regulator_consumer_supply devkit8000_vio_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "spi2.0"),
|
||||
};
|
||||
|
||||
static struct panel_generic_dpi_data lcd_panel = {
|
||||
.name = "generic",
|
||||
|
@ -186,9 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = {
|
|||
.default_device = &devkit8000_lcd_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply devkit8000_vdda_dac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_1),
|
||||
KEY(1, 0, KEY_2),
|
||||
|
@ -284,22 +281,8 @@ static struct regulator_init_data devkit8000_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &devkit8000_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
static struct regulator_init_data devkit8000_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &devkit8000_vdda_dac_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
|
||||
.consumer_supplies = devkit8000_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VPLL1 for digital video outputs */
|
||||
|
@ -327,31 +310,14 @@ static struct regulator_init_data devkit8000_vio = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &devkit8000_vio_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data devkit8000_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data devkit8000_audio_data;
|
||||
|
||||
static struct twl4030_codec_data devkit8000_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &devkit8000_audio_data,
|
||||
.num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
|
||||
.consumer_supplies = devkit8000_vio_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data devkit8000_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.usb = &devkit8000_usb_data,
|
||||
.gpio = &devkit8000_gpio_data,
|
||||
.codec = &devkit8000_codec_data,
|
||||
.vmmc1 = &devkit8000_vmmc1,
|
||||
.vdac = &devkit8000_vdac,
|
||||
.vpll1 = &devkit8000_vpll1,
|
||||
.vio = &devkit8000_vio,
|
||||
.keypad = &devkit8000_kp_data,
|
||||
|
@ -359,6 +325,9 @@ static struct twl4030_platform_data devkit8000_twldata = {
|
|||
|
||||
static int __init devkit8000_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&devkit8000_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC);
|
||||
omap3_pmic_init("tps65930", &devkit8000_twldata);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
|
@ -438,10 +407,7 @@ static void __init devkit8000_init_early(void)
|
|||
|
||||
static void __init devkit8000_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
omap3_init_irq();
|
||||
}
|
||||
|
||||
#define OMAP_DM9000_BASE 0x2c000000
|
||||
|
@ -707,5 +673,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
|
|||
.init_early = devkit8000_init_early,
|
||||
.init_irq = devkit8000_init_irq,
|
||||
.init_machine = devkit8000_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = {
|
|||
};
|
||||
|
||||
static struct omap_nand_platform_data board_nand_data = {
|
||||
.nand_setup = NULL,
|
||||
.gpmc_t = &nand_timings,
|
||||
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
.dev_ready = NULL,
|
||||
.devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */
|
||||
};
|
||||
|
||||
void
|
||||
|
|
|
@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap_generic_map_io,
|
||||
.init_early = omap_generic_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = omap_generic_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void)
|
|||
|
||||
static void __init omap_h4_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
omap2_init_irq();
|
||||
}
|
||||
|
||||
static struct at24_platform_data m24c01 = {
|
||||
|
@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board")
|
|||
.init_early = omap_h4_init_early,
|
||||
.init_irq = omap_h4_init_irq,
|
||||
.init_machine = omap_h4_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void)
|
|||
static inline void __init igep2_init_smsc911x(void) { }
|
||||
#endif
|
||||
|
||||
static struct regulator_consumer_supply igep_vmmc1_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
|
||||
static struct regulator_consumer_supply igep_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
|
||||
static struct regulator_init_data igep_vmmc1 = {
|
||||
|
@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &igep_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply),
|
||||
.consumer_supplies = igep_vmmc1_supply,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply igep_vio_supply =
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1");
|
||||
static struct regulator_consumer_supply igep_vio_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data igep_vio = {
|
||||
.constraints = {
|
||||
|
@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &igep_vio_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep_vio_supply),
|
||||
.consumer_supplies = igep_vio_supply,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply igep_vmmc2_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
|
||||
static struct regulator_consumer_supply igep_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data igep_vmmc2 = {
|
||||
.constraints = {
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL,
|
||||
.always_on = 1,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &igep_vmmc2_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply),
|
||||
.consumer_supplies = igep_vmmc2_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config igep_vwlan = {
|
||||
|
@ -440,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = {
|
|||
.setup = igep_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data igep_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static int igep2_enable_dvi(struct omap_dss_device *dssdev)
|
||||
{
|
||||
gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1);
|
||||
|
@ -480,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = {
|
|||
.default_device = &igep2_dvi_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply igep2_vpll2_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data igep2_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies),
|
||||
.consumer_supplies = igep2_vpll2_supplies,
|
||||
};
|
||||
|
||||
static void __init igep2_display_init(void)
|
||||
{
|
||||
int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH,
|
||||
|
@ -519,13 +498,6 @@ static void __init igep_init_early(void)
|
|||
m65kxxxxam_sdrc_params);
|
||||
}
|
||||
|
||||
static struct twl4030_codec_audio_data igep2_audio_data;
|
||||
|
||||
static struct twl4030_codec_data igep2_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &igep2_audio_data,
|
||||
};
|
||||
|
||||
static int igep2_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_RIGHT),
|
||||
|
@ -558,11 +530,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = {
|
|||
};
|
||||
|
||||
static struct twl4030_platform_data igep_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.usb = &igep_usb_data,
|
||||
.gpio = &igep_twl4030_gpio_pdata,
|
||||
.vmmc1 = &igep_vmmc1,
|
||||
.vio = &igep_vio,
|
||||
|
@ -578,6 +546,8 @@ static void __init igep_i2c_init(void)
|
|||
{
|
||||
int ret;
|
||||
|
||||
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0);
|
||||
|
||||
if (machine_is_igep0020()) {
|
||||
/*
|
||||
* Bus 3 is attached to the DVI port where devices like the
|
||||
|
@ -588,9 +558,12 @@ static void __init igep_i2c_init(void)
|
|||
if (ret)
|
||||
pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret);
|
||||
|
||||
igep_twldata.codec = &igep2_codec_data;
|
||||
igep_twldata.keypad = &igep2_keypad_pdata;
|
||||
igep_twldata.vpll2 = &igep2_vpll2;
|
||||
/* Get common pmic data */
|
||||
omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VPLL2);
|
||||
igep_twldata.vpll2->constraints.apply_uV = true;
|
||||
igep_twldata.vpll2->constraints.name = "VDVI";
|
||||
}
|
||||
|
||||
omap3_pmic_init("twl4030", &igep_twldata);
|
||||
|
@ -703,9 +676,9 @@ MACHINE_START(IGEP0020, "IGEP v2 board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = igep_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = igep_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
||||
|
@ -713,7 +686,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = igep_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = igep_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -199,22 +199,14 @@ static void __init omap_ldp_init_early(void)
|
|||
omap2_init_common_devices(NULL, NULL);
|
||||
}
|
||||
|
||||
static struct twl4030_usb_data ldp_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_gpio_platform_data ldp_gpio_data = {
|
||||
.gpio_base = OMAP_MAX_GPIO_LINES,
|
||||
.irq_base = TWL4030_GPIO_IRQ_BASE,
|
||||
.irq_end = TWL4030_GPIO_IRQ_END,
|
||||
};
|
||||
|
||||
static struct twl4030_madc_platform_data ldp_madc_data = {
|
||||
.irq_line = 1,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply ldp_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply ldp_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
|
@ -228,8 +220,8 @@ static struct regulator_init_data ldp_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &ldp_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply),
|
||||
.consumer_supplies = ldp_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* ads7846 on SPI */
|
||||
|
@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = {
|
|||
};
|
||||
|
||||
static struct twl4030_platform_data ldp_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.madc = &ldp_madc_data,
|
||||
.usb = &ldp_usb_data,
|
||||
.vmmc1 = &ldp_vmmc1,
|
||||
.vaux1 = &ldp_vaux1,
|
||||
.gpio = &ldp_gpio_data,
|
||||
|
@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = {
|
|||
|
||||
static int __init omap_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&ldp_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0);
|
||||
omap3_pmic_init("twl4030", &ldp_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
|
@ -341,8 +330,6 @@ static void __init omap_ldp_init(void)
|
|||
ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0);
|
||||
|
||||
omap2_hsmmc_init(mmc);
|
||||
/* link regulators to MMC adapters */
|
||||
ldp_vmmc1_supply.dev = mmc[0].dev;
|
||||
}
|
||||
|
||||
MACHINE_START(OMAP_LDP, "OMAP LDP board")
|
||||
|
@ -350,7 +337,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_ldp_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_ldp_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -699,9 +699,9 @@ MACHINE_START(NOKIA_N800, "Nokia N800")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_N810, "Nokia N810")
|
||||
|
@ -709,9 +709,9 @@ MACHINE_START(NOKIA_N810, "Nokia N810")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
|
||||
|
@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = n8x0_map_io,
|
||||
.init_early = n8x0_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap2_init_irq,
|
||||
.init_machine = n8x0_init_machine,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap2_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -50,7 +50,6 @@
|
|||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "timer-gp.h"
|
||||
#include "pm.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
|
@ -210,14 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = {
|
|||
.default_device = &beagle_dvi_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply beagle_vdac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
static struct regulator_consumer_supply beagle_vdvi_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static void __init beagle_display_init(void)
|
||||
{
|
||||
int r;
|
||||
|
@ -239,12 +230,12 @@ static struct omap2_hsmmc_info mmc[] = {
|
|||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply beagle_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply beagle_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply beagle_vsim_supply = {
|
||||
.supply = "vmmc_aux",
|
||||
static struct regulator_consumer_supply beagle_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct gpio_led gpio_leds[];
|
||||
|
@ -267,10 +258,6 @@ static int beagle_twl_gpio_setup(struct device *dev,
|
|||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
/* link regulators to MMC adapters */
|
||||
beagle_vmmc1_supply.dev = mmc[0].dev;
|
||||
beagle_vsim_supply.dev = mmc[0].dev;
|
||||
|
||||
/*
|
||||
* TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active
|
||||
* high / others active low)
|
||||
|
@ -336,8 +323,8 @@ static struct regulator_init_data beagle_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &beagle_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(beagle_vmmc1_supply),
|
||||
.consumer_supplies = beagle_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
|
||||
|
@ -351,62 +338,15 @@ static struct regulator_init_data beagle_vsim = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &beagle_vsim_supply,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
static struct regulator_init_data beagle_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &beagle_vdac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_init_data beagle_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies),
|
||||
.consumer_supplies = beagle_vdvi_supplies,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data beagle_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data beagle_audio_data;
|
||||
|
||||
static struct twl4030_codec_data beagle_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &beagle_audio_data,
|
||||
.num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply),
|
||||
.consumer_supplies = beagle_vsim_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data beagle_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.usb = &beagle_usb_data,
|
||||
.gpio = &beagle_gpio_data,
|
||||
.codec = &beagle_codec_data,
|
||||
.vmmc1 = &beagle_vmmc1,
|
||||
.vsim = &beagle_vsim,
|
||||
.vdac = &beagle_vdac,
|
||||
.vpll2 = &beagle_vpll2,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
|
||||
|
@ -417,6 +357,12 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = {
|
|||
|
||||
static int __init omap3_beagle_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&beagle_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
beagle_twldata.vpll2->constraints.name = "VDVI";
|
||||
|
||||
omap3_pmic_init("twl4030", &beagle_twldata);
|
||||
/* Bus 3 is attached to the DVI port where devices like the pico DLP
|
||||
* projector don't work reliably with 400kHz */
|
||||
|
@ -486,10 +432,7 @@ static void __init omap3_beagle_init_early(void)
|
|||
|
||||
static void __init omap3_beagle_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
omap3_init_irq();
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_beagle_devices[] __initdata = {
|
||||
|
@ -599,5 +542,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board")
|
|||
.init_early = omap3_beagle_init_early,
|
||||
.init_irq = omap3_beagle_init_irq,
|
||||
.init_machine = omap3_beagle_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = {
|
|||
.default_device = &omap3_evm_lcd_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vsim_supply = {
|
||||
.supply = "vmmc_aux",
|
||||
static struct regulator_consumer_supply omap3evm_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
|
@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3evm_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply),
|
||||
.consumer_supplies = omap3evm_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
|
||||
|
@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3evm_vsim_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply),
|
||||
.consumer_supplies = omap3evm_vsim_supply,
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
|
@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev,
|
|||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
/* link regulators to MMC adapters */
|
||||
omap3evm_vmmc1_supply.dev = mmc[0].dev;
|
||||
omap3evm_vsim_supply.dev = mmc[0].dev;
|
||||
|
||||
/*
|
||||
* Most GPIOs are for USB OTG. Some are mostly sent to
|
||||
* the P2 connector; notably LEDA for the LCD backlight.
|
||||
|
@ -400,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = {
|
|||
.setup = omap3evm_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data omap3evm_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_DOWN),
|
||||
|
@ -438,58 +430,10 @@ static struct twl4030_keypad_data omap3evm_kp_data = {
|
|||
.rep = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_madc_platform_data omap3evm_madc_data = {
|
||||
.irq_line = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data omap3evm_audio_data;
|
||||
|
||||
static struct twl4030_codec_data omap3evm_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &omap3evm_audio_data,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3_evm_vdda_dac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
/* VDAC for DSS driving S-Video */
|
||||
static struct regulator_init_data omap3_evm_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3_evm_vdda_dac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap3_evm_vpll2 = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies),
|
||||
.consumer_supplies = omap3_evm_vpll2_supplies,
|
||||
};
|
||||
|
||||
/* ads7846 on SPI */
|
||||
static struct regulator_consumer_supply omap3evm_vio_supply =
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0");
|
||||
static struct regulator_consumer_supply omap3evm_vio_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0"),
|
||||
};
|
||||
|
||||
/* VIO for ads7846 */
|
||||
static struct regulator_init_data omap3evm_vio = {
|
||||
|
@ -502,8 +446,8 @@ static struct regulator_init_data omap3evm_vio = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3evm_vio_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply),
|
||||
.consumer_supplies = omap3evm_vio_supply,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_WL12XX_PLATFORM_DATA
|
||||
|
@ -511,16 +455,17 @@ static struct regulator_init_data omap3evm_vio = {
|
|||
#define OMAP3EVM_WLAN_PMENA_GPIO (150)
|
||||
#define OMAP3EVM_WLAN_IRQ_GPIO (149)
|
||||
|
||||
static struct regulator_consumer_supply omap3evm_vmmc2_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
|
||||
static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
/* VMMC2 for driving the WL12xx module */
|
||||
static struct regulator_init_data omap3evm_vmmc2 = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3evm_vmmc2_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply),
|
||||
.consumer_supplies = omap3evm_vmmc2_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config omap3evm_vwlan = {
|
||||
|
@ -548,17 +493,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = {
|
|||
#endif
|
||||
|
||||
static struct twl4030_platform_data omap3evm_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3evm_kp_data,
|
||||
.madc = &omap3evm_madc_data,
|
||||
.usb = &omap3evm_usb_data,
|
||||
.gpio = &omap3evm_gpio_data,
|
||||
.codec = &omap3evm_codec_data,
|
||||
.vdac = &omap3_evm_vdac,
|
||||
.vpll2 = &omap3_evm_vpll2,
|
||||
.vio = &omap3evm_vio,
|
||||
.vmmc1 = &omap3evm_vmmc1,
|
||||
.vsim = &omap3evm_vsim,
|
||||
|
@ -566,6 +503,14 @@ static struct twl4030_platform_data omap3evm_twldata = {
|
|||
|
||||
static int __init omap3_evm_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3evm_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
omap3evm_twldata.vdac->constraints.apply_uV = true;
|
||||
omap3evm_twldata.vpll2->constraints.apply_uV = true;
|
||||
|
||||
omap3_pmic_init("twl4030", &omap3evm_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
|
@ -740,7 +685,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3_evm_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3_evm_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -35,7 +35,6 @@
|
|||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "timer-gp.h"
|
||||
#include "control.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
|
@ -55,8 +54,8 @@
|
|||
#define OMAP3_TORPEDO_MMC_GPIO_CD 127
|
||||
#define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129
|
||||
|
||||
static struct regulator_consumer_supply omap3logic_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
|
@ -71,8 +70,8 @@ static struct regulator_init_data omap3logic_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3logic_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3logic_vmmc1_supply),
|
||||
.consumer_supplies = omap3logic_vmmc1_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_gpio_platform_data omap3logic_gpio_data = {
|
||||
|
@ -130,8 +129,6 @@ static void __init board_mmc_init(void)
|
|||
}
|
||||
|
||||
omap2_hsmmc_init(board_mmc_info);
|
||||
/* link regulators to MMC adapters */
|
||||
omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev;
|
||||
}
|
||||
|
||||
static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = {
|
||||
|
@ -215,16 +212,16 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board")
|
|||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3logic_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board")
|
||||
.boot_params = 0x80000100,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3logic_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3logic_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -320,17 +320,17 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = {
|
|||
.setup = omap3pandora_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_vmmc1_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
|
||||
static struct regulator_consumer_supply pandora_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_vmmc2_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
|
||||
static struct regulator_consumer_supply pandora_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1")
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_vmmc3_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2");
|
||||
|
||||
static struct regulator_consumer_supply pandora_vdda_dac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
static struct regulator_consumer_supply pandora_vmmc3_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_vdds_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_sdi", "omapdss"),
|
||||
|
@ -338,11 +338,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = {
|
|||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_vcc_lcd_supply =
|
||||
REGULATOR_SUPPLY("vcc", "display0");
|
||||
static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "display0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_usb_phy_supply =
|
||||
REGULATOR_SUPPLY("hsusb0", "ehci-omap.0");
|
||||
static struct regulator_consumer_supply pandora_usb_phy_supply[] = {
|
||||
REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"),
|
||||
};
|
||||
|
||||
/* ads7846 on SPI and 2 nub controllers on I2C */
|
||||
static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
|
||||
|
@ -351,8 +353,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = {
|
|||
REGULATOR_SUPPLY("vcc", "3-0067"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply pandora_adac_supply =
|
||||
REGULATOR_SUPPLY("vcc", "soc-audio");
|
||||
static struct regulator_consumer_supply pandora_adac_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "soc-audio"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
static struct regulator_init_data pandora_vmmc1 = {
|
||||
|
@ -365,8 +368,8 @@ static struct regulator_init_data pandora_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_vmmc1_supply),
|
||||
.consumer_supplies = pandora_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */
|
||||
|
@ -380,38 +383,8 @@ static struct regulator_init_data pandora_vmmc2 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_vmmc2_supply,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video */
|
||||
static struct regulator_init_data pandora_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_vdda_dac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_init_data pandora_vpll2 = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies),
|
||||
.consumer_supplies = pandora_vdds_supplies,
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_vmmc2_supply),
|
||||
.consumer_supplies = pandora_vmmc2_supply,
|
||||
};
|
||||
|
||||
/* VAUX1 for LCD */
|
||||
|
@ -425,8 +398,8 @@ static struct regulator_init_data pandora_vaux1 = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_vcc_lcd_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_vcc_lcd_supply),
|
||||
.consumer_supplies = pandora_vcc_lcd_supply,
|
||||
};
|
||||
|
||||
/* VAUX2 for USB host PHY */
|
||||
|
@ -440,8 +413,8 @@ static struct regulator_init_data pandora_vaux2 = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_usb_phy_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_usb_phy_supply),
|
||||
.consumer_supplies = pandora_usb_phy_supply,
|
||||
};
|
||||
|
||||
/* VAUX4 for ads7846 and nubs */
|
||||
|
@ -470,8 +443,8 @@ static struct regulator_init_data pandora_vsim = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_adac_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_adac_supply),
|
||||
.consumer_supplies = pandora_adac_supply,
|
||||
};
|
||||
|
||||
/* Fixed regulator internal to Wifi module */
|
||||
|
@ -479,8 +452,8 @@ static struct regulator_init_data pandora_vmmc3 = {
|
|||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &pandora_vmmc3_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(pandora_vmmc3_supply),
|
||||
.consumer_supplies = pandora_vmmc3_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config pandora_vwlan = {
|
||||
|
@ -501,29 +474,12 @@ static struct platform_device pandora_vwlan_device = {
|
|||
},
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data omap3pandora_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data omap3pandora_audio_data;
|
||||
|
||||
static struct twl4030_codec_data omap3pandora_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &omap3pandora_audio_data,
|
||||
};
|
||||
|
||||
static struct twl4030_bci_platform_data pandora_bci_data;
|
||||
|
||||
static struct twl4030_platform_data omap3pandora_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
.gpio = &omap3pandora_gpio_data,
|
||||
.usb = &omap3pandora_usb_data,
|
||||
.codec = &omap3pandora_codec_data,
|
||||
.vmmc1 = &pandora_vmmc1,
|
||||
.vmmc2 = &pandora_vmmc2,
|
||||
.vdac = &pandora_vdac,
|
||||
.vpll2 = &pandora_vpll2,
|
||||
.vaux1 = &pandora_vaux1,
|
||||
.vaux2 = &pandora_vaux2,
|
||||
.vaux4 = &pandora_vaux4,
|
||||
|
@ -541,6 +497,17 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = {
|
|||
|
||||
static int __init omap3pandora_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3pandora_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
omap3pandora_twldata.vdac->constraints.apply_uV = true;
|
||||
|
||||
omap3pandora_twldata.vpll2->constraints.apply_uV = true;
|
||||
omap3pandora_twldata.vpll2->num_consumer_supplies =
|
||||
ARRAY_SIZE(pandora_vdds_supplies);
|
||||
omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies;
|
||||
|
||||
omap3_pmic_init("tps65950", &omap3pandora_twldata);
|
||||
/* i2c2 pins are not connected */
|
||||
omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo,
|
||||
|
@ -643,7 +610,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap3pandora_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap3pandora_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -52,7 +52,6 @@
|
|||
#include "sdram-micron-mt46h32m32lf-6.h"
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "timer-gp.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
|
||||
|
@ -206,12 +205,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = {
|
|||
.default_device = &omap3_stalker_dvi_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3stalker_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3stalker_vsim_supply = {
|
||||
.supply = "vmmc_aux",
|
||||
static struct regulator_consumer_supply omap3stalker_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
|
@ -224,8 +223,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3stalker_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply),
|
||||
.consumer_supplies = omap3stalker_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
|
||||
|
@ -238,8 +237,8 @@ static struct regulator_init_data omap3stalker_vsim = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3stalker_vsim_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply),
|
||||
.consumer_supplies = omap3stalker_vsim_supply,
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
|
@ -321,10 +320,6 @@ omap3stalker_twl_gpio_setup(struct device *dev,
|
|||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
/* link regulators to MMC adapters */
|
||||
omap3stalker_vmmc1_supply.dev = mmc[0].dev;
|
||||
omap3stalker_vsim_supply.dev = mmc[0].dev;
|
||||
|
||||
/*
|
||||
* Most GPIOs are for USB OTG. Some are mostly sent to
|
||||
* the P2 connector; notably LEDA for the LCD backlight.
|
||||
|
@ -354,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = {
|
|||
.setup = omap3stalker_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data omap3stalker_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static uint32_t board_keymap[] = {
|
||||
KEY(0, 0, KEY_LEFT),
|
||||
KEY(0, 1, KEY_DOWN),
|
||||
|
@ -392,68 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = {
|
|||
.rep = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_madc_platform_data omap3stalker_madc_data = {
|
||||
.irq_line = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data omap3stalker_audio_data;
|
||||
|
||||
static struct twl4030_codec_data omap3stalker_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &omap3stalker_audio_data,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
/* VDAC for DSS driving S-Video */
|
||||
static struct regulator_init_data omap3_stalker_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap3_stalker_vdda_dac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap3_stalker_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies),
|
||||
.consumer_supplies = omap3_stalker_vpll2_supplies,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data omap3stalker_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.keypad = &omap3stalker_kp_data,
|
||||
.madc = &omap3stalker_madc_data,
|
||||
.usb = &omap3stalker_usb_data,
|
||||
.gpio = &omap3stalker_gpio_data,
|
||||
.codec = &omap3stalker_codec_data,
|
||||
.vdac = &omap3_stalker_vdac,
|
||||
.vpll2 = &omap3_stalker_vpll2,
|
||||
.vmmc1 = &omap3stalker_vmmc1,
|
||||
.vsim = &omap3stalker_vsim,
|
||||
};
|
||||
|
@ -474,6 +407,15 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = {
|
|||
|
||||
static int __init omap3_stalker_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&omap3stalker_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC |
|
||||
TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
omap3stalker_twldata.vdac->constraints.apply_uV = true;
|
||||
omap3stalker_twldata.vpll2->constraints.apply_uV = true;
|
||||
omap3stalker_twldata.vpll2->constraints.name = "VDVI";
|
||||
|
||||
omap3_pmic_init("twl4030", &omap3stalker_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3,
|
||||
|
@ -494,10 +436,7 @@ static void __init omap3_stalker_init_early(void)
|
|||
|
||||
static void __init omap3_stalker_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
omap3_init_irq();
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_stalker_devices[] __initdata = {
|
||||
|
@ -560,5 +499,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER")
|
|||
.init_early = omap3_stalker_init_early,
|
||||
.init_irq = omap3_stalker_init_irq,
|
||||
.init_machine = omap3_stalker_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -51,7 +51,6 @@
|
|||
|
||||
#include "mux.h"
|
||||
#include "hsmmc.h"
|
||||
#include "timer-gp.h"
|
||||
#include "common-board-devices.h"
|
||||
|
||||
#include <asm/setup.h>
|
||||
|
@ -114,12 +113,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = {
|
|||
.ctrl_name = "internal",
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply touchbook_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply touchbook_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply touchbook_vsim_supply = {
|
||||
.supply = "vmmc_aux",
|
||||
static struct regulator_consumer_supply touchbook_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct gpio_led gpio_leds[];
|
||||
|
@ -137,10 +136,6 @@ static int touchbook_twl_gpio_setup(struct device *dev,
|
|||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
/* link regulators to MMC adapters */
|
||||
touchbook_vmmc1_supply.dev = mmc[0].dev;
|
||||
touchbook_vsim_supply.dev = mmc[0].dev;
|
||||
|
||||
/* REVISIT: need ehci-omap hooks for external VBUS
|
||||
* power switch and overcurrent detect
|
||||
*/
|
||||
|
@ -167,14 +162,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = {
|
|||
.setup = touchbook_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply touchbook_vdac_supply = {
|
||||
static struct regulator_consumer_supply touchbook_vdac_supply[] = {
|
||||
{
|
||||
.supply = "vdac",
|
||||
.dev = &omap3_touchbook_lcd_device.dev,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply touchbook_vdvi_supply = {
|
||||
static struct regulator_consumer_supply touchbook_vdvi_supply[] = {
|
||||
{
|
||||
.supply = "vdvi",
|
||||
.dev = &omap3_touchbook_lcd_device.dev,
|
||||
},
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
|
||||
|
@ -188,8 +187,8 @@ static struct regulator_init_data touchbook_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &touchbook_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply),
|
||||
.consumer_supplies = touchbook_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
|
||||
|
@ -203,62 +202,15 @@ static struct regulator_init_data touchbook_vsim = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &touchbook_vsim_supply,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
static struct regulator_init_data touchbook_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &touchbook_vdac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_init_data touchbook_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &touchbook_vdvi_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data touchbook_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data touchbook_audio_data;
|
||||
|
||||
static struct twl4030_codec_data touchbook_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &touchbook_audio_data,
|
||||
.num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply),
|
||||
.consumer_supplies = touchbook_vsim_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data touchbook_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.usb = &touchbook_usb_data,
|
||||
.gpio = &touchbook_gpio_data,
|
||||
.codec = &touchbook_codec_data,
|
||||
.vmmc1 = &touchbook_vmmc1,
|
||||
.vsim = &touchbook_vsim,
|
||||
.vdac = &touchbook_vdac,
|
||||
.vpll2 = &touchbook_vpll2,
|
||||
};
|
||||
|
||||
static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
|
||||
|
@ -270,8 +222,20 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = {
|
|||
static int __init omap3_touchbook_i2c_init(void)
|
||||
{
|
||||
/* Standard TouchBook bus */
|
||||
omap3_pmic_init("twl4030", &touchbook_twldata);
|
||||
omap3_pmic_get_config(&touchbook_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
touchbook_twldata.vdac->num_consumer_supplies =
|
||||
ARRAY_SIZE(touchbook_vdac_supply);
|
||||
touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply;
|
||||
|
||||
touchbook_twldata.vpll2->constraints.name = "VDVI";
|
||||
touchbook_twldata.vpll2->num_consumer_supplies =
|
||||
ARRAY_SIZE(touchbook_vdvi_supply);
|
||||
touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply;
|
||||
|
||||
omap3_pmic_init("twl4030", &touchbook_twldata);
|
||||
/* Additional TouchBook bus */
|
||||
omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo,
|
||||
ARRAY_SIZE(touchBook_i2c_boardinfo));
|
||||
|
@ -371,10 +335,7 @@ static void __init omap3_touchbook_init_early(void)
|
|||
|
||||
static void __init omap3_touchbook_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
#ifdef CONFIG_OMAP_32K_TIMER
|
||||
omap2_gp_clockevent_set_gptimer(12);
|
||||
#endif
|
||||
omap3_init_irq();
|
||||
}
|
||||
|
||||
static struct platform_device *omap3_touchbook_devices[] __initdata = {
|
||||
|
@ -449,5 +410,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board")
|
|||
.init_early = omap3_touchbook_init_early,
|
||||
.init_irq = omap3_touchbook_init_irq,
|
||||
.init_machine = omap3_touchbook_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_secure_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -41,7 +41,6 @@
|
|||
#include <plat/usb.h>
|
||||
#include <plat/mmc.h>
|
||||
#include <video/omap-panel-generic-dpi.h>
|
||||
#include "timer-gp.h"
|
||||
|
||||
#include "hsmmc.h"
|
||||
#include "control.h"
|
||||
|
@ -155,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = {
|
|||
.power = 100,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data omap4_usbphy_data = {
|
||||
.phy_init = omap4430_phy_init,
|
||||
.phy_exit = omap4430_phy_exit,
|
||||
.phy_power = omap4430_phy_power,
|
||||
.phy_set_clock = omap4430_phy_set_clk,
|
||||
.phy_suspend = omap4430_phy_suspend,
|
||||
};
|
||||
|
||||
static struct omap2_hsmmc_info mmc[] = {
|
||||
{
|
||||
.mmc = 1,
|
||||
|
@ -182,24 +173,16 @@ static struct omap2_hsmmc_info mmc[] = {
|
|||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = {
|
||||
{
|
||||
.supply = "vmmc",
|
||||
.dev_name = "omap_hsmmc.0",
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply omap4_panda_vmmc5_supply = {
|
||||
.supply = "vmmc",
|
||||
.dev_name = "omap_hsmmc.4",
|
||||
static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data panda_vmmc5 = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &omap4_panda_vmmc5_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply),
|
||||
.consumer_supplies = omap4_panda_vmmc5_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config panda_vwlan = {
|
||||
|
@ -274,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static struct regulator_init_data omap4_panda_vaux2 = {
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 2800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_vaux3 = {
|
||||
.constraints = {
|
||||
.min_uV = 1000000,
|
||||
.max_uV = 3000000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
/* VMMC1 for MMC1 card */
|
||||
static struct regulator_init_data omap4_panda_vmmc = {
|
||||
.constraints = {
|
||||
.min_uV = 1200000,
|
||||
.max_uV = 3000000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = omap4_panda_vmmc_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_vpp = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 2500000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
|
||||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_vana = {
|
||||
.constraints = {
|
||||
.min_uV = 2100000,
|
||||
.max_uV = 2100000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_vcxio = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_vusb = {
|
||||
.constraints = {
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct regulator_init_data omap4_panda_clk32kg = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data omap4_panda_twldata = {
|
||||
.irq_base = TWL6030_IRQ_BASE,
|
||||
.irq_end = TWL6030_IRQ_END,
|
||||
|
||||
/* Regulators */
|
||||
.vmmc = &omap4_panda_vmmc,
|
||||
.vpp = &omap4_panda_vpp,
|
||||
.vana = &omap4_panda_vana,
|
||||
.vcxio = &omap4_panda_vcxio,
|
||||
.vdac = &omap4_panda_vdac,
|
||||
.vusb = &omap4_panda_vusb,
|
||||
.vaux2 = &omap4_panda_vaux2,
|
||||
.vaux3 = &omap4_panda_vaux3,
|
||||
.clk32kg = &omap4_panda_clk32kg,
|
||||
.usb = &omap4_usbphy_data,
|
||||
};
|
||||
/* Panda board uses the common PMIC configuration */
|
||||
static struct twl4030_platform_data omap4_panda_twldata;
|
||||
|
||||
/*
|
||||
* Display monitor features are burnt in their EEPROM as EDID data. The EEPROM
|
||||
|
@ -409,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = {
|
|||
|
||||
static int __init omap4_panda_i2c_init(void)
|
||||
{
|
||||
omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB,
|
||||
TWL_COMMON_REGULATOR_VDAC |
|
||||
TWL_COMMON_REGULATOR_VAUX2 |
|
||||
TWL_COMMON_REGULATOR_VAUX3 |
|
||||
TWL_COMMON_REGULATOR_VMMC |
|
||||
TWL_COMMON_REGULATOR_VPP |
|
||||
TWL_COMMON_REGULATOR_VANA |
|
||||
TWL_COMMON_REGULATOR_VCXIO |
|
||||
TWL_COMMON_REGULATOR_VUSB |
|
||||
TWL_COMMON_REGULATOR_CLK32KG);
|
||||
omap4_pmic_init("twl6030", &omap4_panda_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
/*
|
||||
|
@ -716,5 +589,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board")
|
|||
.init_early = omap4_panda_init_early,
|
||||
.init_irq = gic_init_irq,
|
||||
.init_machine = omap4_panda_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap4_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -74,15 +74,16 @@
|
|||
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
|
||||
/* fixed regulator for ads7846 */
|
||||
static struct regulator_consumer_supply ads7846_supply =
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0");
|
||||
static struct regulator_consumer_supply ads7846_supply[] = {
|
||||
REGULATOR_SUPPLY("vcc", "spi1.0"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data vads7846_regulator = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &ads7846_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(ads7846_supply),
|
||||
.consumer_supplies = ads7846_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config vads7846 = {
|
||||
|
@ -264,14 +265,6 @@ static struct omap_dss_board_info overo_dss_data = {
|
|||
.default_device = &overo_dvi_device,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply overo_vdda_dac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
static struct regulator_consumer_supply overo_vdds_dsi_supply[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct mtd_partition overo_nand_partitions[] = {
|
||||
{
|
||||
.name = "xloader",
|
||||
|
@ -319,8 +312,8 @@ static struct omap2_hsmmc_info mmc[] = {
|
|||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply overo_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply overo_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
|
@ -415,8 +408,6 @@ static int overo_twl_gpio_setup(struct device *dev,
|
|||
{
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
overo_vmmc1_supply.dev = mmc[0].dev;
|
||||
|
||||
#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
|
||||
/* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
|
||||
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
|
||||
|
@ -433,10 +424,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = {
|
|||
.setup = overo_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data overo_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct regulator_init_data overo_vmmc1 = {
|
||||
.constraints = {
|
||||
.min_uV = 1850000,
|
||||
|
@ -447,59 +434,23 @@ static struct regulator_init_data overo_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &overo_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
|
||||
static struct regulator_init_data overo_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &overo_vdda_dac_supply,
|
||||
};
|
||||
|
||||
/* VPLL2 for digital video outputs */
|
||||
static struct regulator_init_data overo_vpll2 = {
|
||||
.constraints = {
|
||||
.name = "VDVI",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply),
|
||||
.consumer_supplies = overo_vdds_dsi_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data overo_audio_data;
|
||||
|
||||
static struct twl4030_codec_data overo_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &overo_audio_data,
|
||||
.num_consumer_supplies = ARRAY_SIZE(overo_vmmc1_supply),
|
||||
.consumer_supplies = overo_vmmc1_supply,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data overo_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
.gpio = &overo_gpio_data,
|
||||
.usb = &overo_usb_data,
|
||||
.codec = &overo_codec_data,
|
||||
.vmmc1 = &overo_vmmc1,
|
||||
.vdac = &overo_vdac,
|
||||
.vpll2 = &overo_vpll2,
|
||||
};
|
||||
|
||||
static int __init overo_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&overo_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
overo_twldata.vpll2->constraints.name = "VDVI";
|
||||
|
||||
omap3_pmic_init("tps65950", &overo_twldata);
|
||||
/* i2c2 pins are used for gpio */
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
|
@ -615,7 +566,7 @@ MACHINE_START(OVERO, "Gumstix Overo")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = overo_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = overo_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = {
|
|||
.pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15),
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data rm680_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data rm680_twl_data = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
.gpio = &rm680_gpio_data,
|
||||
.usb = &rm680_usb_data,
|
||||
/* add rest of the children here */
|
||||
};
|
||||
|
||||
static void __init rm680_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0);
|
||||
omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
omap_register_i2c_bus(3, 400, NULL, 0);
|
||||
|
@ -163,7 +157,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = rm680_map_io,
|
||||
.init_early = rm680_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = rm680_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = {
|
|||
.rep = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_madc_platform_data rx51_madc_data = {
|
||||
.irq_line = 1,
|
||||
};
|
||||
|
||||
/* Enable input logic and pull all lines up when eMMC is on. */
|
||||
static struct omap_board_mux rx51_mmc2_on_mux[] = {
|
||||
OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0),
|
||||
|
@ -358,14 +354,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = {
|
|||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply rx51_vmmc1_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0");
|
||||
static struct regulator_consumer_supply rx51_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply rx51_vaux3_supply =
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1");
|
||||
static struct regulator_consumer_supply rx51_vaux3_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply rx51_vsim_supply =
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1");
|
||||
static struct regulator_consumer_supply rx51_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply rx51_vmmc2_supplies[] = {
|
||||
/* tlv320aic3x analog supplies */
|
||||
|
@ -395,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = {
|
|||
REGULATOR_SUPPLY("vdd", "2-0063"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply rx51_vdac_supply[] = {
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"),
|
||||
};
|
||||
|
||||
static struct regulator_init_data rx51_vaux1 = {
|
||||
.constraints = {
|
||||
.name = "V28",
|
||||
|
@ -452,8 +447,8 @@ static struct regulator_init_data rx51_vaux3_mmc = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &rx51_vaux3_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply),
|
||||
.consumer_supplies = rx51_vaux3_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data rx51_vaux4 = {
|
||||
|
@ -479,8 +474,8 @@ static struct regulator_init_data rx51_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &rx51_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply),
|
||||
.consumer_supplies = rx51_vmmc1_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data rx51_vmmc2 = {
|
||||
|
@ -511,23 +506,8 @@ static struct regulator_init_data rx51_vsim = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &rx51_vsim_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data rx51_vdac = {
|
||||
.constraints = {
|
||||
.name = "VDAC",
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = rx51_vdac_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply),
|
||||
.consumer_supplies = rx51_vsim_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data rx51_vio = {
|
||||
|
@ -600,10 +580,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = {
|
|||
.setup = rx51_twlgpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data rx51_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_ins sleep_on_seq[] __initdata = {
|
||||
/*
|
||||
* Turn off everything
|
||||
|
@ -775,14 +751,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = {
|
|||
};
|
||||
|
||||
static struct twl4030_platform_data rx51_twldata __initdata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.gpio = &rx51_gpio_data,
|
||||
.keypad = &rx51_kp_data,
|
||||
.madc = &rx51_madc_data,
|
||||
.usb = &rx51_usb_data,
|
||||
.power = &rx51_t2scripts_data,
|
||||
.codec = &rx51_codec_data,
|
||||
|
||||
|
@ -791,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = {
|
|||
.vaux4 = &rx51_vaux4,
|
||||
.vmmc1 = &rx51_vmmc1,
|
||||
.vsim = &rx51_vsim,
|
||||
.vdac = &rx51_vdac,
|
||||
.vio = &rx51_vio,
|
||||
};
|
||||
|
||||
|
@ -847,6 +817,13 @@ static int __init rx51_i2c_init(void)
|
|||
rx51_twldata.vaux3 = &rx51_vaux3_cam;
|
||||
}
|
||||
rx51_twldata.vmmc2 = &rx51_vmmc2;
|
||||
omap3_pmic_get_config(&rx51_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC,
|
||||
TWL_COMMON_REGULATOR_VDAC);
|
||||
|
||||
rx51_twldata.vdac->constraints.apply_uV = true;
|
||||
rx51_twldata.vdac->constraints.name = "VDAC";
|
||||
|
||||
omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata);
|
||||
omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2,
|
||||
ARRAY_SIZE(rx51_peripherals_i2c_board_info_2));
|
||||
|
|
|
@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board")
|
|||
.reserve = rx51_reserve,
|
||||
.map_io = rx51_map_io,
|
||||
.init_early = rx51_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = rx51_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -33,11 +33,6 @@ static void __init ti8168_init_early(void)
|
|||
omap2_init_common_devices(NULL, NULL);
|
||||
}
|
||||
|
||||
static void __init ti8168_evm_init_irq(void)
|
||||
{
|
||||
omap_init_irq();
|
||||
}
|
||||
|
||||
static void __init ti8168_evm_init(void)
|
||||
{
|
||||
omap_serial_init();
|
||||
|
@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm")
|
|||
.boot_params = 0x80000100,
|
||||
.map_io = ti8168_evm_map_io,
|
||||
.init_early = ti8168_init_early,
|
||||
.init_irq = ti8168_evm_init_irq,
|
||||
.timer = &omap_timer,
|
||||
.init_irq = ti816x_init_irq,
|
||||
.timer = &omap3_timer,
|
||||
.init_machine = ti8168_evm_init,
|
||||
MACHINE_END
|
||||
|
|
|
@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = {
|
|||
.rep = 1,
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vmmc1_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply zoom_vmmc1_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vsim_supply = {
|
||||
.supply = "vmmc_aux",
|
||||
static struct regulator_consumer_supply zoom_vsim_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vmmc2_supply = {
|
||||
.supply = "vmmc",
|
||||
static struct regulator_consumer_supply zoom_vmmc2_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vmmc3_supply = {
|
||||
.supply = "vmmc",
|
||||
.dev_name = "omap_hsmmc.2",
|
||||
static struct regulator_consumer_supply zoom_vmmc3_supply[] = {
|
||||
REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"),
|
||||
};
|
||||
|
||||
/* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
|
||||
|
@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &zoom_vmmc1_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply),
|
||||
.consumer_supplies = zoom_vmmc1_supply,
|
||||
};
|
||||
|
||||
/* VMMC2 for MMC2 card */
|
||||
|
@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = {
|
|||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &zoom_vmmc2_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply),
|
||||
.consumer_supplies = zoom_vmmc2_supply,
|
||||
};
|
||||
|
||||
/* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
|
||||
|
@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = {
|
|||
| REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &zoom_vsim_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply),
|
||||
.consumer_supplies = zoom_vsim_supply,
|
||||
};
|
||||
|
||||
static struct regulator_init_data zoom_vmmc3 = {
|
||||
.constraints = {
|
||||
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &zoom_vmmc3_supply,
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply),
|
||||
.consumer_supplies = zoom_vmmc3_supply,
|
||||
};
|
||||
|
||||
static struct fixed_voltage_config zoom_vwlan = {
|
||||
|
@ -227,40 +226,6 @@ static struct omap2_hsmmc_info mmc[] = {
|
|||
{} /* Terminator */
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vpll2_supplies[] = {
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
|
||||
REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
|
||||
};
|
||||
|
||||
static struct regulator_consumer_supply zoom_vdda_dac_supply =
|
||||
REGULATOR_SUPPLY("vdda_dac", "omapdss_venc");
|
||||
|
||||
static struct regulator_init_data zoom_vpll2 = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies),
|
||||
.consumer_supplies = zoom_vpll2_supplies,
|
||||
};
|
||||
|
||||
static struct regulator_init_data zoom_vdac = {
|
||||
.constraints = {
|
||||
.min_uV = 1800000,
|
||||
.max_uV = 1800000,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
| REGULATOR_CHANGE_STATUS,
|
||||
},
|
||||
.num_consumer_supplies = 1,
|
||||
.consumer_supplies = &zoom_vdda_dac_supply,
|
||||
};
|
||||
|
||||
static int zoom_twl_gpio_setup(struct device *dev,
|
||||
unsigned gpio, unsigned ngpio)
|
||||
{
|
||||
|
@ -270,13 +235,6 @@ static int zoom_twl_gpio_setup(struct device *dev,
|
|||
mmc[0].gpio_cd = gpio + 0;
|
||||
omap2_hsmmc_init(mmc);
|
||||
|
||||
/* link regulators to MMC adapters ... we "know" the
|
||||
* regulators will be set up only *after* we return.
|
||||
*/
|
||||
zoom_vmmc1_supply.dev = mmc[0].dev;
|
||||
zoom_vsim_supply.dev = mmc[0].dev;
|
||||
zoom_vmmc2_supply.dev = mmc[1].dev;
|
||||
|
||||
ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW,
|
||||
"lcd enable");
|
||||
if (ret)
|
||||
|
@ -292,26 +250,6 @@ static void zoom2_set_hs_extmute(int mute)
|
|||
gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute);
|
||||
}
|
||||
|
||||
static int zoom_batt_table[] = {
|
||||
/* 0 C*/
|
||||
30800, 29500, 28300, 27100,
|
||||
26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900,
|
||||
17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100,
|
||||
11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310,
|
||||
8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830,
|
||||
5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170,
|
||||
4040, 3910, 3790, 3670, 3550
|
||||
};
|
||||
|
||||
static struct twl4030_bci_platform_data zoom_bci_data = {
|
||||
.battery_tmp_tbl = zoom_batt_table,
|
||||
.tblsize = ARRAY_SIZE(zoom_batt_table),
|
||||
};
|
||||
|
||||
static struct twl4030_usb_data zoom_usb_data = {
|
||||
.usb_mode = T2_USB_MODE_ULPI,
|
||||
};
|
||||
|
||||
static struct twl4030_gpio_platform_data zoom_gpio_data = {
|
||||
.gpio_base = OMAP_MAX_GPIO_LINES,
|
||||
.irq_base = TWL4030_GPIO_IRQ_BASE,
|
||||
|
@ -319,41 +257,29 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = {
|
|||
.setup = zoom_twl_gpio_setup,
|
||||
};
|
||||
|
||||
static struct twl4030_madc_platform_data zoom_madc_data = {
|
||||
.irq_line = 1,
|
||||
};
|
||||
|
||||
static struct twl4030_codec_audio_data zoom_audio_data;
|
||||
|
||||
static struct twl4030_codec_data zoom_codec_data = {
|
||||
.audio_mclk = 26000000,
|
||||
.audio = &zoom_audio_data,
|
||||
};
|
||||
|
||||
static struct twl4030_platform_data zoom_twldata = {
|
||||
.irq_base = TWL4030_IRQ_BASE,
|
||||
.irq_end = TWL4030_IRQ_END,
|
||||
|
||||
/* platform_data for children goes here */
|
||||
.bci = &zoom_bci_data,
|
||||
.madc = &zoom_madc_data,
|
||||
.usb = &zoom_usb_data,
|
||||
.gpio = &zoom_gpio_data,
|
||||
.keypad = &zoom_kp_twl4030_data,
|
||||
.codec = &zoom_codec_data,
|
||||
.vmmc1 = &zoom_vmmc1,
|
||||
.vmmc2 = &zoom_vmmc2,
|
||||
.vsim = &zoom_vsim,
|
||||
.vpll2 = &zoom_vpll2,
|
||||
.vdac = &zoom_vdac,
|
||||
};
|
||||
|
||||
static int __init omap_i2c_init(void)
|
||||
{
|
||||
omap3_pmic_get_config(&zoom_twldata,
|
||||
TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
|
||||
TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
|
||||
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
||||
|
||||
if (machine_is_omap_zoom2()) {
|
||||
zoom_audio_data.ramp_delay_value = 3; /* 161 ms */
|
||||
zoom_audio_data.hs_extmute = 1;
|
||||
zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute;
|
||||
struct twl4030_codec_audio_data *audio_data;
|
||||
audio_data = zoom_twldata.codec->audio;
|
||||
|
||||
audio_data->ramp_delay_value = 3; /* 161 ms */
|
||||
audio_data->hs_extmute = 1;
|
||||
audio_data->set_hs_extmute = zoom2_set_hs_extmute;
|
||||
}
|
||||
omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata);
|
||||
omap_register_i2c_bus(2, 400, NULL, 0);
|
||||
|
|
|
@ -137,9 +137,9 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_zoom_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
||||
MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
||||
|
@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board")
|
|||
.reserve = omap_reserve,
|
||||
.map_io = omap3_map_io,
|
||||
.init_early = omap_zoom_init_early,
|
||||
.init_irq = omap_init_irq,
|
||||
.init_irq = omap3_init_irq,
|
||||
.init_machine = omap_zoom_init,
|
||||
.timer = &omap_timer,
|
||||
.timer = &omap3_timer,
|
||||
MACHINE_END
|
||||
|
|
|
@ -8,13 +8,6 @@
|
|||
#ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
|
||||
#define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H
|
||||
|
||||
/*
|
||||
* XXX Missing values for the OMAP4 DPLL_USB
|
||||
* XXX Missing min_multiplier values for all OMAP4 DPLLs
|
||||
*/
|
||||
#define OMAP4430_MAX_DPLL_MULT 2047
|
||||
#define OMAP4430_MAX_DPLL_DIV 128
|
||||
|
||||
int omap4xxx_clk_init(void);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = {
|
|||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.max_multiplier = 2047,
|
||||
.max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = {
|
|||
static struct clk dpll_abe_x2_ck = {
|
||||
.name = "dpll_abe_x2_ck",
|
||||
.parent = &dpll_abe_ck,
|
||||
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
|
||||
.flags = CLOCK_CLKOUTX2,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &omap3_clkoutx2_recalc,
|
||||
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE,
|
||||
};
|
||||
|
||||
static const struct clksel_rate div31_1to31_rates[] = {
|
||||
|
@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = {
|
|||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.max_multiplier = 2047,
|
||||
.max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = {
|
|||
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
|
||||
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
|
||||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
|
||||
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
.round_rate = &omap2_clksel_round_rate,
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE,
|
||||
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk dpll_core_m7x2_ck = {
|
||||
|
@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = {
|
|||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.max_multiplier = 2047,
|
||||
.max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = {
|
|||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.max_multiplier = 2047,
|
||||
.max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = {
|
|||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.max_multiplier = 2047,
|
||||
.max_divider = 128,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = {
|
|||
static struct clk dpll_per_x2_ck = {
|
||||
.name = "dpll_per_x2_ck",
|
||||
.parent = &dpll_per_ck,
|
||||
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
|
||||
.flags = CLOCK_CLKOUTX2,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &omap3_clkoutx2_recalc,
|
||||
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER,
|
||||
};
|
||||
|
||||
static const struct clksel dpll_per_m2x2_div[] = {
|
||||
|
@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = {
|
|||
.clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
|
||||
.clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK,
|
||||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
|
||||
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
.round_rate = &omap2_clksel_round_rate,
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
.enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER,
|
||||
.enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk dpll_per_m4x2_ck = {
|
||||
|
@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = {
|
|||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
/* DPLL_UNIPRO */
|
||||
static struct dpll_data dpll_unipro_dd = {
|
||||
.mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO,
|
||||
.clk_bypass = &sys_clkin_ck,
|
||||
.clk_ref = &sys_clkin_ck,
|
||||
.control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO,
|
||||
.modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
|
||||
.autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO,
|
||||
.idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO,
|
||||
.mult_mask = OMAP4430_DPLL_MULT_MASK,
|
||||
.div1_mask = OMAP4430_DPLL_DIV_MASK,
|
||||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
||||
static struct clk dpll_unipro_ck = {
|
||||
.name = "dpll_unipro_ck",
|
||||
.parent = &sys_clkin_ck,
|
||||
.dpll_data = &dpll_unipro_dd,
|
||||
.init = &omap2_init_dpll_parent,
|
||||
.ops = &clkops_omap3_noncore_dpll_ops,
|
||||
.recalc = &omap3_dpll_recalc,
|
||||
.round_rate = &omap2_dpll_round_rate,
|
||||
.set_rate = &omap3_noncore_dpll_set_rate,
|
||||
};
|
||||
|
||||
static struct clk dpll_unipro_x2_ck = {
|
||||
.name = "dpll_unipro_x2_ck",
|
||||
.parent = &dpll_unipro_ck,
|
||||
.flags = CLOCK_CLKOUTX2,
|
||||
.ops = &clkops_null,
|
||||
.recalc = &omap3_clkoutx2_recalc,
|
||||
};
|
||||
|
||||
static const struct clksel dpll_unipro_m2x2_div[] = {
|
||||
{ .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates },
|
||||
{ .parent = NULL },
|
||||
};
|
||||
|
||||
static struct clk dpll_unipro_m2x2_ck = {
|
||||
.name = "dpll_unipro_m2x2_ck",
|
||||
.parent = &dpll_unipro_x2_ck,
|
||||
.clksel = dpll_unipro_m2x2_div,
|
||||
.clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO,
|
||||
.clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &omap2_clksel_recalc,
|
||||
.round_rate = &omap2_clksel_round_rate,
|
||||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
static struct clk usb_hs_clk_div_ck = {
|
||||
.name = "usb_hs_clk_div_ck",
|
||||
.parent = &dpll_abe_m3x2_ck,
|
||||
|
@ -1015,8 +958,9 @@ static struct dpll_data dpll_usb_dd = {
|
|||
.enable_mask = OMAP4430_DPLL_EN_MASK,
|
||||
.autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK,
|
||||
.idlest_mask = OMAP4430_ST_DPLL_CLK_MASK,
|
||||
.max_multiplier = OMAP4430_MAX_DPLL_MULT,
|
||||
.max_divider = OMAP4430_MAX_DPLL_DIV,
|
||||
.sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK,
|
||||
.max_multiplier = 4095,
|
||||
.max_divider = 256,
|
||||
.min_divider = 1,
|
||||
};
|
||||
|
||||
|
@ -1035,8 +979,8 @@ static struct clk dpll_usb_ck = {
|
|||
static struct clk dpll_usb_clkdcoldo_ck = {
|
||||
.name = "dpll_usb_clkdcoldo_ck",
|
||||
.parent = &dpll_usb_ck,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB,
|
||||
.ops = &clkops_omap4_dpllmx_ops,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
|
@ -1169,19 +1113,6 @@ static struct clk func_96m_fclk = {
|
|||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
static const struct clksel hsmmc6_fclk_sel[] = {
|
||||
{ .parent = &func_64m_fclk, .rates = div_1_0_rates },
|
||||
{ .parent = &func_96m_fclk, .rates = div_1_1_rates },
|
||||
{ .parent = NULL },
|
||||
};
|
||||
|
||||
static struct clk hsmmc6_fclk = {
|
||||
.name = "hsmmc6_fclk",
|
||||
.parent = &func_64m_fclk,
|
||||
.ops = &clkops_null,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static const struct clksel_rate div2_1to8_rates[] = {
|
||||
{ .div = 1, .val = 0, .flags = RATE_IN_4430 },
|
||||
{ .div = 8, .val = 1, .flags = RATE_IN_4430 },
|
||||
|
@ -1264,6 +1195,21 @@ static struct clk l4_wkup_clk_mux_ck = {
|
|||
.recalc = &omap2_clksel_recalc,
|
||||
};
|
||||
|
||||
static struct clk ocp_abe_iclk = {
|
||||
.name = "ocp_abe_iclk",
|
||||
.parent = &aess_fclk,
|
||||
.ops = &clkops_null,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk per_abe_24m_fclk = {
|
||||
.name = "per_abe_24m_fclk",
|
||||
.parent = &dpll_abe_m2_ck,
|
||||
.ops = &clkops_null,
|
||||
.fixed_div = 4,
|
||||
.recalc = &omap_fixed_divisor_recalc,
|
||||
};
|
||||
|
||||
static const struct clksel per_abe_nc_fclk_div[] = {
|
||||
{ .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates },
|
||||
{ .parent = NULL },
|
||||
|
@ -1281,41 +1227,6 @@ static struct clk per_abe_nc_fclk = {
|
|||
.set_rate = &omap2_clksel_set_rate,
|
||||
};
|
||||
|
||||
static const struct clksel mcasp2_fclk_sel[] = {
|
||||
{ .parent = &func_96m_fclk, .rates = div_1_0_rates },
|
||||
{ .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
|
||||
{ .parent = NULL },
|
||||
};
|
||||
|
||||
static struct clk mcasp2_fclk = {
|
||||
.name = "mcasp2_fclk",
|
||||
.parent = &func_96m_fclk,
|
||||
.ops = &clkops_null,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk mcasp3_fclk = {
|
||||
.name = "mcasp3_fclk",
|
||||
.parent = &func_96m_fclk,
|
||||
.ops = &clkops_null,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk ocp_abe_iclk = {
|
||||
.name = "ocp_abe_iclk",
|
||||
.parent = &aess_fclk,
|
||||
.ops = &clkops_null,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk per_abe_24m_fclk = {
|
||||
.name = "per_abe_24m_fclk",
|
||||
.parent = &dpll_abe_m2_ck,
|
||||
.ops = &clkops_null,
|
||||
.fixed_div = 4,
|
||||
.recalc = &omap_fixed_divisor_recalc,
|
||||
};
|
||||
|
||||
static const struct clksel pmd_stm_clock_mux_sel[] = {
|
||||
{ .parent = &sys_clkin_ck, .rates = div_1_0_rates },
|
||||
{ .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates },
|
||||
|
@ -1846,8 +1757,8 @@ static struct clk l3_instr_ick = {
|
|||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
.clkdm_name = "l3_instr_clkdm",
|
||||
.flags = ENABLE_ON_INIT,
|
||||
.clkdm_name = "l3_instr_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
@ -1857,8 +1768,8 @@ static struct clk l3_main_3_ick = {
|
|||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
.clkdm_name = "l3_instr_clkdm",
|
||||
.flags = ENABLE_ON_INIT,
|
||||
.clkdm_name = "l3_instr_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
@ -1995,10 +1906,16 @@ static struct clk mcbsp3_fck = {
|
|||
.clkdm_name = "abe_clkdm",
|
||||
};
|
||||
|
||||
static const struct clksel mcbsp4_sync_mux_sel[] = {
|
||||
{ .parent = &func_96m_fclk, .rates = div_1_0_rates },
|
||||
{ .parent = &per_abe_nc_fclk, .rates = div_1_1_rates },
|
||||
{ .parent = NULL },
|
||||
};
|
||||
|
||||
static struct clk mcbsp4_sync_mux_ck = {
|
||||
.name = "mcbsp4_sync_mux_ck",
|
||||
.parent = &func_96m_fclk,
|
||||
.clksel = mcasp2_fclk_sel,
|
||||
.clksel = mcbsp4_sync_mux_sel,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL,
|
||||
.clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK,
|
||||
|
@ -2077,11 +1994,17 @@ static struct clk mcspi4_fck = {
|
|||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static const struct clksel hsmmc1_fclk_sel[] = {
|
||||
{ .parent = &func_64m_fclk, .rates = div_1_0_rates },
|
||||
{ .parent = &func_96m_fclk, .rates = div_1_1_rates },
|
||||
{ .parent = NULL },
|
||||
};
|
||||
|
||||
/* Merged hsmmc1_fclk into mmc1 */
|
||||
static struct clk mmc1_fck = {
|
||||
.name = "mmc1_fck",
|
||||
.parent = &func_64m_fclk,
|
||||
.clksel = hsmmc6_fclk_sel,
|
||||
.clksel = hsmmc1_fclk_sel,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL,
|
||||
.clksel_mask = OMAP4430_CLKSEL_MASK,
|
||||
|
@ -2096,7 +2019,7 @@ static struct clk mmc1_fck = {
|
|||
static struct clk mmc2_fck = {
|
||||
.name = "mmc2_fck",
|
||||
.parent = &func_64m_fclk,
|
||||
.clksel = hsmmc6_fclk_sel,
|
||||
.clksel = hsmmc1_fclk_sel,
|
||||
.init = &omap2_init_clksel_parent,
|
||||
.clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL,
|
||||
.clksel_mask = OMAP4430_CLKSEL_MASK,
|
||||
|
@ -2162,8 +2085,8 @@ static struct clk ocp_wp_noc_ick = {
|
|||
.ops = &clkops_omap2_dflt,
|
||||
.enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL,
|
||||
.enable_bit = OMAP4430_MODULEMODE_HWCTRL,
|
||||
.clkdm_name = "l3_instr_clkdm",
|
||||
.flags = ENABLE_ON_INIT,
|
||||
.clkdm_name = "l3_instr_clkdm",
|
||||
.parent = &l3_div_ck,
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
@ -2895,6 +2818,7 @@ static struct clk auxclk2_ck = {
|
|||
.enable_reg = OMAP4_SCRM_AUXCLK2,
|
||||
.enable_bit = OMAP4_ENABLE_SHIFT,
|
||||
};
|
||||
|
||||
static struct clk auxclk3_ck = {
|
||||
.name = "auxclk3_ck",
|
||||
.parent = &sys_clkin_ck,
|
||||
|
@ -3077,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X),
|
||||
CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X),
|
||||
CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X),
|
||||
CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X),
|
||||
CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X),
|
||||
CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X),
|
||||
CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X),
|
||||
CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X),
|
||||
|
@ -3092,17 +3013,14 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X),
|
||||
CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X),
|
||||
CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X),
|
||||
CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X),
|
||||
CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X),
|
||||
CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X),
|
||||
CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
|
||||
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
|
||||
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
|
||||
CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X),
|
||||
CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X),
|
||||
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
|
||||
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
|
||||
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
|
||||
CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X),
|
||||
CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X),
|
||||
CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X),
|
||||
|
@ -3204,7 +3122,6 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "uart2_fck", &uart2_fck, CK_443X),
|
||||
CLK(NULL, "uart3_fck", &uart3_fck, CK_443X),
|
||||
CLK(NULL, "uart4_fck", &uart4_fck, CK_443X),
|
||||
CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X),
|
||||
CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X),
|
||||
CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X),
|
||||
|
@ -3216,9 +3133,7 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X),
|
||||
CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X),
|
||||
CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X),
|
||||
CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X),
|
||||
CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X),
|
||||
|
@ -3226,17 +3141,26 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X),
|
||||
CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X),
|
||||
CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X),
|
||||
CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "usim_ck", &usim_ck, CK_443X),
|
||||
CLK(NULL, "usim_fclk", &usim_fclk, CK_443X),
|
||||
CLK(NULL, "usim_fck", &usim_fck, CK_443X),
|
||||
CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X),
|
||||
CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X),
|
||||
CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X),
|
||||
CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
|
||||
CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
|
||||
CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
|
||||
CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
|
||||
CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
|
||||
CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
|
||||
CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X),
|
||||
|
@ -3253,6 +3177,7 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X),
|
||||
CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X),
|
||||
|
@ -3270,19 +3195,9 @@ static struct omap_clk omap44xx_clks[] = {
|
|||
CLK(NULL, "uart2_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "uart3_ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "uart4_ick", &dummy_ck, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
|
||||
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
|
||||
CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
|
||||
CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X),
|
||||
CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X),
|
||||
CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X),
|
||||
CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X),
|
||||
CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X),
|
||||
CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X),
|
||||
CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X),
|
||||
};
|
||||
|
||||
int __init omap4xxx_clk_init(void)
|
||||
|
|
|
@ -1,11 +1,12 @@
|
|||
/*
|
||||
* OMAP4 Clock domains framework
|
||||
*
|
||||
* Copyright (C) 2009 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009 Nokia Corporation
|
||||
* Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2011 Nokia Corporation
|
||||
*
|
||||
* Abhijit Pagare (abhijitpagare@ti.com)
|
||||
* Benoit Cousson (b-cousson@ti.com)
|
||||
* Paul Walmsley (paul@pwsan.com)
|
||||
*
|
||||
* This file is automatically generated from the OMAP hardware databases.
|
||||
* We respectfully ask that any modifications to this file be coordinated
|
||||
|
@ -32,6 +33,42 @@
|
|||
|
||||
/* Static Dependencies for OMAP4 Clock Domains */
|
||||
|
||||
static struct clkdm_dep d2d_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "ivahd_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_1_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_2_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_emif_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l4_cfg_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{ NULL },
|
||||
};
|
||||
|
||||
static struct clkdm_dep ducati_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
|
@ -116,42 +153,6 @@ static struct clkdm_dep ivahd_wkup_sleep_deps[] = {
|
|||
{ NULL },
|
||||
};
|
||||
|
||||
static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "ivahd_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_1_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_2_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_emif_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l4_cfg_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
},
|
||||
{ NULL },
|
||||
};
|
||||
|
||||
static struct clkdm_dep l3_dma_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
|
@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = {
|
|||
{ NULL },
|
||||
};
|
||||
|
||||
static struct clkdm_dep mpuss_wkup_sleep_deps[] = {
|
||||
static struct clkdm_dep mpu_wkup_sleep_deps[] = {
|
||||
{
|
||||
.clkdm_name = "abe_clkdm",
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430)
|
||||
|
@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = {
|
|||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
static struct clockdomain mpuss_44xx_clkdm = {
|
||||
.name = "mpuss_clkdm",
|
||||
.pwrdm = { .name = "mpu_pwrdm" },
|
||||
.prcm_partition = OMAP4430_CM1_PARTITION,
|
||||
.cm_inst = OMAP4430_CM1_MPU_INST,
|
||||
.clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
|
||||
.wkdep_srcs = mpuss_wkup_sleep_deps,
|
||||
.sleepdep_srcs = mpuss_wkup_sleep_deps,
|
||||
static struct clockdomain d2d_44xx_clkdm = {
|
||||
.name = "d2d_clkdm",
|
||||
.pwrdm = { .name = "core_pwrdm" },
|
||||
.prcm_partition = OMAP4430_CM2_PARTITION,
|
||||
.cm_inst = OMAP4430_CM2_CORE_INST,
|
||||
.clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
|
||||
.wkdep_srcs = d2d_wkup_sleep_deps,
|
||||
.sleepdep_srcs = d2d_wkup_sleep_deps,
|
||||
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = {
|
|||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
static struct clockdomain mpu_44xx_clkdm = {
|
||||
.name = "mpu_clkdm",
|
||||
.pwrdm = { .name = "mpu_pwrdm" },
|
||||
.prcm_partition = OMAP4430_CM1_PARTITION,
|
||||
.cm_inst = OMAP4430_CM1_MPU_INST,
|
||||
.clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS,
|
||||
.wkdep_srcs = mpu_wkup_sleep_deps,
|
||||
.sleepdep_srcs = mpu_wkup_sleep_deps,
|
||||
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
static struct clockdomain l3_2_44xx_clkdm = {
|
||||
.name = "l3_2_clkdm",
|
||||
.pwrdm = { .name = "core_pwrdm" },
|
||||
|
@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = {
|
|||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
static struct clockdomain l3_d2d_44xx_clkdm = {
|
||||
.name = "l3_d2d_clkdm",
|
||||
.pwrdm = { .name = "core_pwrdm" },
|
||||
.prcm_partition = OMAP4430_CM2_PARTITION,
|
||||
.cm_inst = OMAP4430_CM2_CORE_INST,
|
||||
.clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS,
|
||||
.wkdep_srcs = l3_d2d_wkup_sleep_deps,
|
||||
.sleepdep_srcs = l3_d2d_wkup_sleep_deps,
|
||||
.flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
static struct clockdomain iss_44xx_clkdm = {
|
||||
.name = "iss_clkdm",
|
||||
.pwrdm = { .name = "cam_pwrdm" },
|
||||
|
@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = {
|
|||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430),
|
||||
};
|
||||
|
||||
/* As clockdomains are added or removed above, this list must also be changed */
|
||||
static struct clockdomain *clockdomains_omap44xx[] __initdata = {
|
||||
&l4_cefuse_44xx_clkdm,
|
||||
&l4_cfg_44xx_clkdm,
|
||||
|
@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = {
|
|||
&abe_44xx_clkdm,
|
||||
&l3_instr_44xx_clkdm,
|
||||
&l3_init_44xx_clkdm,
|
||||
&mpuss_44xx_clkdm,
|
||||
&d2d_44xx_clkdm,
|
||||
&mpu0_44xx_clkdm,
|
||||
&mpu1_44xx_clkdm,
|
||||
&l3_emif_44xx_clkdm,
|
||||
&l4_ao_44xx_clkdm,
|
||||
&ducati_44xx_clkdm,
|
||||
&mpu_44xx_clkdm,
|
||||
&l3_2_44xx_clkdm,
|
||||
&l3_1_44xx_clkdm,
|
||||
&l3_d2d_44xx_clkdm,
|
||||
&iss_44xx_clkdm,
|
||||
&l3_dss_44xx_clkdm,
|
||||
&l4_wkup_44xx_clkdm,
|
||||
&emu_sys_44xx_clkdm,
|
||||
&l3_dma_44xx_clkdm,
|
||||
NULL,
|
||||
NULL
|
||||
};
|
||||
|
||||
void __init omap44xx_clockdomains_init(void)
|
||||
|
|
File diff suppressed because it is too large
Load Diff
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* OMAP44xx CM1 instance offset macros
|
||||
*
|
||||
* Copyright (C) 2009-2010 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2010 Nokia Corporation
|
||||
*
|
||||
* Paul Walmsley (paul@pwsan.com)
|
||||
|
@ -41,9 +41,9 @@
|
|||
#define OMAP4430_CM1_INSTR_INST 0x0f00
|
||||
|
||||
/* CM1 clockdomain register offsets (from instance start) */
|
||||
#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
|
||||
#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000
|
||||
#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000
|
||||
#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000
|
||||
|
||||
/* CM1 */
|
||||
|
||||
|
@ -82,8 +82,8 @@
|
|||
#define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c)
|
||||
#define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050
|
||||
#define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060
|
||||
|
@ -98,8 +98,8 @@
|
|||
#define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c)
|
||||
#define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c
|
||||
#define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0
|
||||
|
@ -116,8 +116,8 @@
|
|||
#define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc)
|
||||
#define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc
|
||||
#define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0
|
||||
|
@ -134,8 +134,8 @@
|
|||
#define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120
|
||||
#define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120)
|
||||
#define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124
|
||||
|
@ -154,8 +154,8 @@
|
|||
#define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c)
|
||||
#define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160
|
||||
#define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160)
|
||||
#define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164
|
||||
|
@ -217,42 +217,6 @@
|
|||
#define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088
|
||||
#define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088)
|
||||
|
||||
/* CM1.RESTORE_CM1 register offsets */
|
||||
#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000
|
||||
#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000)
|
||||
#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004
|
||||
#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004)
|
||||
#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008
|
||||
#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008)
|
||||
#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c
|
||||
#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c)
|
||||
#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010
|
||||
#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010)
|
||||
#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014
|
||||
#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014)
|
||||
#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018
|
||||
#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018)
|
||||
#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c
|
||||
#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET 0x0020
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET 0x0024
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET 0x0028
|
||||
#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028)
|
||||
#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET 0x002c
|
||||
#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c)
|
||||
#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET 0x0030
|
||||
#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030)
|
||||
#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET 0x0034
|
||||
#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034)
|
||||
#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET 0x0038
|
||||
#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038)
|
||||
#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET 0x003c
|
||||
#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c)
|
||||
#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040
|
||||
#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040)
|
||||
|
||||
/* Function prototypes */
|
||||
extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx);
|
||||
extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx);
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* OMAP44xx CM2 instance offset macros
|
||||
*
|
||||
* Copyright (C) 2009-2010 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2011 Texas Instruments, Inc.
|
||||
* Copyright (C) 2009-2010 Nokia Corporation
|
||||
*
|
||||
* Paul Walmsley (paul@pwsan.com)
|
||||
|
@ -65,7 +65,6 @@
|
|||
#define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180
|
||||
#define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000
|
||||
|
||||
|
||||
/* CM2 */
|
||||
|
||||
/* CM2.OCP_SOCKET_CM2 register offsets */
|
||||
|
@ -121,8 +120,8 @@
|
|||
#define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080
|
||||
#define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080)
|
||||
#define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084
|
||||
|
@ -135,8 +134,8 @@
|
|||
#define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac)
|
||||
#define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4
|
||||
#define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4)
|
||||
#define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0
|
||||
|
@ -151,8 +150,8 @@
|
|||
#define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0)
|
||||
#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8
|
||||
#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8)
|
||||
#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec
|
||||
#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
|
||||
#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec
|
||||
#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec)
|
||||
|
||||
/* CM2.ALWAYS_ON_CM2 register offsets */
|
||||
#define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000
|
||||
|
@ -227,8 +226,8 @@
|
|||
#define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508)
|
||||
#define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520
|
||||
#define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520)
|
||||
#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528
|
||||
#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
|
||||
#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528
|
||||
#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528)
|
||||
#define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530
|
||||
#define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530)
|
||||
#define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600
|
||||
|
@ -450,56 +449,6 @@
|
|||
#define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020
|
||||
#define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020)
|
||||
|
||||
/* CM2.RESTORE_CM2 register offsets */
|
||||
#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET 0x0000
|
||||
#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000)
|
||||
#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET 0x0004
|
||||
#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004)
|
||||
#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET 0x0008
|
||||
#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008)
|
||||
#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET 0x000c
|
||||
#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c)
|
||||
#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET 0x0010
|
||||
#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010)
|
||||
#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014
|
||||
#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014)
|
||||
#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET 0x0018
|
||||
#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018)
|
||||
#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET 0x001c
|
||||
#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c)
|
||||
#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020
|
||||
#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020)
|
||||
#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET 0x0024
|
||||
#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024)
|
||||
#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET 0x0028
|
||||
#define OMAP4430_CM_D2D_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028)
|
||||
#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET 0x002c
|
||||
#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c)
|
||||
#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET 0x0030
|
||||
#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030)
|
||||
#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET 0x0034
|
||||
#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034)
|
||||
#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038
|
||||
#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038)
|
||||
#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c
|
||||
#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c)
|
||||
#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET 0x0040
|
||||
#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040)
|
||||
#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET 0x0044
|
||||
#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044)
|
||||
#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET 0x0048
|
||||
#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048)
|
||||
#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET 0x004c
|
||||
#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c)
|
||||
#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET 0x0050
|
||||
#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050)
|
||||
#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054
|
||||
#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054)
|
||||
#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET 0x0058
|
||||
#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058)
|
||||
#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c
|
||||
#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c)
|
||||
|
||||
/* Function prototypes */
|
||||
extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx);
|
||||
extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx);
|
||||
|
|
|
@ -20,36 +20,15 @@
|
|||
*
|
||||
*/
|
||||
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/i2c/twl.h>
|
||||
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/spi/spi.h>
|
||||
#include <linux/spi/ads7846.h>
|
||||
|
||||
#include <plat/i2c.h>
|
||||
#include <plat/mcspi.h>
|
||||
#include <plat/nand.h>
|
||||
|
||||
#include "common-board-devices.h"
|
||||
|
||||
static struct i2c_board_info __initdata pmic_i2c_board_info = {
|
||||
.addr = 0x48,
|
||||
.flags = I2C_CLIENT_WAKE,
|
||||
};
|
||||
|
||||
void __init omap_pmic_init(int bus, u32 clkrate,
|
||||
const char *pmic_type, int pmic_irq,
|
||||
struct twl4030_platform_data *pmic_data)
|
||||
{
|
||||
strncpy(pmic_i2c_board_info.type, pmic_type,
|
||||
sizeof(pmic_i2c_board_info.type));
|
||||
pmic_i2c_board_info.irq = pmic_irq;
|
||||
pmic_i2c_board_info.platform_data = pmic_data;
|
||||
|
||||
omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
|
||||
defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
|
||||
static struct omap2_mcspi_device_config ads7846_mcspi_config = {
|
||||
|
@ -115,9 +94,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
|
|||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
|
||||
static struct omap_nand_platform_data nand_data = {
|
||||
.dma_channel = -1, /* disable DMA in OMAP NAND driver */
|
||||
};
|
||||
static struct omap_nand_platform_data nand_data;
|
||||
|
||||
void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
|
||||
int nr_parts)
|
||||
|
@ -148,7 +125,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts,
|
|||
nand_data.cs = nandcs;
|
||||
nand_data.parts = parts;
|
||||
nand_data.nr_parts = nr_parts;
|
||||
nand_data.options = options;
|
||||
nand_data.devsize = options;
|
||||
|
||||
printk(KERN_INFO "Registering NAND on CS%d\n", nandcs);
|
||||
if (gpmc_nand_init(&nand_data) < 0)
|
||||
|
|
|
@ -1,33 +1,11 @@
|
|||
#ifndef __OMAP_COMMON_BOARD_DEVICES__
|
||||
#define __OMAP_COMMON_BOARD_DEVICES__
|
||||
|
||||
#include "twl-common.h"
|
||||
|
||||
#define NAND_BLOCK_SIZE SZ_128K
|
||||
|
||||
struct twl4030_platform_data;
|
||||
struct mtd_partition;
|
||||
|
||||
void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq,
|
||||
struct twl4030_platform_data *pmic_data);
|
||||
|
||||
static inline void omap2_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data)
|
||||
{
|
||||
omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data);
|
||||
}
|
||||
|
||||
static inline void omap3_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data)
|
||||
{
|
||||
omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data);
|
||||
}
|
||||
|
||||
static inline void omap4_pmic_init(const char *pmic_type,
|
||||
struct twl4030_platform_data *pmic_data)
|
||||
{
|
||||
/* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */
|
||||
omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data);
|
||||
}
|
||||
|
||||
struct ads7846_platform_data;
|
||||
|
||||
void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce,
|
||||
|
|
|
@ -20,8 +20,6 @@
|
|||
#include <plat/board.h>
|
||||
#include <plat/gpmc.h>
|
||||
|
||||
static struct omap_nand_platform_data *gpmc_nand_data;
|
||||
|
||||
static struct resource gpmc_nand_resource = {
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = {
|
|||
.resource = &gpmc_nand_resource,
|
||||
};
|
||||
|
||||
static int omap2_nand_gpmc_retime(void)
|
||||
static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data)
|
||||
{
|
||||
struct gpmc_timings t;
|
||||
int err;
|
||||
|
@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
|
||||
int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data)
|
||||
{
|
||||
int err = 0;
|
||||
struct device *dev = &gpmc_nand_device.dev;
|
||||
|
||||
gpmc_nand_data = _nand_data;
|
||||
gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime;
|
||||
gpmc_nand_device.dev.platform_data = gpmc_nand_data;
|
||||
|
||||
err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE,
|
||||
|
@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data)
|
|||
}
|
||||
|
||||
/* Set timings in GPMC */
|
||||
err = omap2_nand_gpmc_retime();
|
||||
err = omap2_nand_gpmc_retime(gpmc_nand_data);
|
||||
if (err < 0) {
|
||||
dev_err(dev, "Unable to set gpmc timings: %d\n", err);
|
||||
return err;
|
||||
|
|
|
@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
|
|||
return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
|
||||
}
|
||||
|
||||
/* See irq.c, omap4-common.c and entry-macro.S */
|
||||
void __iomem *omap_irq_base;
|
||||
|
||||
/*
|
||||
* Initialize asm_irq_base for entry-macro.S
|
||||
*/
|
||||
static inline void omap_irq_base_init(void)
|
||||
{
|
||||
if (cpu_is_omap24xx())
|
||||
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE);
|
||||
else if (cpu_is_omap34xx())
|
||||
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE);
|
||||
else if (cpu_is_omap44xx())
|
||||
omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE);
|
||||
else
|
||||
pr_err("Could not initialize omap_irq_base\n");
|
||||
}
|
||||
|
||||
void __init omap2_init_common_infrastructure(void)
|
||||
{
|
||||
u8 postsetup_state;
|
||||
|
@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0,
|
|||
_omap2_init_reprogram_sdrc();
|
||||
}
|
||||
|
||||
omap_irq_base_init();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
|
|||
IRQ_NOREQUEST | IRQ_NOPROBE, 0);
|
||||
}
|
||||
|
||||
void __init omap_init_irq(void)
|
||||
static void __init omap_init_irq(u32 base, int nr_irqs)
|
||||
{
|
||||
unsigned long nr_of_irqs = 0;
|
||||
unsigned int nr_banks = 0;
|
||||
int i, j;
|
||||
|
||||
omap_irq_base = ioremap(base, SZ_4K);
|
||||
if (WARN_ON(!omap_irq_base))
|
||||
return;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
|
||||
unsigned long base = 0;
|
||||
struct omap_irq_bank *bank = irq_banks + i;
|
||||
|
||||
if (cpu_is_omap24xx())
|
||||
base = OMAP24XX_IC_BASE;
|
||||
else if (cpu_is_omap34xx())
|
||||
base = OMAP34XX_IC_BASE;
|
||||
|
||||
BUG_ON(!base);
|
||||
|
||||
if (cpu_is_ti816x())
|
||||
bank->nr_irqs = 128;
|
||||
bank->nr_irqs = nr_irqs;
|
||||
|
||||
/* Static mapping, never released */
|
||||
bank->base_reg = ioremap(base, SZ_4K);
|
||||
|
@ -181,6 +176,21 @@ void __init omap_init_irq(void)
|
|||
nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : "");
|
||||
}
|
||||
|
||||
void __init omap2_init_irq(void)
|
||||
{
|
||||
omap_init_irq(OMAP24XX_IC_BASE, 96);
|
||||
}
|
||||
|
||||
void __init omap3_init_irq(void)
|
||||
{
|
||||
omap_init_irq(OMAP34XX_IC_BASE, 96);
|
||||
}
|
||||
|
||||
void __init ti816x_init_irq(void)
|
||||
{
|
||||
omap_init_irq(OMAP34XX_IC_BASE, 128);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARCH_OMAP3
|
||||
static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
|
||||
|
||||
|
|
|
@ -19,6 +19,8 @@
|
|||
#include <asm/hardware/gic.h>
|
||||
#include <asm/hardware/cache-l2x0.h>
|
||||
|
||||
#include <plat/irqs.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/omap4-common.h>
|
||||
|
||||
|
@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr;
|
|||
|
||||
void __init gic_init_irq(void)
|
||||
{
|
||||
void __iomem *gic_cpu_base;
|
||||
|
||||
/* Static mapping, never released */
|
||||
gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
|
||||
BUG_ON(!gic_dist_base_addr);
|
||||
|
||||
/* Static mapping, never released */
|
||||
gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
|
||||
BUG_ON(!gic_cpu_base);
|
||||
omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
|
||||
BUG_ON(!omap_irq_base);
|
||||
|
||||
gic_init(0, 29, gic_dist_base_addr, gic_cpu_base);
|
||||
gic_init(0, 29, gic_dist_base_addr, omap_irq_base);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
* omap_hwmod implementation for OMAP2/3/4
|
||||
*
|
||||
* Copyright (C) 2009-2011 Nokia Corporation
|
||||
* Copyright (C) 2011 Texas Instruments, Inc.
|
||||
*
|
||||
* Paul Walmsley, Benoît Cousson, Kevin Hilman
|
||||
*
|
||||
|
@ -387,11 +388,10 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
|
|||
*/
|
||||
static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
{
|
||||
u32 wakeup_mask;
|
||||
|
||||
if (!oh->class->sysc ||
|
||||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
||||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
|
||||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
|
||||
(oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
|
||||
return -EINVAL;
|
||||
|
||||
if (!oh->class->sysc->sysc_fields) {
|
||||
|
@ -399,12 +399,13 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
||||
|
||||
*v |= wakeup_mask;
|
||||
if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
|
||||
*v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
|
||||
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
|
||||
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
|
||||
|
||||
|
@ -422,11 +423,10 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
|
|||
*/
|
||||
static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
||||
{
|
||||
u32 wakeup_mask;
|
||||
|
||||
if (!oh->class->sysc ||
|
||||
!((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
|
||||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)))
|
||||
(oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
|
||||
(oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
|
||||
return -EINVAL;
|
||||
|
||||
if (!oh->class->sysc->sysc_fields) {
|
||||
|
@ -434,12 +434,13 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
||||
|
||||
*v &= ~wakeup_mask;
|
||||
if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
|
||||
*v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
|
||||
|
||||
if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
|
||||
_set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
|
||||
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
_set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
|
||||
|
||||
/* XXX test pwrdm_get_wken for this hwmod's subsystem */
|
||||
|
||||
|
@ -677,6 +678,75 @@ static void _disable_optional_clocks(struct omap_hwmod *oh)
|
|||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
|
||||
* @oh: struct omap_hwmod *oh
|
||||
*
|
||||
* Count and return the number of MPU IRQs associated with the hwmod
|
||||
* @oh. Used to allocate struct resource data. Returns 0 if @oh is
|
||||
* NULL.
|
||||
*/
|
||||
static int _count_mpu_irqs(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_irq_info *ohii;
|
||||
int i = 0;
|
||||
|
||||
if (!oh || !oh->mpu_irqs)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
ohii = &oh->mpu_irqs[i++];
|
||||
} while (ohii->irq != -1);
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/**
|
||||
* _count_sdma_reqs - count the number of SDMA request lines associated with @oh
|
||||
* @oh: struct omap_hwmod *oh
|
||||
*
|
||||
* Count and return the number of SDMA request lines associated with
|
||||
* the hwmod @oh. Used to allocate struct resource data. Returns 0
|
||||
* if @oh is NULL.
|
||||
*/
|
||||
static int _count_sdma_reqs(struct omap_hwmod *oh)
|
||||
{
|
||||
struct omap_hwmod_dma_info *ohdi;
|
||||
int i = 0;
|
||||
|
||||
if (!oh || !oh->sdma_reqs)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
ohdi = &oh->sdma_reqs[i++];
|
||||
} while (ohdi->dma_req != -1);
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/**
|
||||
* _count_ocp_if_addr_spaces - count the number of address space entries for @oh
|
||||
* @oh: struct omap_hwmod *oh
|
||||
*
|
||||
* Count and return the number of address space ranges associated with
|
||||
* the hwmod @oh. Used to allocate struct resource data. Returns 0
|
||||
* if @oh is NULL.
|
||||
*/
|
||||
static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
|
||||
{
|
||||
struct omap_hwmod_addr_space *mem;
|
||||
int i = 0;
|
||||
|
||||
if (!os || !os->addr)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
mem = &os->addr[i++];
|
||||
} while (mem->pa_start != mem->pa_end);
|
||||
|
||||
return i;
|
||||
}
|
||||
|
||||
/**
|
||||
* _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use
|
||||
* @oh: struct omap_hwmod *
|
||||
|
@ -722,8 +792,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
|
|||
{
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
struct omap_hwmod_addr_space *mem;
|
||||
int i;
|
||||
int found = 0;
|
||||
int i = 0, found = 0;
|
||||
void __iomem *va_start;
|
||||
|
||||
if (!oh || oh->slaves_cnt == 0)
|
||||
|
@ -731,12 +800,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index)
|
|||
|
||||
os = oh->slaves[index];
|
||||
|
||||
for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) {
|
||||
if (mem->flags & ADDR_TYPE_RT) {
|
||||
if (!os->addr)
|
||||
return NULL;
|
||||
|
||||
do {
|
||||
mem = &os->addr[i++];
|
||||
if (mem->flags & ADDR_TYPE_RT)
|
||||
found = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
} while (!found && mem->pa_start != mem->pa_end);
|
||||
|
||||
if (found) {
|
||||
va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
|
||||
|
@ -781,8 +852,16 @@ static void _enable_sysc(struct omap_hwmod *oh)
|
|||
}
|
||||
|
||||
if (sf & SYSC_HAS_MIDLEMODE) {
|
||||
idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
|
||||
HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
|
||||
if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
|
||||
idlemode = HWMOD_IDLEMODE_NO;
|
||||
} else {
|
||||
if (sf & SYSC_HAS_ENAWAKEUP)
|
||||
_enable_wakeup(oh, &v);
|
||||
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
}
|
||||
_set_master_standbymode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
|
@ -840,8 +919,16 @@ static void _idle_sysc(struct omap_hwmod *oh)
|
|||
}
|
||||
|
||||
if (sf & SYSC_HAS_MIDLEMODE) {
|
||||
idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ?
|
||||
HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
|
||||
if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
|
||||
idlemode = HWMOD_IDLEMODE_FORCE;
|
||||
} else {
|
||||
if (sf & SYSC_HAS_ENAWAKEUP)
|
||||
_enable_wakeup(oh, &v);
|
||||
if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
|
||||
idlemode = HWMOD_IDLEMODE_SMART_WKUP;
|
||||
else
|
||||
idlemode = HWMOD_IDLEMODE_SMART;
|
||||
}
|
||||
_set_master_standbymode(oh, idlemode, &v);
|
||||
}
|
||||
|
||||
|
@ -928,6 +1015,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data)
|
|||
|
||||
if (!ret)
|
||||
oh->_state = _HWMOD_STATE_CLKS_INITED;
|
||||
else
|
||||
pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -1224,6 +1313,8 @@ static int _enable(struct omap_hwmod *oh)
|
|||
{
|
||||
int r;
|
||||
|
||||
pr_debug("omap_hwmod: %s: enabling\n", oh->name);
|
||||
|
||||
if (oh->_state != _HWMOD_STATE_INITIALIZED &&
|
||||
oh->_state != _HWMOD_STATE_IDLE &&
|
||||
oh->_state != _HWMOD_STATE_DISABLED) {
|
||||
|
@ -1232,17 +1323,6 @@ static int _enable(struct omap_hwmod *oh)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
pr_debug("omap_hwmod: %s: enabling\n", oh->name);
|
||||
|
||||
/*
|
||||
* If an IP contains only one HW reset line, then de-assert it in order
|
||||
* to allow to enable the clocks. Otherwise the PRCM will return
|
||||
* Intransition status, and the init will failed.
|
||||
*/
|
||||
if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
|
||||
oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
|
||||
_deassert_hardreset(oh, oh->rst_lines[0].name);
|
||||
|
||||
/* Mux pins for device runtime if populated */
|
||||
if (oh->mux && (!oh->mux->enabled ||
|
||||
((oh->_state == _HWMOD_STATE_IDLE) &&
|
||||
|
@ -1252,8 +1332,24 @@ static int _enable(struct omap_hwmod *oh)
|
|||
_add_initiator_dep(oh, mpu_oh);
|
||||
_enable_clocks(oh);
|
||||
|
||||
/*
|
||||
* If an IP contains only one HW reset line, then de-assert it in order
|
||||
* to allow the module state transition. Otherwise the PRCM will return
|
||||
* Intransition status, and the init will failed.
|
||||
*/
|
||||
if ((oh->_state == _HWMOD_STATE_INITIALIZED ||
|
||||
oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1)
|
||||
_deassert_hardreset(oh, oh->rst_lines[0].name);
|
||||
|
||||
r = _wait_target_ready(oh);
|
||||
if (!r) {
|
||||
if (r) {
|
||||
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
|
||||
oh->name, r);
|
||||
_disable_clocks(oh);
|
||||
|
||||
return r;
|
||||
}
|
||||
|
||||
oh->_state = _HWMOD_STATE_ENABLED;
|
||||
|
||||
/* Access the sysconfig only if the target is ready */
|
||||
|
@ -1262,11 +1358,6 @@ static int _enable(struct omap_hwmod *oh)
|
|||
_update_sysc_cache(oh);
|
||||
_enable_sysc(oh);
|
||||
}
|
||||
} else {
|
||||
_disable_clocks(oh);
|
||||
pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
|
||||
oh->name, r);
|
||||
}
|
||||
|
||||
return r;
|
||||
}
|
||||
|
@ -1281,14 +1372,14 @@ static int _enable(struct omap_hwmod *oh)
|
|||
*/
|
||||
static int _idle(struct omap_hwmod *oh)
|
||||
{
|
||||
pr_debug("omap_hwmod: %s: idling\n", oh->name);
|
||||
|
||||
if (oh->_state != _HWMOD_STATE_ENABLED) {
|
||||
WARN(1, "omap_hwmod: %s: idle state can only be entered from "
|
||||
"enabled state\n", oh->name);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pr_debug("omap_hwmod: %s: idling\n", oh->name);
|
||||
|
||||
if (oh->class->sysc)
|
||||
_idle_sysc(oh);
|
||||
_del_initiator_dep(oh, mpu_oh);
|
||||
|
@ -1374,15 +1465,11 @@ static int _shutdown(struct omap_hwmod *oh)
|
|||
}
|
||||
}
|
||||
|
||||
if (oh->class->sysc)
|
||||
if (oh->class->sysc) {
|
||||
if (oh->_state == _HWMOD_STATE_IDLE)
|
||||
_enable(oh);
|
||||
_shutdown_sysc(oh);
|
||||
|
||||
/*
|
||||
* If an IP contains only one HW reset line, then assert it
|
||||
* before disabling the clocks and shutting down the IP.
|
||||
*/
|
||||
if (oh->rst_lines_cnt == 1)
|
||||
_assert_hardreset(oh, oh->rst_lines[0].name);
|
||||
}
|
||||
|
||||
/* clocks and deps are already disabled in idle */
|
||||
if (oh->_state == _HWMOD_STATE_ENABLED) {
|
||||
|
@ -1392,6 +1479,13 @@ static int _shutdown(struct omap_hwmod *oh)
|
|||
}
|
||||
/* XXX Should this code also force-disable the optional clocks? */
|
||||
|
||||
/*
|
||||
* If an IP contains only one HW reset line, then assert it
|
||||
* after disabling the clocks and before shutting down the IP.
|
||||
*/
|
||||
if (oh->rst_lines_cnt == 1)
|
||||
_assert_hardreset(oh, oh->rst_lines[0].name);
|
||||
|
||||
/* Mux pins to safe mode or use populated off mode values */
|
||||
if (oh->mux)
|
||||
omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
|
||||
|
@ -1685,9 +1779,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data)
|
|||
return 0;
|
||||
|
||||
oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index);
|
||||
if (!oh->_mpu_rt_va)
|
||||
pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n",
|
||||
__func__, oh->name);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -1939,10 +2030,10 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
|
|||
{
|
||||
int ret, i;
|
||||
|
||||
ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt;
|
||||
ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
|
||||
|
||||
for (i = 0; i < oh->slaves_cnt; i++)
|
||||
ret += oh->slaves[i]->addr_cnt;
|
||||
ret += _count_ocp_if_addr_spaces(oh->slaves[i]);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -1959,12 +2050,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh)
|
|||
*/
|
||||
int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
||||
{
|
||||
int i, j;
|
||||
int i, j, mpu_irqs_cnt, sdma_reqs_cnt;
|
||||
int r = 0;
|
||||
|
||||
/* For each IRQ, DMA, memory area, fill in array.*/
|
||||
|
||||
for (i = 0; i < oh->mpu_irqs_cnt; i++) {
|
||||
mpu_irqs_cnt = _count_mpu_irqs(oh);
|
||||
for (i = 0; i < mpu_irqs_cnt; i++) {
|
||||
(res + r)->name = (oh->mpu_irqs + i)->name;
|
||||
(res + r)->start = (oh->mpu_irqs + i)->irq;
|
||||
(res + r)->end = (oh->mpu_irqs + i)->irq;
|
||||
|
@ -1972,7 +2064,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
|||
r++;
|
||||
}
|
||||
|
||||
for (i = 0; i < oh->sdma_reqs_cnt; i++) {
|
||||
sdma_reqs_cnt = _count_sdma_reqs(oh);
|
||||
for (i = 0; i < sdma_reqs_cnt; i++) {
|
||||
(res + r)->name = (oh->sdma_reqs + i)->name;
|
||||
(res + r)->start = (oh->sdma_reqs + i)->dma_req;
|
||||
(res + r)->end = (oh->sdma_reqs + i)->dma_req;
|
||||
|
@ -1982,10 +2075,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
|
|||
|
||||
for (i = 0; i < oh->slaves_cnt; i++) {
|
||||
struct omap_hwmod_ocp_if *os;
|
||||
int addr_cnt;
|
||||
|
||||
os = oh->slaves[i];
|
||||
addr_cnt = _count_ocp_if_addr_spaces(os);
|
||||
|
||||
for (j = 0; j < os->addr_cnt; j++) {
|
||||
for (j = 0; j < addr_cnt; j++) {
|
||||
(res + r)->name = (os->addr + j)->name;
|
||||
(res + r)->start = (os->addr + j)->pa_start;
|
||||
(res + r)->end = (os->addr + j)->pa_end;
|
||||
|
|
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Reference in New Issue