Merge branch 'locking/urgent' into locking/core, to pick up dependency
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
commit
ae0b5c2f03
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@ -21,38 +21,34 @@
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#include <asm-generic/qspinlock_types.h>
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/**
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* queued_spin_unlock_wait - wait until the _current_ lock holder releases the lock
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* @lock : Pointer to queued spinlock structure
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*
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* There is a very slight possibility of live-lock if the lockers keep coming
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* and the waiter is just unfortunate enough to not see any unlock state.
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*/
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#ifndef queued_spin_unlock_wait
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extern void queued_spin_unlock_wait(struct qspinlock *lock);
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#endif
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/**
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* queued_spin_is_locked - is the spinlock locked?
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* @lock: Pointer to queued spinlock structure
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* Return: 1 if it is locked, 0 otherwise
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*/
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#ifndef queued_spin_is_locked
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static __always_inline int queued_spin_is_locked(struct qspinlock *lock)
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{
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/*
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* queued_spin_lock_slowpath() can ACQUIRE the lock before
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* issuing the unordered store that sets _Q_LOCKED_VAL.
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* See queued_spin_unlock_wait().
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*
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* See both smp_cond_acquire() sites for more detail.
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*
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* This however means that in code like:
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*
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* spin_lock(A) spin_lock(B)
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* spin_unlock_wait(B) spin_is_locked(A)
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* do_something() do_something()
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*
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* Both CPUs can end up running do_something() because the store
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* setting _Q_LOCKED_VAL will pass through the loads in
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* spin_unlock_wait() and/or spin_is_locked().
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*
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* Avoid this by issuing a full memory barrier between the spin_lock()
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* and the loads in spin_unlock_wait() and spin_is_locked().
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*
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* Note that regular mutual exclusion doesn't care about this
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* delayed store.
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* Any !0 state indicates it is locked, even if _Q_LOCKED_VAL
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* isn't immediately observable.
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*/
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smp_mb();
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return atomic_read(&lock->val) & _Q_LOCKED_MASK;
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return atomic_read(&lock->val);
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}
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#endif
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/**
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* queued_spin_value_unlocked - is the spinlock structure unlocked?
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@ -122,21 +118,6 @@ static __always_inline void queued_spin_unlock(struct qspinlock *lock)
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}
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#endif
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/**
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* queued_spin_unlock_wait - wait until current lock holder releases the lock
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* @lock : Pointer to queued spinlock structure
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*
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* There is a very slight possibility of live-lock if the lockers keep coming
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* and the waiter is just unfortunate enough to not see any unlock state.
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*/
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static inline void queued_spin_unlock_wait(struct qspinlock *lock)
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{
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/* See queued_spin_is_locked() */
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smp_mb();
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while (atomic_read(&lock->val) & _Q_LOCKED_MASK)
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cpu_relax();
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}
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#ifndef virt_spin_lock
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static __always_inline bool virt_spin_lock(struct qspinlock *lock)
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{
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@ -267,6 +267,66 @@ static __always_inline u32 __pv_wait_head_or_lock(struct qspinlock *lock,
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#define queued_spin_lock_slowpath native_queued_spin_lock_slowpath
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#endif
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/*
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* queued_spin_lock_slowpath() can (load-)ACQUIRE the lock before
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* issuing an _unordered_ store to set _Q_LOCKED_VAL.
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*
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* This means that the store can be delayed, but no later than the
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* store-release from the unlock. This means that simply observing
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* _Q_LOCKED_VAL is not sufficient to determine if the lock is acquired.
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*
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* There are two paths that can issue the unordered store:
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*
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* (1) clear_pending_set_locked(): *,1,0 -> *,0,1
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*
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* (2) set_locked(): t,0,0 -> t,0,1 ; t != 0
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* atomic_cmpxchg_relaxed(): t,0,0 -> 0,0,1
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*
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* However, in both cases we have other !0 state we've set before to queue
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* ourseves:
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*
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* For (1) we have the atomic_cmpxchg_acquire() that set _Q_PENDING_VAL, our
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* load is constrained by that ACQUIRE to not pass before that, and thus must
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* observe the store.
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*
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* For (2) we have a more intersting scenario. We enqueue ourselves using
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* xchg_tail(), which ends up being a RELEASE. This in itself is not
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* sufficient, however that is followed by an smp_cond_acquire() on the same
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* word, giving a RELEASE->ACQUIRE ordering. This again constrains our load and
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* guarantees we must observe that store.
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*
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* Therefore both cases have other !0 state that is observable before the
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* unordered locked byte store comes through. This means we can use that to
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* wait for the lock store, and then wait for an unlock.
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*/
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#ifndef queued_spin_unlock_wait
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void queued_spin_unlock_wait(struct qspinlock *lock)
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{
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u32 val;
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for (;;) {
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val = atomic_read(&lock->val);
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if (!val) /* not locked, we're done */
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goto done;
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if (val & _Q_LOCKED_MASK) /* locked, go wait for unlock */
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break;
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/* not locked, but pending, wait until we observe the lock */
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cpu_relax();
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}
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/* any unlock is good */
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while (atomic_read(&lock->val) & _Q_LOCKED_MASK)
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cpu_relax();
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done:
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smp_rmb(); /* CTRL + RMB -> ACQUIRE */
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}
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EXPORT_SYMBOL(queued_spin_unlock_wait);
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#endif
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#endif /* _GEN_PV_LOCK_SLOWPATH */
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/**
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