x86 bitops: fix code style issues
Coding style cleanups:
- change __inline__ to inline;
- drop space in "* addr" parameters;
- drop space between func. name and '('
The "volatile" keywords are correct according to email from one
Linus Torvalds.
[Several other arches need some of this also.]
Signed-off-by: Randy Dunlap <randy.dunlap@oracle.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Randy Dunlap
Linus Torvalds
parent
fb9431eb03
commit
ade8c56cbd
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@ -29,7 +29,7 @@
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __inline__ void set_bit(int nr, volatile void * addr)
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static inline void set_bit(int nr, volatile void *addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btsl %1,%0"
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@ -46,7 +46,7 @@ static __inline__ void set_bit(int nr, volatile void * addr)
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static __inline__ void __set_bit(int nr, volatile void * addr)
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static inline void __set_bit(int nr, volatile void *addr)
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{
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__asm__ volatile(
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"btsl %1,%0"
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@ -64,7 +64,7 @@ static __inline__ void __set_bit(int nr, volatile void * addr)
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* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
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* in order to ensure changes are visible on other processors.
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*/
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static __inline__ void clear_bit(int nr, volatile void * addr)
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static inline void clear_bit(int nr, volatile void *addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btrl %1,%0"
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@ -86,7 +86,7 @@ static inline void clear_bit_unlock(unsigned long nr, volatile unsigned long *ad
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clear_bit(nr, addr);
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}
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static __inline__ void __clear_bit(int nr, volatile void * addr)
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static inline void __clear_bit(int nr, volatile void *addr)
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{
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__asm__ __volatile__(
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"btrl %1,%0"
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@ -124,7 +124,7 @@ static inline void __clear_bit_unlock(unsigned long nr, volatile unsigned long *
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* If it's called on the same region of memory simultaneously, the effect
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* may be that only one operation succeeds.
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*/
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static __inline__ void __change_bit(int nr, volatile void * addr)
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static inline void __change_bit(int nr, volatile void *addr)
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{
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__asm__ __volatile__(
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"btcl %1,%0"
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@ -141,7 +141,7 @@ static __inline__ void __change_bit(int nr, volatile void * addr)
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __inline__ void change_bit(int nr, volatile void * addr)
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static inline void change_bit(int nr, volatile void *addr)
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{
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__asm__ __volatile__( LOCK_PREFIX
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"btcl %1,%0"
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@ -157,7 +157,7 @@ static __inline__ void change_bit(int nr, volatile void * addr)
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_set_bit(int nr, volatile void * addr)
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static inline int test_and_set_bit(int nr, volatile void *addr)
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{
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int oldbit;
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@ -175,7 +175,7 @@ static __inline__ int test_and_set_bit(int nr, volatile void * addr)
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*
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* This is the same as test_and_set_bit on x86.
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*/
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static __inline__ int test_and_set_bit_lock(int nr, volatile void *addr)
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static inline int test_and_set_bit_lock(int nr, volatile void *addr)
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{
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return test_and_set_bit(nr, addr);
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}
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@ -189,7 +189,7 @@ static __inline__ int test_and_set_bit_lock(int nr, volatile void *addr)
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
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static inline int __test_and_set_bit(int nr, volatile void *addr)
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{
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int oldbit;
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@ -208,7 +208,7 @@ static __inline__ int __test_and_set_bit(int nr, volatile void * addr)
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
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static inline int test_and_clear_bit(int nr, volatile void *addr)
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{
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int oldbit;
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@ -228,7 +228,7 @@ static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
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* If two examples of this operation race, one can appear to succeed
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* but actually fail. You must protect multiple accesses with a lock.
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*/
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static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
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static inline int __test_and_clear_bit(int nr, volatile void *addr)
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{
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int oldbit;
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@ -240,7 +240,7 @@ static __inline__ int __test_and_clear_bit(int nr, volatile void * addr)
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}
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/* WARNING: non atomic and it can be reordered! */
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static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
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static inline int __test_and_change_bit(int nr, volatile void *addr)
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{
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int oldbit;
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@ -259,7 +259,7 @@ static __inline__ int __test_and_change_bit(int nr, volatile void * addr)
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_change_bit(int nr, volatile void * addr)
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static inline int test_and_change_bit(int nr, volatile void *addr)
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{
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int oldbit;
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@ -276,15 +276,15 @@ static __inline__ int test_and_change_bit(int nr, volatile void * addr)
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* @nr: bit number to test
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* @addr: Address to start counting from
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*/
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static int test_bit(int nr, const volatile void * addr);
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static int test_bit(int nr, const volatile void *addr);
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#endif
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static __inline__ int constant_test_bit(int nr, const volatile void * addr)
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static inline int constant_test_bit(int nr, const volatile void *addr)
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{
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return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline__ int variable_test_bit(int nr, volatile const void * addr)
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static inline int variable_test_bit(int nr, volatile const void *addr)
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{
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int oldbit;
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@ -302,10 +302,10 @@ static __inline__ int variable_test_bit(int nr, volatile const void * addr)
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#undef ADDR
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extern long find_first_zero_bit(const unsigned long * addr, unsigned long size);
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extern long find_next_zero_bit (const unsigned long * addr, long size, long offset);
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extern long find_first_bit(const unsigned long * addr, unsigned long size);
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extern long find_next_bit(const unsigned long * addr, long size, long offset);
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extern long find_first_zero_bit(const unsigned long *addr, unsigned long size);
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extern long find_next_zero_bit(const unsigned long *addr, long size, long offset);
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extern long find_first_bit(const unsigned long *addr, unsigned long size);
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extern long find_next_bit(const unsigned long *addr, long size, long offset);
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/* return index of first bet set in val or max when no bit is set */
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static inline long __scanbit(unsigned long val, unsigned long max)
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@ -366,7 +366,7 @@ static inline void __clear_bit_string(unsigned long *bitmap, unsigned long i,
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*
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* Undefined if no zero exists, so code should check against ~0UL first.
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*/
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static __inline__ unsigned long ffz(unsigned long word)
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static inline unsigned long ffz(unsigned long word)
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{
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__asm__("bsfq %1,%0"
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:"=r" (word)
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@ -380,7 +380,7 @@ static __inline__ unsigned long ffz(unsigned long word)
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*
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* Undefined if no bit exists, so code should check against 0 first.
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*/
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static __inline__ unsigned long __ffs(unsigned long word)
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static inline unsigned long __ffs(unsigned long word)
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{
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__asm__("bsfq %1,%0"
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:"=r" (word)
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@ -394,7 +394,7 @@ static __inline__ unsigned long __ffs(unsigned long word)
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*
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* Undefined if no zero exists, so code should check against ~0UL first.
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*/
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static __inline__ unsigned long __fls(unsigned long word)
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static inline unsigned long __fls(unsigned long word)
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{
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__asm__("bsrq %1,%0"
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:"=r" (word)
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@ -414,7 +414,7 @@ static __inline__ unsigned long __fls(unsigned long word)
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(int x)
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static inline int ffs(int x)
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{
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int r;
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@ -430,7 +430,7 @@ static __inline__ int ffs(int x)
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*
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* This is defined the same way as fls.
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*/
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static __inline__ int fls64(__u64 x)
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static inline int fls64(__u64 x)
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{
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if (x == 0)
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return 0;
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@ -443,7 +443,7 @@ static __inline__ int fls64(__u64 x)
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*
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* This is defined the same way as ffs.
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*/
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static __inline__ int fls(int x)
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static inline int fls(int x)
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{
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int r;
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