hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

MIPS: JZ4740: probe interrupt controller via DT 

Declare the JZ4740 interrupt controller for probe via DT using the
standard irqchip_init function, and make use of that function to probe
the controller by adding the appropriate node to the JZ4740 dtsi.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Kumar Gala <galak@codeaurora.org>
Cc: Lars-Peter Clausen <lars@metafoo.de>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pawel Moll <pawel.moll@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Brian Norris <computersforpeace@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/10135/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2015-05-24 16:11:21 +01:00 committed by Ralf Baechle
parent 5f408ebfd2
commit adbdce77cc
4 changed files with 18 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/mips/boot/dts/ingenic/jz4740.dtsi
View File

@ -9,4 +9,15 @@
interrupt-controller;
compatible = "mti,cpu-interrupt-controller";
};
intc: interrupt-controller@10001000 {
compatible = "ingenic,jz4740-intc";
reg = <0x10001000 0x14>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
};
};

2
arch/mips/include/asm/mach-jz4740/irq.h
View File

@ -54,6 +54,4 @@
#define NR_IRQS (JZ4740_IRQ_ADC_BASE + 6)
extern void __init jz4740_intc_init(void);
#endif

8
arch/mips/jz4740/irq.c
View File

@ -18,6 +18,7 @@
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/of_irq.h>
#include <linux/timex.h>
#include <linux/slab.h>
#include <linux/delay.h>
@ -32,6 +33,8 @@
#include "irq.h"
#include "../../drivers/irqchip/irqchip.h"
static void __iomem *jz_intc_base;
#define JZ_REG_INTC_STATUS 0x00
@ -77,7 +80,8 @@ static struct irqaction jz4740_cascade_action = {
.name = "JZ4740 cascade interrupt",
};
void __init jz4740_intc_init(void)
static int __init jz4740_intc_of_init(struct device_node *node,
struct device_node *parent)
{
struct irq_chip_generic *gc;
struct irq_chip_type *ct;
@ -105,7 +109,9 @@ void __init jz4740_intc_init(void)
irq_setup_generic_chip(gc, IRQ_MSK(32), 0, 0, IRQ_NOPROBE | IRQ_LEVEL);
setup_irq(2, &jz4740_cascade_action);
return 0;
}
IRQCHIP_DECLARE(jz4740_intc, "ingenic,jz4740-intc", jz4740_intc_of_init);
#ifdef CONFIG_DEBUG_FS

2
arch/mips/jz4740/setup.c
View File

@ -25,7 +25,6 @@
#include <asm/prom.h>
#include <asm/mach-jz4740/base.h>
#include <asm/mach-jz4740/irq.h>
#include "reset.h"
@ -84,5 +83,4 @@ const char *get_system_type(void)
void __init arch_init_irq(void)
{
irqchip_init();
jz4740_intc_init();
}