staging: pi433: fix CamelCase for fifo variables
Fixes checkpatch warnings: CHECK: Avoid CamelCase: <fifoEmpty> CHECK: Avoid CamelCase: <fifoFillCondition> CHECK: Avoid CamelCase: <fifoFull> CHECK: Avoid CamelCase: <fifoLevel> CHECK: Avoid CamelCase: <fifoLevelBelowThreshold> CHECK: Avoid CamelCase: <fifoNotEmpty> CHECK: Avoid CamelCase: <fifoOverrun> Signed-off-by: Valentin Vidic <Valentin.Vidic@CARNet.hr> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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dd1114693b
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acf71f8dfc
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@ -110,9 +110,9 @@ rf params:
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ramp12 - amp ramps up in 12us
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ramp12 - amp ramps up in 12us
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ramp10 - amp ramps up in 10us
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ramp10 - amp ramps up in 10us
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tx_start_condition
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tx_start_condition
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fifoLevel - transmission starts, if fifo is filled to
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fifo_level - transmission starts, if fifo is filled to
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threshold level
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threshold level
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fifoNotEmpty - transmission starts, as soon as there is one
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fifo_not_empty - transmission starts, as soon as there is one
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byte in internal fifo
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byte in internal fifo
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repetitions
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repetitions
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This gives the option, to send a telegram multiple times. Default: 1
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This gives the option, to send a telegram multiple times. Default: 1
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@ -505,24 +505,24 @@ int rf69_set_dio_mapping(struct spi_device *spi, u8 DIONumber, u8 value)
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bool rf69_get_flag(struct spi_device *spi, enum flag flag)
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bool rf69_get_flag(struct spi_device *spi, enum flag flag)
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{
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{
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switch (flag) {
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switch (flag) {
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case modeSwitchCompleted: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
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case modeSwitchCompleted: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_MODE_READY);
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case readyToReceive: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
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case readyToReceive: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RX_READY);
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case readyToSend: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
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case readyToSend: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TX_READY);
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case pllLocked: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
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case pllLocked: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_PLL_LOCK);
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case rssiExceededThreshold: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
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case rssiExceededThreshold: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_RSSI);
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case timeout: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
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case timeout: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_TIMEOUT);
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case automode: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
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case automode: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_AUTOMODE);
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case syncAddressMatch: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
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case syncAddressMatch: return (rf69_read_reg(spi, REG_IRQFLAGS1) & MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
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case fifoFull: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
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case fifo_full: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_FULL);
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/* case fifoNotEmpty: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY); */
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/* case fifo_not_empty: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY); */
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case fifoEmpty: return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
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case fifo_empty: return !(rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_NOT_EMPTY);
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case fifoLevelBelowThreshold: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
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case fifo_level_below_threshold: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_LEVEL);
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case fifoOverrun: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
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case fifo_overrun: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_FIFO_OVERRUN);
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case packetSent: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
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case packetSent: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PACKET_SENT);
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case payloadReady: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
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case payloadReady: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_PAYLOAD_READY);
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case crcOk: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
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case crcOk: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_CRC_OK);
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case batteryLow: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
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case batteryLow: return (rf69_read_reg(spi, REG_IRQFLAGS2) & MASK_IRQFLAGS2_LOW_BAT);
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default: return false;
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default: return false;
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}
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}
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}
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}
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@ -531,7 +531,7 @@ int rf69_reset_flag(struct spi_device *spi, enum flag flag)
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switch (flag) {
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switch (flag) {
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case rssiExceededThreshold: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_RSSI);
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case rssiExceededThreshold: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_RSSI);
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case syncAddressMatch: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
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case syncAddressMatch: return rf69_write_reg(spi, REG_IRQFLAGS1, MASK_IRQFLAGS1_SYNC_ADDRESS_MATCH);
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case fifoOverrun: return rf69_write_reg(spi, REG_IRQFLAGS2, MASK_IRQFLAGS2_FIFO_OVERRUN);
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case fifo_overrun: return rf69_write_reg(spi, REG_IRQFLAGS2, MASK_IRQFLAGS2_FIFO_OVERRUN);
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default:
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default:
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dev_dbg(&spi->dev, "set: illegal input param");
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dev_dbg(&spi->dev, "set: illegal input param");
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return -EINVAL;
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return -EINVAL;
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@ -589,9 +589,9 @@ int rf69_disable_sync(struct spi_device *spi)
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return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
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return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_SYNC_ON);
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}
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}
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int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifoFillCondition fifoFillCondition)
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int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifo_fill_condition fifo_fill_condition)
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{
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{
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switch (fifoFillCondition) {
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switch (fifo_fill_condition) {
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case always: return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
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case always: return rf69_set_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
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case afterSyncInterrupt: return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
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case afterSyncInterrupt: return rf69_clear_bit(spi, REG_SYNC_CONFIG, MASK_SYNC_CONFIG_FIFO_FILL_CONDITION);
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default:
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default:
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@ -696,8 +696,8 @@ int rf69_set_broadcast_address(struct spi_device *spi, u8 broadcastAddress)
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int rf69_set_tx_start_condition(struct spi_device *spi, enum txStartCondition txStartCondition)
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int rf69_set_tx_start_condition(struct spi_device *spi, enum txStartCondition txStartCondition)
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{
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{
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switch (txStartCondition) {
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switch (txStartCondition) {
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case fifoLevel: return rf69_clear_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
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case fifo_level: return rf69_clear_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
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case fifoNotEmpty: return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
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case fifo_not_empty: return rf69_set_bit(spi, REG_FIFO_THRESH, MASK_FIFO_THRESH_TXSTART);
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default:
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default:
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dev_dbg(&spi->dev, "set: illegal input param");
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dev_dbg(&spi->dev, "set: illegal input param");
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return -EINVAL;
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return -EINVAL;
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@ -56,7 +56,7 @@ int rf69_set_rssi_timeout(struct spi_device *spi, u8 timeout);
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int rf69_set_preamble_length(struct spi_device *spi, u16 preambleLength);
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int rf69_set_preamble_length(struct spi_device *spi, u16 preambleLength);
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int rf69_enable_sync(struct spi_device *spi);
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int rf69_enable_sync(struct spi_device *spi);
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int rf69_disable_sync(struct spi_device *spi);
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int rf69_disable_sync(struct spi_device *spi);
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int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifoFillCondition fifoFillCondition);
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int rf69_set_fifo_fill_condition(struct spi_device *spi, enum fifo_fill_condition fifo_fill_condition);
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int rf69_set_sync_size(struct spi_device *spi, u8 sync_size);
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int rf69_set_sync_size(struct spi_device *spi, u8 sync_size);
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int rf69_set_sync_tolerance(struct spi_device *spi, u8 syncTolerance);
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int rf69_set_sync_tolerance(struct spi_device *spi, u8 syncTolerance);
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int rf69_set_sync_values(struct spi_device *spi, u8 syncValues[8]);
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int rf69_set_sync_values(struct spi_device *spi, u8 syncValues[8]);
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@ -130,18 +130,18 @@ enum flag {
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timeout,
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timeout,
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automode,
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automode,
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syncAddressMatch,
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syncAddressMatch,
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fifoFull,
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fifo_full,
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// fifoNotEmpty, collision with next enum; replaced by following enum...
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// fifo_not_empty, collision with next enum; replaced by following enum...
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fifoEmpty,
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fifo_empty,
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fifoLevelBelowThreshold,
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fifo_level_below_threshold,
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fifoOverrun,
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fifo_overrun,
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packetSent,
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packetSent,
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payloadReady,
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payloadReady,
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crcOk,
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crcOk,
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batteryLow
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batteryLow
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};
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};
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enum fifoFillCondition {
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enum fifo_fill_condition {
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afterSyncInterrupt,
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afterSyncInterrupt,
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always
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always
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};
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};
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@ -152,8 +152,8 @@ enum packetFormat {
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};
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};
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enum txStartCondition {
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enum txStartCondition {
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fifoLevel,
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fifo_level,
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fifoNotEmpty
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fifo_not_empty
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};
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};
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enum addressFiltering {
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enum addressFiltering {
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