Merge branch 'for-4.3/ti-clk-dt' of https://github.com/t-kristo/linux-pm into omap-for-v4.3/dt-v2
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commit
aced048432
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@ -549,8 +549,11 @@
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#address-cells = <1>;
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#size-cells = <1>;
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ti,hwmods = "cpgmac0";
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clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
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clock-names = "fck", "cpts";
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clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>,
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<&dpll_clksel_mac_clk>;
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clock-names = "fck", "cpts", "50mclk";
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assigned-clocks = <&dpll_clksel_mac_clk>;
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assigned-clock-rates = <50000000>;
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status = "disabled";
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cpdma_channels = <8>;
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ale_entries = <1024>;
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@ -486,6 +486,15 @@
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reg = <0x4238>;
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};
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dpll_clksel_mac_clk: dpll_clksel_mac_clk {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&dpll_core_m5_ck>;
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reg = <0x4234>;
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ti,bit-shift = <2>;
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ti,dividers = <2>, <5>;
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};
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clk_32k_mosc_ck: clk_32k_mosc_ck {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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@ -71,6 +71,7 @@ static struct ti_dt_clk am43xx_clks[] = {
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DT_CLK(NULL, "clk_24mhz", "clk_24mhz"),
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DT_CLK(NULL, "cpsw_125mhz_gclk", "cpsw_125mhz_gclk"),
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DT_CLK(NULL, "cpsw_cpts_rft_clk", "cpsw_cpts_rft_clk"),
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DT_CLK(NULL, "dpll_clksel_mac_clk", "dpll_clksel_mac_clk"),
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DT_CLK(NULL, "gpio0_dbclk_mux_ck", "gpio0_dbclk_mux_ck"),
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DT_CLK(NULL, "gpio0_dbclk", "gpio0_dbclk"),
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DT_CLK(NULL, "gpio1_dbclk", "gpio1_dbclk"),
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