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MIPS: ath79: Fix the size of the MISC INTC registers in ar9132.dtsi 

There is 2 registers that is 8 bytes long, not 4.

Signed-off-by: Alban Bedel <albeu@free.fr>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Alexander Couzens <lynxis@fe80.eu>
Cc: Joel Porquet <joel@porquet.org>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/11508/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Alban Bedel 2015-11-17 20:34:51 +01:00 committed by Ralf Baechle
parent 5011a7e808
commit accbfb52d0
1 changed files with 1 additions and 1 deletions
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2
arch/mips/boot/dts/qca/ar9132.dtsi
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@ -107,7 +107,7 @@
miscintc: interrupt-controller@18060010 { miscintc: interrupt-controller@18060010 {
compatible = "qca,ar9132-misc-intc", compatible = "qca,ar9132-misc-intc",
"qca,ar7100-misc-intc"; "qca,ar7100-misc-intc";
reg = <0x18060010 0x4>; reg = <0x18060010 0x8>;
interrupt-parent = <&cpuintc>; interrupt-parent = <&cpuintc>;
interrupts = <6>; interrupts = <6>;