arm64: Convert bool ARM64_x_LEVELS to int ARM64_PGTABLE_LEVELS
Rather than having several Kconfig options, define int ARM64_PGTABLE_LEVELS which will be also useful in converting some of the pgtable macros. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Jungseok Lee <jungseoklee85@gmail.com>
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@ -207,14 +207,11 @@ config ARM64_VA_BITS
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default 42 if ARM64_VA_BITS_42
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default 48 if ARM64_VA_BITS_48
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config ARM64_2_LEVELS
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def_bool y if ARM64_64K_PAGES && ARM64_VA_BITS_42
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config ARM64_3_LEVELS
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def_bool y if ARM64_4K_PAGES && ARM64_VA_BITS_39
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config ARM64_4_LEVELS
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def_bool y if ARM64_4K_PAGES && ARM64_VA_BITS_48
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config ARM64_PGTABLE_LEVELS
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int
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default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
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default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
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default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
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config CPU_BIG_ENDIAN
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bool "Build big-endian kernel"
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@ -37,7 +37,7 @@
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* map the kernel. The swapper also maps the FDT (see __create_page_tables for
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* more information).
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*/
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS == 4
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#define SWAPPER_DIR_SIZE (3 * PAGE_SIZE)
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#define IDMAP_DIR_SIZE (3 * PAGE_SIZE)
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#else
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@ -47,9 +47,9 @@
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#ifndef __ASSEMBLY__
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#ifdef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS == 2
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#include <asm/pgtable-2level-types.h>
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#elif defined(CONFIG_ARM64_3_LEVELS)
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#elif CONFIG_ARM64_PGTABLE_LEVELS == 3
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#include <asm/pgtable-3level-types.h>
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#else
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#include <asm/pgtable-4level-types.h>
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@ -26,7 +26,7 @@
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#define check_pgt_cache() do { } while (0)
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#ifndef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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@ -44,9 +44,9 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
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set_pud(pud, __pud(__pa(pmd) | PMD_TYPE_TABLE));
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}
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#endif /* CONFIG_ARM64_2_LEVELS */
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
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{
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@ -64,7 +64,7 @@ static inline void pgd_populate(struct mm_struct *mm, pgd_t *pgd, pud_t *pud)
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set_pgd(pgd, __pgd(__pa(pud) | PUD_TYPE_TABLE));
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}
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#endif /* CONFIG_ARM64_4_LEVELS */
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
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extern pgd_t *pgd_alloc(struct mm_struct *mm);
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extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
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@ -16,9 +16,9 @@
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#ifndef __ASM_PGTABLE_HWDEF_H
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#define __ASM_PGTABLE_HWDEF_H
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#ifdef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS == 2
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#include <asm/pgtable-2level-hwdef.h>
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#elif defined(CONFIG_ARM64_3_LEVELS)
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#elif CONFIG_ARM64_PGTABLE_LEVELS == 3
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#include <asm/pgtable-3level-hwdef.h>
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#else
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#include <asm/pgtable-4level-hwdef.h>
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@ -35,7 +35,7 @@
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* VMALLOC and SPARSEMEM_VMEMMAP ranges.
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*/
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#define VMALLOC_START (UL(0xffffffffffffffff) << VA_BITS)
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#ifndef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS != 4
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#define VMALLOC_END (PAGE_OFFSET - UL(0x400000000) - SZ_64K)
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#else
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#define VMALLOC_END (PAGE_OFFSET - UL(0x40000000000) - SZ_64K)
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@ -52,10 +52,10 @@ extern void __pud_error(const char *file, int line, unsigned long val);
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extern void __pgd_error(const char *file, int line, unsigned long val);
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#define pte_ERROR(pte) __pte_error(__FILE__, __LINE__, pte_val(pte))
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#ifndef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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#define pmd_ERROR(pmd) __pmd_error(__FILE__, __LINE__, pmd_val(pmd))
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#endif
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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#define pud_ERROR(pud) __pud_error(__FILE__, __LINE__, pud_val(pud))
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#endif
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#define pgd_ERROR(pgd) __pgd_error(__FILE__, __LINE__, pgd_val(pgd))
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@ -331,7 +331,7 @@ static inline pte_t *pmd_page_vaddr(pmd_t pmd)
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*/
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#define mk_pte(page,prot) pfn_pte(page_to_pfn(page),prot)
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#ifndef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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#define pud_none(pud) (!pud_val(pud))
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#define pud_bad(pud) (!(pud_val(pud) & 2))
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@ -353,9 +353,9 @@ static inline pmd_t *pud_page_vaddr(pud_t pud)
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return __va(pud_val(pud) & PHYS_MASK & (s32)PAGE_MASK);
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}
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#endif /* CONFIG_ARM64_2_LEVELS */
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 2 */
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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#define pgd_none(pgd) (!pgd_val(pgd))
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#define pgd_bad(pgd) (!(pgd_val(pgd) & 2))
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@ -377,7 +377,7 @@ static inline pud_t *pgd_page_vaddr(pgd_t pgd)
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return __va(pgd_val(pgd) & PHYS_MASK & (s32)PAGE_MASK);
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}
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#endif /* CONFIG_ARM64_4_LEVELS */
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#endif /* CONFIG_ARM64_PGTABLE_LEVELS > 3 */
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/* to find an entry in a page-table-directory */
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#define pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
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@ -387,7 +387,7 @@ static inline pud_t *pgd_page_vaddr(pgd_t pgd)
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/* to find an entry in a kernel page-table-directory */
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#define pgd_offset_k(addr) pgd_offset(&init_mm, addr)
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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#define pud_index(addr) (((addr) >> PUD_SHIFT) & (PTRS_PER_PUD - 1))
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static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
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{
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@ -396,7 +396,7 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
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#endif
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/* Find an entry in the second-level page table.. */
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#ifndef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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#define pmd_index(addr) (((addr) >> PMD_SHIFT) & (PTRS_PER_PMD - 1))
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static inline pmd_t *pmd_offset(pud_t *pud, unsigned long addr)
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{
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@ -91,7 +91,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
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tlb_remove_page(tlb, pte);
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}
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#ifndef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
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unsigned long addr)
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{
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@ -100,7 +100,7 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
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}
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#endif
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
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unsigned long addr)
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{
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@ -484,7 +484,7 @@ ENDPROC(__calc_phys_offset)
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* Returns: pud
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*/
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.macro create_pud_entry, pgd, tbl, virt, pud, tmp1, tmp2
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS == 4
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add \tbl, \tbl, #PAGE_SIZE // bump tbl 1 page up.
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// to make room for pud
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add \pud, \pgd, #PAGE_SIZE // pgd points to pud which
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@ -104,10 +104,10 @@ void __iomem *ioremap_cache(phys_addr_t phys_addr, size_t size)
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EXPORT_SYMBOL(ioremap_cache);
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static pte_t bm_pte[PTRS_PER_PTE] __page_aligned_bss;
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#ifndef CONFIG_ARM64_2_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 2
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static pte_t bm_pmd[PTRS_PER_PMD] __page_aligned_bss;
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#endif
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#ifdef CONFIG_ARM64_4_LEVELS
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#if CONFIG_ARM64_PGTABLE_LEVELS > 3
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static pte_t bm_pud[PTRS_PER_PUD] __page_aligned_bss;
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#endif
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