ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
The gpio_base for the PMIC on the CPU module was being incorrectly set to be the same as that for the CODEC causing the two GPIO drivers to collide. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -17,7 +17,8 @@
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#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
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#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
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#define PCA935X_GPIO_BASE GPIO_BOARD_START
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#define PCA935X_GPIO_BASE GPIO_BOARD_START
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#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
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#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
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#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
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#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
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#define BANFF_PMIC_GPIO_BASE (GPIO_BOARD_START + 32)
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#endif
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#endif
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@ -500,7 +500,7 @@ static struct wm831x_touch_pdata touch_pdata __initdata = {
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static struct wm831x_pdata crag_pmic_pdata __initdata = {
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static struct wm831x_pdata crag_pmic_pdata __initdata = {
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.wm831x_num = 1,
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.wm831x_num = 1,
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.irq_base = BANFF_PMIC_IRQ_BASE,
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.irq_base = BANFF_PMIC_IRQ_BASE,
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.gpio_base = GPIO_BOARD_START + 8,
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.gpio_base = BANFF_PMIC_GPIO_BASE,
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.backup = &banff_backup_pdata,
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.backup = &banff_backup_pdata,
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