spi: hisi-sfc-v3xx: factor out the bit definition of interrupt register
The definition of the register field in the interrupt corresponding registers are the same. So factor them out to public place. Acked-by: John Garry <john.garry@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Link: https://lore.kernel.org/r/1600950270-52536-4-git-send-email-yangyicong@hisilicon.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -18,10 +18,7 @@
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#define HISI_SFC_V3XX_VERSION (0x1f8)
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#define HISI_SFC_V3XX_INT_STAT (0x120)
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#define HISI_SFC_V3XX_INT_STAT_PP_ERR BIT(2)
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#define HISI_SFC_V3XX_INT_STAT_ADDR_IACCES BIT(5)
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#define HISI_SFC_V3XX_INT_CLR (0x12c)
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#define HISI_SFC_V3XX_INT_CLR_CLEAR (0xff)
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#define HISI_SFC_V3XX_CMD_CFG (0x300)
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#define HISI_SFC_V3XX_CMD_CFG_DATA_CNT_OFF 9
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#define HISI_SFC_V3XX_CMD_CFG_RW_MSK BIT(8)
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@ -34,6 +31,13 @@
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#define HISI_SFC_V3XX_CMD_ADDR (0x30c)
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#define HISI_SFC_V3XX_CMD_DATABUF0 (0x400)
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/* Common definition of interrupt bit masks */
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#define HISI_SFC_V3XX_INT_MASK_ALL (0x1ff) /* all the masks */
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#define HISI_SFC_V3XX_INT_MASK_PP_ERR BIT(2) /* page progrom error */
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#define HISI_SFC_V3XX_INT_MASK_IACCES BIT(5) /* error visiting inaccessible/
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* protected address
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*/
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/* IO Mode definition in HISI_SFC_V3XX_CMD_CFG */
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#define HISI_SFC_V3XX_STD (0 << 17)
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#define HISI_SFC_V3XX_DIDO (1 << 17)
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@ -266,15 +270,15 @@ static int hisi_sfc_v3xx_generic_exec_op(struct hisi_sfc_v3xx_host *host,
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* next time judgement.
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*/
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int_stat = readl(host->regbase + HISI_SFC_V3XX_INT_STAT);
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writel(HISI_SFC_V3XX_INT_CLR_CLEAR,
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writel(HISI_SFC_V3XX_INT_MASK_ALL,
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host->regbase + HISI_SFC_V3XX_INT_CLR);
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if (int_stat & HISI_SFC_V3XX_INT_STAT_ADDR_IACCES) {
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if (int_stat & HISI_SFC_V3XX_INT_MASK_IACCES) {
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dev_err(host->dev, "fail to access protected address\n");
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return -EIO;
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}
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if (int_stat & HISI_SFC_V3XX_INT_STAT_PP_ERR) {
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if (int_stat & HISI_SFC_V3XX_INT_MASK_PP_ERR) {
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dev_err(host->dev, "page program operation failed\n");
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return -EIO;
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}
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