arm64: dts: qcom: msm8998: Add ADSP, MPSS and SLPI nodes
This patch adds ADSP, MPSS and SLPI nodes for MSM8998 SoCs. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20191218132217.28141-6-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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@ -311,6 +311,14 @@
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};
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};
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&remoteproc_adsp {
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status = "okay";
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};
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&remoteproc_slpi {
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status = "okay";
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};
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&tlmm {
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gpio-reserved-ranges = <0 4>, <81 4>;
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};
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@ -1073,6 +1073,61 @@
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#interrupt-cells = <0x2>;
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};
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remoteproc_mss: remoteproc@4080000 {
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compatible = "qcom,msm8998-mss-pil";
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reg = <0x04080000 0x100>, <0x04180000 0x20>;
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reg-names = "qdsp6", "rmb";
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interrupts-extended =
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<&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 3 IRQ_TYPE_EDGE_RISING>,
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<&modem_smp2p_in 7 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack",
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"shutdown-ack";
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clocks = <&gcc GCC_MSS_CFG_AHB_CLK>,
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<&gcc GCC_BIMC_MSS_Q6_AXI_CLK>,
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<&gcc GCC_BOOT_ROM_AHB_CLK>,
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<&gcc GCC_MSS_GPLL0_DIV_CLK_SRC>,
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<&gcc GCC_MSS_SNOC_AXI_CLK>,
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<&gcc GCC_MSS_MNOC_BIMC_AXI_CLK>,
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<&rpmcc RPM_SMD_QDSS_CLK>,
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<&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "iface", "bus", "mem", "gpll0_mss",
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"snoc_axi", "mnoc_axi", "qdss", "xo";
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qcom,smem-states = <&modem_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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resets = <&gcc GCC_MSS_RESTART>;
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reset-names = "mss_restart";
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qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>;
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power-domains = <&rpmpd MSM8998_VDDCX>,
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<&rpmpd MSM8998_VDDMX>;
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power-domain-names = "cx", "mx";
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mba {
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memory-region = <&mba_mem>;
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};
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mpss {
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memory-region = <&mpss_mem>;
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};
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glink-edge {
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interrupts = <GIC_SPI 452 IRQ_TYPE_EDGE_RISING>;
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label = "modem";
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qcom,remote-pid = <1>;
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mboxes = <&apcs_glb 15>;
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};
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};
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gpucc: clock-controller@5065000 {
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compatible = "qcom,msm8998-gpucc";
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#clock-cells = <1>;
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@ -1086,6 +1141,42 @@
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"gpll0";
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};
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remoteproc_slpi: remoteproc@5800000 {
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compatible = "qcom,msm8998-slpi-pas";
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reg = <0x05800000 0x4040>;
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interrupts-extended = <&intc GIC_SPI 390 IRQ_TYPE_EDGE_RISING>,
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<&slpi_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&slpi_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&slpi_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&slpi_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack";
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px-supply = <&vreg_lvs2a_1p8>;
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>,
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<&rpmcc RPM_SMD_AGGR2_NOC_CLK>;
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clock-names = "xo", "aggre2";
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memory-region = <&slpi_mem>;
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qcom,smem-states = <&slpi_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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power-domains = <&rpmpd MSM8998_SSCCX>;
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power-domain-names = "ssc_cx";
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status = "disabled";
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glink-edge {
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interrupts = <GIC_SPI 179 IRQ_TYPE_EDGE_RISING>;
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label = "dsps";
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qcom,remote-pid = <3>;
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mboxes = <&apcs_glb 27>;
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};
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};
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stm: stm@6002000 {
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compatible = "arm,coresight-stm", "arm,primecell";
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reg = <0x06002000 0x1000>,
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@ -1878,6 +1969,39 @@
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#size-cells = <0>;
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};
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remoteproc_adsp: remoteproc@17300000 {
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compatible = "qcom,msm8998-adsp-pas";
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reg = <0x17300000 0x4040>;
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interrupts-extended = <&intc GIC_SPI 162 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 1 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 2 IRQ_TYPE_EDGE_RISING>,
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<&adsp_smp2p_in 3 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "wdog", "fatal", "ready",
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"handover", "stop-ack";
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>;
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clock-names = "xo";
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memory-region = <&adsp_mem>;
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qcom,smem-states = <&adsp_smp2p_out 0>;
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qcom,smem-state-names = "stop";
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power-domains = <&rpmpd MSM8998_VDDCX>;
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power-domain-names = "cx";
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status = "disabled";
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glink-edge {
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interrupts = <GIC_SPI 157 IRQ_TYPE_EDGE_RISING>;
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label = "lpass";
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qcom,remote-pid = <2>;
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mboxes = <&apcs_glb 9>;
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};
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};
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apcs_glb: mailbox@17911000 {
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compatible = "qcom,msm8998-apcs-hmss-global";
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reg = <0x17911000 0x1000>;
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