ath6kl: Remove unused analog_register header files
Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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#ifndef _ANALOG_INTF_REG_REG_H_
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#define _ANALOG_INTF_REG_REG_H_
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#define SW_OVERRIDE_ADDRESS 0x00000080
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#define SW_OVERRIDE_OFFSET 0x00000080
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#define SW_OVERRIDE_SUPDATE_DELAY_MSB 1
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#define SW_OVERRIDE_SUPDATE_DELAY_LSB 1
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#define SW_OVERRIDE_SUPDATE_DELAY_MASK 0x00000002
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#define SW_OVERRIDE_SUPDATE_DELAY_GET(x) (((x) & SW_OVERRIDE_SUPDATE_DELAY_MASK) >> SW_OVERRIDE_SUPDATE_DELAY_LSB)
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#define SW_OVERRIDE_SUPDATE_DELAY_SET(x) (((x) << SW_OVERRIDE_SUPDATE_DELAY_LSB) & SW_OVERRIDE_SUPDATE_DELAY_MASK)
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#define SW_OVERRIDE_ENABLE_MSB 0
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#define SW_OVERRIDE_ENABLE_LSB 0
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#define SW_OVERRIDE_ENABLE_MASK 0x00000001
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#define SW_OVERRIDE_ENABLE_GET(x) (((x) & SW_OVERRIDE_ENABLE_MASK) >> SW_OVERRIDE_ENABLE_LSB)
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#define SW_OVERRIDE_ENABLE_SET(x) (((x) << SW_OVERRIDE_ENABLE_LSB) & SW_OVERRIDE_ENABLE_MASK)
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#define SIN_VAL_ADDRESS 0x00000084
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#define SIN_VAL_OFFSET 0x00000084
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#define SIN_VAL_SIN_MSB 0
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#define SIN_VAL_SIN_LSB 0
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#define SIN_VAL_SIN_MASK 0x00000001
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#define SIN_VAL_SIN_GET(x) (((x) & SIN_VAL_SIN_MASK) >> SIN_VAL_SIN_LSB)
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#define SIN_VAL_SIN_SET(x) (((x) << SIN_VAL_SIN_LSB) & SIN_VAL_SIN_MASK)
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#define SW_SCLK_ADDRESS 0x00000088
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#define SW_SCLK_OFFSET 0x00000088
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#define SW_SCLK_SW_SCLK_MSB 0
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#define SW_SCLK_SW_SCLK_LSB 0
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#define SW_SCLK_SW_SCLK_MASK 0x00000001
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#define SW_SCLK_SW_SCLK_GET(x) (((x) & SW_SCLK_SW_SCLK_MASK) >> SW_SCLK_SW_SCLK_LSB)
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#define SW_SCLK_SW_SCLK_SET(x) (((x) << SW_SCLK_SW_SCLK_LSB) & SW_SCLK_SW_SCLK_MASK)
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#define SW_CNTL_ADDRESS 0x0000008c
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#define SW_CNTL_OFFSET 0x0000008c
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#define SW_CNTL_SW_SCAPTURE_MSB 2
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#define SW_CNTL_SW_SCAPTURE_LSB 2
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#define SW_CNTL_SW_SCAPTURE_MASK 0x00000004
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#define SW_CNTL_SW_SCAPTURE_GET(x) (((x) & SW_CNTL_SW_SCAPTURE_MASK) >> SW_CNTL_SW_SCAPTURE_LSB)
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#define SW_CNTL_SW_SCAPTURE_SET(x) (((x) << SW_CNTL_SW_SCAPTURE_LSB) & SW_CNTL_SW_SCAPTURE_MASK)
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#define SW_CNTL_SW_SUPDATE_MSB 1
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#define SW_CNTL_SW_SUPDATE_LSB 1
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#define SW_CNTL_SW_SUPDATE_MASK 0x00000002
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#define SW_CNTL_SW_SUPDATE_GET(x) (((x) & SW_CNTL_SW_SUPDATE_MASK) >> SW_CNTL_SW_SUPDATE_LSB)
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#define SW_CNTL_SW_SUPDATE_SET(x) (((x) << SW_CNTL_SW_SUPDATE_LSB) & SW_CNTL_SW_SUPDATE_MASK)
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#define SW_CNTL_SW_SOUT_MSB 0
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#define SW_CNTL_SW_SOUT_LSB 0
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#define SW_CNTL_SW_SOUT_MASK 0x00000001
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#define SW_CNTL_SW_SOUT_GET(x) (((x) & SW_CNTL_SW_SOUT_MASK) >> SW_CNTL_SW_SOUT_LSB)
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#define SW_CNTL_SW_SOUT_SET(x) (((x) << SW_CNTL_SW_SOUT_LSB) & SW_CNTL_SW_SOUT_MASK)
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#ifndef __ASSEMBLER__
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typedef struct analog_intf_reg_reg_s {
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unsigned char pad0[128]; /* pad to 0x80 */
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volatile unsigned int sw_override;
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volatile unsigned int sin_val;
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volatile unsigned int sw_sclk;
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volatile unsigned int sw_cntl;
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} analog_intf_reg_reg_t;
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#endif /* __ASSEMBLER__ */
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#endif /* _ANALOG_INTF_REG_H_ */
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// ------------------------------------------------------------------
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// Copyright (c) 2004-2010 Atheros Corporation. All rights reserved.
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//
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//
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// Permission to use, copy, modify, and/or distribute this software for any
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// purpose with or without fee is hereby granted, provided that the above
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// copyright notice and this permission notice appear in all copies.
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//
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// THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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// WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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// MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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// ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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// WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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// ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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// OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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//
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//
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// ------------------------------------------------------------------
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//===================================================================
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// Author(s): ="Atheros"
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//===================================================================
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#include "analog_intf_athr_wlan_reg.h"
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