[MIPS] MT: Fix setting of XTC.
XTC can only be set if VPA is clear, which it may not be. There is also the possibility of a back to back c0 register access hazard to take care of. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
6e74bae9a0
commit
a94d702049
|
@ -768,10 +768,16 @@ int vpe_run(struct vpe * v)
|
|||
*/
|
||||
write_tc_c0_tcbind((read_tc_c0_tcbind() & ~TCBIND_CURVPE) | v->minor);
|
||||
|
||||
write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() & ~(VPECONF0_VPA));
|
||||
|
||||
back_to_back_c0_hazard();
|
||||
|
||||
/* Set up the XTC bit in vpeconf0 to point at our tc */
|
||||
write_vpe_c0_vpeconf0( (read_vpe_c0_vpeconf0() & ~(VPECONF0_XTC))
|
||||
| (t->index << VPECONF0_XTC_SHIFT));
|
||||
|
||||
back_to_back_c0_hazard();
|
||||
|
||||
/* enable this VPE */
|
||||
write_vpe_c0_vpeconf0(read_vpe_c0_vpeconf0() | VPECONF0_VPA);
|
||||
|
||||
|
|
Loading…
Reference in New Issue