mtd: nand: Introduce the ECC engine framework
Create a generic ECC engine framework. This is a base to instantiate ECC engine objects. If we really want to be generic, bindings must evolve, so here is the new logic. The following three properties are mutually exclusive: - The nand-no-ecc-engine boolean property is set and there is no ECC engine to retrieve. - The nand-use-soft-ecc-engine boolean property is set and the core will force using the use of software correction. - There is a nand-ecc-engine property pointing at a node which will act as ECC engine. It the later case, the property may reference: - The NAND chip node itself (for the on-die ECC case). - The parent node if the NAND controller embeds an ECC engine. - Any other node being an external ECC controller as well. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200827085208.16276-9-miquel.raynal@bootlin.com
This commit is contained in:
Miquel Raynal
parent
b440915af2
commit
a8c7ffdb5f
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@ -9,4 +9,12 @@ source "drivers/mtd/nand/onenand/Kconfig"
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source "drivers/mtd/nand/raw/Kconfig"
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source "drivers/mtd/nand/spi/Kconfig"
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menu "ECC engine support"
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config MTD_NAND_ECC
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bool
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depends on MTD_NAND_CORE
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endmenu
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endmenu
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@ -6,3 +6,5 @@ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
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obj-y += onenand/
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obj-y += raw/
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obj-y += spi/
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nandcore-$(CONFIG_MTD_NAND_ECC) += ecc.o
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@ -0,0 +1,484 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Generic Error-Correcting Code (ECC) engine
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*
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* Copyright (C) 2019 Macronix
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* Author:
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* Miquèl RAYNAL <miquel.raynal@bootlin.com>
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*
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*
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* This file describes the abstraction of any NAND ECC engine. It has been
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* designed to fit most cases, including parallel NANDs and SPI-NANDs.
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*
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* There are three main situations where instantiating this ECC engine makes
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* sense:
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* - external: The ECC engine is outside the NAND pipeline, typically this
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* is a software ECC engine, or an hardware engine that is
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* outside the NAND controller pipeline.
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* - pipelined: The ECC engine is inside the NAND pipeline, ie. on the
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* controller's side. This is the case of most of the raw NAND
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* controllers. In the pipeline case, the ECC bytes are
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* generated/data corrected on the fly when a page is
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* written/read.
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* - ondie: The ECC engine is inside the NAND pipeline, on the chip's side.
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* Some NAND chips can correct themselves the data.
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*
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* Besides the initial setup and final cleanups, the interfaces are rather
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* simple:
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* - prepare: Prepare an I/O request. Enable/disable the ECC engine based on
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* the I/O request type. In case of software correction or external
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* engine, this step may involve to derive the ECC bytes and place
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* them in the OOB area before a write.
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* - finish: Finish an I/O request. Correct the data in case of a read
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* request and report the number of corrected bits/uncorrectable
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* errors. Most likely empty for write operations, unless you have
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* hardware specific stuff to do, like shutting down the engine to
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* save power.
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*
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* The I/O request should be enclosed in a prepare()/finish() pair of calls
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* and will behave differently depending on the requested I/O type:
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* - raw: Correction disabled
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* - ecc: Correction enabled
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*
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* The request direction is impacting the logic as well:
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* - read: Load data from the NAND chip
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* - write: Store data in the NAND chip
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*
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* Mixing all this combinations together gives the following behavior.
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* Those are just examples, drivers are free to add custom steps in their
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* prepare/finish hook.
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*
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* [external ECC engine]
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* - external + prepare + raw + read: do nothing
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* - external + finish + raw + read: do nothing
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* - external + prepare + raw + write: do nothing
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* - external + finish + raw + write: do nothing
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* - external + prepare + ecc + read: do nothing
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* - external + finish + ecc + read: calculate expected ECC bytes, extract
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* ECC bytes from OOB buffer, correct
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* and report any bitflip/error
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* - external + prepare + ecc + write: calculate ECC bytes and store them at
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* the right place in the OOB buffer based
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* on the OOB layout
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* - external + finish + ecc + write: do nothing
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*
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* [pipelined ECC engine]
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* - pipelined + prepare + raw + read: disable the controller's ECC engine if
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* activated
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* - pipelined + finish + raw + read: do nothing
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* - pipelined + prepare + raw + write: disable the controller's ECC engine if
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* activated
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* - pipelined + finish + raw + write: do nothing
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* - pipelined + prepare + ecc + read: enable the controller's ECC engine if
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* deactivated
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* - pipelined + finish + ecc + read: check the status, report any
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* error/bitflip
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* - pipelined + prepare + ecc + write: enable the controller's ECC engine if
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* deactivated
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* - pipelined + finish + ecc + write: do nothing
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*
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* [ondie ECC engine]
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* - ondie + prepare + raw + read: send commands to disable the on-chip ECC
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* engine if activated
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* - ondie + finish + raw + read: do nothing
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* - ondie + prepare + raw + write: send commands to disable the on-chip ECC
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* engine if activated
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* - ondie + finish + raw + write: do nothing
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* - ondie + prepare + ecc + read: send commands to enable the on-chip ECC
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* engine if deactivated
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* - ondie + finish + ecc + read: send commands to check the status, report
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* any error/bitflip
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* - ondie + prepare + ecc + write: send commands to enable the on-chip ECC
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* engine if deactivated
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* - ondie + finish + ecc + write: do nothing
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*/
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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/**
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* nand_ecc_init_ctx - Init the ECC engine context
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* @nand: the NAND device
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*
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* On success, the caller is responsible of calling @nand_ecc_cleanup_ctx().
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*/
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int nand_ecc_init_ctx(struct nand_device *nand)
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{
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if (!nand->ecc.engine->ops->init_ctx)
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return 0;
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return nand->ecc.engine->ops->init_ctx(nand);
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}
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EXPORT_SYMBOL(nand_ecc_init_ctx);
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/**
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* nand_ecc_cleanup_ctx - Cleanup the ECC engine context
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* @nand: the NAND device
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*/
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void nand_ecc_cleanup_ctx(struct nand_device *nand)
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{
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if (nand->ecc.engine->ops->cleanup_ctx)
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nand->ecc.engine->ops->cleanup_ctx(nand);
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}
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EXPORT_SYMBOL(nand_ecc_cleanup_ctx);
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/**
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* nand_ecc_prepare_io_req - Prepare an I/O request
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* @nand: the NAND device
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* @req: the I/O request
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*/
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int nand_ecc_prepare_io_req(struct nand_device *nand,
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struct nand_page_io_req *req)
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{
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if (!nand->ecc.engine->ops->prepare_io_req)
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return 0;
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return nand->ecc.engine->ops->prepare_io_req(nand, req);
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}
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EXPORT_SYMBOL(nand_ecc_prepare_io_req);
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/**
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* nand_ecc_finish_io_req - Finish an I/O request
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* @nand: the NAND device
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* @req: the I/O request
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*/
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int nand_ecc_finish_io_req(struct nand_device *nand,
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struct nand_page_io_req *req)
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{
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if (!nand->ecc.engine->ops->finish_io_req)
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return 0;
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return nand->ecc.engine->ops->finish_io_req(nand, req);
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}
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EXPORT_SYMBOL(nand_ecc_finish_io_req);
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/* Define default OOB placement schemes for large and small page devices */
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static int nand_ooblayout_ecc_sp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section > 1)
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return -ERANGE;
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if (!section) {
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oobregion->offset = 0;
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if (mtd->oobsize == 16)
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oobregion->length = 4;
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else
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oobregion->length = 3;
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} else {
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if (mtd->oobsize == 8)
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return -ERANGE;
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oobregion->offset = 6;
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oobregion->length = total_ecc_bytes - 4;
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}
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return 0;
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}
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static int nand_ooblayout_free_sp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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if (section > 1)
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return -ERANGE;
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if (mtd->oobsize == 16) {
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if (section)
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return -ERANGE;
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oobregion->length = 8;
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oobregion->offset = 8;
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} else {
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oobregion->length = 2;
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if (!section)
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oobregion->offset = 3;
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else
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oobregion->offset = 6;
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops nand_ooblayout_sp_ops = {
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.ecc = nand_ooblayout_ecc_sp,
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.free = nand_ooblayout_free_sp,
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};
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const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void)
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{
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return &nand_ooblayout_sp_ops;
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}
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EXPORT_SYMBOL_GPL(nand_get_small_page_ooblayout);
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static int nand_ooblayout_ecc_lp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section || !total_ecc_bytes)
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return -ERANGE;
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oobregion->length = total_ecc_bytes;
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oobregion->offset = mtd->oobsize - oobregion->length;
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return 0;
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}
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static int nand_ooblayout_free_lp(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section)
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return -ERANGE;
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oobregion->length = mtd->oobsize - total_ecc_bytes - 2;
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oobregion->offset = 2;
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return 0;
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}
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static const struct mtd_ooblayout_ops nand_ooblayout_lp_ops = {
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.ecc = nand_ooblayout_ecc_lp,
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.free = nand_ooblayout_free_lp,
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};
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const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void)
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{
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return &nand_ooblayout_lp_ops;
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}
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EXPORT_SYMBOL_GPL(nand_get_large_page_ooblayout);
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/*
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* Support the old "large page" layout used for 1-bit Hamming ECC where ECC
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* are placed at a fixed offset.
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*/
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static int nand_ooblayout_ecc_lp_hamming(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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if (section)
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return -ERANGE;
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switch (mtd->oobsize) {
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case 64:
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oobregion->offset = 40;
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break;
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case 128:
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oobregion->offset = 80;
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break;
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default:
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return -EINVAL;
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}
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oobregion->length = total_ecc_bytes;
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if (oobregion->offset + oobregion->length > mtd->oobsize)
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return -ERANGE;
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return 0;
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}
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static int nand_ooblayout_free_lp_hamming(struct mtd_info *mtd, int section,
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struct mtd_oob_region *oobregion)
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{
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struct nand_device *nand = mtd_to_nanddev(mtd);
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unsigned int total_ecc_bytes = nand->ecc.ctx.total;
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int ecc_offset = 0;
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if (section < 0 || section > 1)
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return -ERANGE;
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switch (mtd->oobsize) {
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case 64:
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ecc_offset = 40;
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break;
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case 128:
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ecc_offset = 80;
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break;
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default:
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return -EINVAL;
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}
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if (section == 0) {
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oobregion->offset = 2;
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oobregion->length = ecc_offset - 2;
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} else {
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oobregion->offset = ecc_offset + total_ecc_bytes;
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oobregion->length = mtd->oobsize - oobregion->offset;
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}
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return 0;
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}
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static const struct mtd_ooblayout_ops nand_ooblayout_lp_hamming_ops = {
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.ecc = nand_ooblayout_ecc_lp_hamming,
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.free = nand_ooblayout_free_lp_hamming,
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};
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const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void)
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{
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return &nand_ooblayout_lp_hamming_ops;
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}
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EXPORT_SYMBOL_GPL(nand_get_large_page_hamming_ooblayout);
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static enum nand_ecc_engine_type
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of_get_nand_ecc_engine_type(struct device_node *np)
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{
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struct device_node *eng_np;
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if (of_property_read_bool(np, "nand-no-ecc-engine"))
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return NAND_ECC_ENGINE_TYPE_NONE;
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if (of_property_read_bool(np, "nand-use-soft-ecc-engine"))
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return NAND_ECC_ENGINE_TYPE_SOFT;
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eng_np = of_parse_phandle(np, "nand-ecc-engine", 0);
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of_node_put(eng_np);
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if (eng_np) {
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if (eng_np == np)
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return NAND_ECC_ENGINE_TYPE_ON_DIE;
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else
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return NAND_ECC_ENGINE_TYPE_ON_HOST;
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}
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return NAND_ECC_ENGINE_TYPE_INVALID;
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}
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static const char * const nand_ecc_placement[] = {
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[NAND_ECC_PLACEMENT_OOB] = "oob",
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[NAND_ECC_PLACEMENT_INTERLEAVED] = "interleaved",
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};
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static enum nand_ecc_placement of_get_nand_ecc_placement(struct device_node *np)
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{
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enum nand_ecc_placement placement;
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const char *pm;
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int err;
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err = of_property_read_string(np, "nand-ecc-placement", &pm);
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if (!err) {
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for (placement = NAND_ECC_PLACEMENT_OOB;
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placement < ARRAY_SIZE(nand_ecc_placement); placement++) {
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if (!strcasecmp(pm, nand_ecc_placement[placement]))
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return placement;
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}
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}
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return NAND_ECC_PLACEMENT_UNKNOWN;
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}
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static const char * const nand_ecc_algos[] = {
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[NAND_ECC_ALGO_HAMMING] = "hamming",
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[NAND_ECC_ALGO_BCH] = "bch",
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[NAND_ECC_ALGO_RS] = "rs",
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};
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static enum nand_ecc_algo of_get_nand_ecc_algo(struct device_node *np)
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{
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enum nand_ecc_algo ecc_algo;
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const char *pm;
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int err;
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err = of_property_read_string(np, "nand-ecc-algo", &pm);
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if (!err) {
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for (ecc_algo = NAND_ECC_ALGO_HAMMING;
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ecc_algo < ARRAY_SIZE(nand_ecc_algos);
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ecc_algo++) {
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if (!strcasecmp(pm, nand_ecc_algos[ecc_algo]))
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return ecc_algo;
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}
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}
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return NAND_ECC_ALGO_UNKNOWN;
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}
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static int of_get_nand_ecc_step_size(struct device_node *np)
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{
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int ret;
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u32 val;
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ret = of_property_read_u32(np, "nand-ecc-step-size", &val);
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return ret ? ret : val;
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}
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static int of_get_nand_ecc_strength(struct device_node *np)
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{
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int ret;
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u32 val;
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ret = of_property_read_u32(np, "nand-ecc-strength", &val);
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return ret ? ret : val;
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}
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void of_get_nand_ecc_user_config(struct nand_device *nand)
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{
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struct device_node *dn = nanddev_get_of_node(nand);
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int strength, size;
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nand->ecc.user_conf.engine_type = of_get_nand_ecc_engine_type(dn);
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nand->ecc.user_conf.algo = of_get_nand_ecc_algo(dn);
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nand->ecc.user_conf.placement = of_get_nand_ecc_placement(dn);
|
||||
|
||||
strength = of_get_nand_ecc_strength(dn);
|
||||
if (strength >= 0)
|
||||
nand->ecc.user_conf.strength = strength;
|
||||
|
||||
size = of_get_nand_ecc_step_size(dn);
|
||||
if (size >= 0)
|
||||
nand->ecc.user_conf.step_size = size;
|
||||
|
||||
if (of_property_read_bool(dn, "nand-ecc-maximize"))
|
||||
nand->ecc.user_conf.flags |= NAND_ECC_MAXIMIZE_STRENGTH;
|
||||
}
|
||||
EXPORT_SYMBOL(of_get_nand_ecc_user_config);
|
||||
|
||||
/**
|
||||
* nand_ecc_is_strong_enough - Check if the chip configuration meets the
|
||||
* datasheet requirements.
|
||||
*
|
||||
* @nand: Device to check
|
||||
*
|
||||
* If our configuration corrects A bits per B bytes and the minimum
|
||||
* required correction level is X bits per Y bytes, then we must ensure
|
||||
* both of the following are true:
|
||||
*
|
||||
* (1) A / B >= X / Y
|
||||
* (2) A >= X
|
||||
*
|
||||
* Requirement (1) ensures we can correct for the required bitflip density.
|
||||
* Requirement (2) ensures we can correct even when all bitflips are clumped
|
||||
* in the same sector.
|
||||
*/
|
||||
bool nand_ecc_is_strong_enough(struct nand_device *nand)
|
||||
{
|
||||
const struct nand_ecc_props *reqs = nanddev_get_ecc_requirements(nand);
|
||||
const struct nand_ecc_props *conf = nanddev_get_ecc_conf(nand);
|
||||
struct mtd_info *mtd = nanddev_to_mtd(nand);
|
||||
int corr, ds_corr;
|
||||
|
||||
if (conf->step_size == 0 || reqs->step_size == 0)
|
||||
/* Not enough information */
|
||||
return true;
|
||||
|
||||
/*
|
||||
* We get the number of corrected bits per page to compare
|
||||
* the correction density.
|
||||
*/
|
||||
corr = (mtd->writesize * conf->strength) / conf->step_size;
|
||||
ds_corr = (mtd->writesize * reqs->strength) / reqs->step_size;
|
||||
|
||||
return corr >= ds_corr && conf->strength >= reqs->strength;
|
||||
}
|
||||
EXPORT_SYMBOL(nand_ecc_is_strong_enough);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_AUTHOR("Miquel Raynal <miquel.raynal@bootlin.com>");
|
||||
MODULE_DESCRIPTION("Generic ECC engine");
|
||||
|
|
@ -127,6 +127,40 @@ struct nand_page_io_req {
|
|||
int mode;
|
||||
};
|
||||
|
||||
const struct mtd_ooblayout_ops *nand_get_small_page_ooblayout(void);
|
||||
const struct mtd_ooblayout_ops *nand_get_large_page_ooblayout(void);
|
||||
const struct mtd_ooblayout_ops *nand_get_large_page_hamming_ooblayout(void);
|
||||
|
||||
/**
|
||||
* enum nand_ecc_engine_type - NAND ECC engine type
|
||||
* @NAND_ECC_ENGINE_TYPE_INVALID: Invalid value
|
||||
* @NAND_ECC_ENGINE_TYPE_NONE: No ECC correction
|
||||
* @NAND_ECC_ENGINE_TYPE_SOFT: Software ECC correction
|
||||
* @NAND_ECC_ENGINE_TYPE_ON_HOST: On host hardware ECC correction
|
||||
* @NAND_ECC_ENGINE_TYPE_ON_DIE: On chip hardware ECC correction
|
||||
*/
|
||||
enum nand_ecc_engine_type {
|
||||
NAND_ECC_ENGINE_TYPE_INVALID,
|
||||
NAND_ECC_ENGINE_TYPE_NONE,
|
||||
NAND_ECC_ENGINE_TYPE_SOFT,
|
||||
NAND_ECC_ENGINE_TYPE_ON_HOST,
|
||||
NAND_ECC_ENGINE_TYPE_ON_DIE,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum nand_ecc_placement - NAND ECC bytes placement
|
||||
* @NAND_ECC_PLACEMENT_UNKNOWN: The actual position of the ECC bytes is unknown
|
||||
* @NAND_ECC_PLACEMENT_OOB: The ECC bytes are located in the OOB area
|
||||
* @NAND_ECC_PLACEMENT_INTERLEAVED: Syndrome layout, there are ECC bytes
|
||||
* interleaved with regular data in the main
|
||||
* area
|
||||
*/
|
||||
enum nand_ecc_placement {
|
||||
NAND_ECC_PLACEMENT_UNKNOWN,
|
||||
NAND_ECC_PLACEMENT_OOB,
|
||||
NAND_ECC_PLACEMENT_INTERLEAVED,
|
||||
};
|
||||
|
||||
/**
|
||||
* enum nand_ecc_algo - NAND ECC algorithm
|
||||
* @NAND_ECC_ALGO_UNKNOWN: Unknown algorithm
|
||||
|
|
@ -143,16 +177,27 @@ enum nand_ecc_algo {
|
|||
|
||||
/**
|
||||
* struct nand_ecc_props - NAND ECC properties
|
||||
* @engine_type: ECC engine type
|
||||
* @placement: OOB placement (if relevant)
|
||||
* @algo: ECC algorithm (if relevant)
|
||||
* @strength: ECC strength
|
||||
* @step_size: Number of bytes per step
|
||||
* @flags: Misc properties
|
||||
*/
|
||||
struct nand_ecc_props {
|
||||
enum nand_ecc_engine_type engine_type;
|
||||
enum nand_ecc_placement placement;
|
||||
enum nand_ecc_algo algo;
|
||||
unsigned int strength;
|
||||
unsigned int step_size;
|
||||
unsigned int flags;
|
||||
};
|
||||
|
||||
#define NAND_ECCREQ(str, stp) { .strength = (str), .step_size = (stp) }
|
||||
|
||||
/* NAND ECC misc flags */
|
||||
#define NAND_ECC_MAXIMIZE_STRENGTH BIT(0)
|
||||
|
||||
/**
|
||||
* struct nand_bbt - bad block table object
|
||||
* @cache: in memory BBT cache
|
||||
|
|
@ -183,6 +228,75 @@ struct nand_ops {
|
|||
bool (*isbad)(struct nand_device *nand, const struct nand_pos *pos);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_ecc_context - Context for the ECC engine
|
||||
* @conf: basic ECC engine parameters
|
||||
* @total: total number of bytes used for storing ECC codes, this is used by
|
||||
* generic OOB layouts
|
||||
* @priv: ECC engine driver private data
|
||||
*/
|
||||
struct nand_ecc_context {
|
||||
struct nand_ecc_props conf;
|
||||
unsigned int total;
|
||||
void *priv;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_ecc_engine_ops - ECC engine operations
|
||||
* @init_ctx: given a desired user configuration for the pointed NAND device,
|
||||
* requests the ECC engine driver to setup a configuration with
|
||||
* values it supports.
|
||||
* @cleanup_ctx: clean the context initialized by @init_ctx.
|
||||
* @prepare_io_req: is called before reading/writing a page to prepare the I/O
|
||||
* request to be performed with ECC correction.
|
||||
* @finish_io_req: is called after reading/writing a page to terminate the I/O
|
||||
* request and ensure proper ECC correction.
|
||||
*/
|
||||
struct nand_ecc_engine_ops {
|
||||
int (*init_ctx)(struct nand_device *nand);
|
||||
void (*cleanup_ctx)(struct nand_device *nand);
|
||||
int (*prepare_io_req)(struct nand_device *nand,
|
||||
struct nand_page_io_req *req);
|
||||
int (*finish_io_req)(struct nand_device *nand,
|
||||
struct nand_page_io_req *req);
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_ecc_engine - ECC engine abstraction for NAND devices
|
||||
* @ops: ECC engine operations
|
||||
*/
|
||||
struct nand_ecc_engine {
|
||||
struct nand_ecc_engine_ops *ops;
|
||||
};
|
||||
|
||||
void of_get_nand_ecc_user_config(struct nand_device *nand);
|
||||
int nand_ecc_init_ctx(struct nand_device *nand);
|
||||
void nand_ecc_cleanup_ctx(struct nand_device *nand);
|
||||
int nand_ecc_prepare_io_req(struct nand_device *nand,
|
||||
struct nand_page_io_req *req);
|
||||
int nand_ecc_finish_io_req(struct nand_device *nand,
|
||||
struct nand_page_io_req *req);
|
||||
bool nand_ecc_is_strong_enough(struct nand_device *nand);
|
||||
|
||||
/**
|
||||
* struct nand_ecc - Information relative to the ECC
|
||||
* @defaults: Default values, depend on the underlying subsystem
|
||||
* @requirements: ECC requirements from the NAND chip perspective
|
||||
* @user_conf: User desires in terms of ECC parameters
|
||||
* @ctx: ECC context for the ECC engine, derived from the device @requirements
|
||||
* the @user_conf and the @defaults
|
||||
* @ondie_engine: On-die ECC engine reference, if any
|
||||
* @engine: ECC engine actually bound
|
||||
*/
|
||||
struct nand_ecc {
|
||||
struct nand_ecc_props defaults;
|
||||
struct nand_ecc_props requirements;
|
||||
struct nand_ecc_props user_conf;
|
||||
struct nand_ecc_context ctx;
|
||||
struct nand_ecc_engine *ondie_engine;
|
||||
struct nand_ecc_engine *engine;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct nand_device - NAND device
|
||||
* @mtd: MTD instance attached to the NAND device
|
||||
|
|
|
|||
Loading…
Reference in New Issue