spi: Document DT bindings for SPI controllers in slave mode
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -1,17 +1,23 @@
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SPI (Serial Peripheral Interface) busses
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SPI (Serial Peripheral Interface) busses
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SPI busses can be described with a node for the SPI master device
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SPI busses can be described with a node for the SPI controller device
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and a set of child nodes for each SPI slave on the bus. For this
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and a set of child nodes for each SPI slave on the bus. The system's SPI
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discussion, it is assumed that the system's SPI controller is in
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controller may be described for use in SPI master mode or in SPI slave mode,
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SPI master mode. This binding does not describe SPI controllers
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but not for both at the same time.
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in slave mode.
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The SPI master node requires the following properties:
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The SPI controller node requires the following properties:
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- compatible - Name of SPI bus controller following generic names
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recommended practice.
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In master mode, the SPI controller node requires the following additional
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properties:
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- #address-cells - number of cells required to define a chip select
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- #address-cells - number of cells required to define a chip select
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address on the SPI bus.
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address on the SPI bus.
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- #size-cells - should be zero.
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- #size-cells - should be zero.
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- compatible - name of SPI bus controller following generic names
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recommended practice.
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In slave mode, the SPI controller node requires one additional property:
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- spi-slave - Empty property.
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No other properties are required in the SPI bus node. It is assumed
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No other properties are required in the SPI bus node. It is assumed
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that a driver for an SPI bus device will understand that it is an SPI bus.
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that a driver for an SPI bus device will understand that it is an SPI bus.
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However, the binding does not attempt to define the specific method for
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However, the binding does not attempt to define the specific method for
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@ -21,7 +27,7 @@ assumption that board specific platform code will be used to manage
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chip selects. Individual drivers can define additional properties to
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chip selects. Individual drivers can define additional properties to
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support describing the chip select layout.
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support describing the chip select layout.
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Optional properties:
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Optional properties (master mode only):
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- cs-gpios - gpios chip select.
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- cs-gpios - gpios chip select.
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- num-cs - total number of chipselects.
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- num-cs - total number of chipselects.
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@ -41,28 +47,36 @@ cs1 : native
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cs2 : &gpio1 1 0
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cs2 : &gpio1 1 0
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cs3 : &gpio1 2 0
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cs3 : &gpio1 2 0
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SPI slave nodes must be children of the SPI master node and can
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contain the following properties.
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SPI slave nodes must be children of the SPI controller node.
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- reg - (required) chip select address of device.
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- compatible - (required) name of SPI device following generic names
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In master mode, one or more slave nodes (up to the number of chip selects) can
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recommended practice.
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be present. Required properties are:
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- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz.
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- compatible - Name of SPI device following generic names recommended
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- spi-cpol - (optional) Empty property indicating device requires
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practice.
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inverse clock polarity (CPOL) mode.
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- reg - Chip select address of device.
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- spi-cpha - (optional) Empty property indicating device requires
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- spi-max-frequency - Maximum SPI clocking speed of device in Hz.
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shifted clock phase (CPHA) mode.
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- spi-cs-high - (optional) Empty property indicating device requires
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In slave mode, the (single) slave node is optional.
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chip select active high.
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If present, it must be called "slave". Required properties are:
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- spi-3wire - (optional) Empty property indicating device requires
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- compatible - Name of SPI device following generic names recommended
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3-wire mode.
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practice.
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- spi-lsb-first - (optional) Empty property indicating device requires
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LSB first mode.
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All slave nodes can contain the following optional properties:
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- spi-tx-bus-width - (optional) The bus width (number of data wires) that is
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- spi-cpol - Empty property indicating device requires inverse clock
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used for MOSI. Defaults to 1 if not present.
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polarity (CPOL) mode.
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- spi-rx-bus-width - (optional) The bus width (number of data wires) that is
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- spi-cpha - Empty property indicating device requires shifted clock
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used for MISO. Defaults to 1 if not present.
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phase (CPHA) mode.
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- spi-rx-delay-us - (optional) Microsecond delay after a read transfer.
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- spi-cs-high - Empty property indicating device requires chip select
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- spi-tx-delay-us - (optional) Microsecond delay after a write transfer.
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active high.
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- spi-3wire - Empty property indicating device requires 3-wire mode.
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- spi-lsb-first - Empty property indicating device requires LSB first mode.
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- spi-tx-bus-width - The bus width (number of data wires) that is used for MOSI.
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Defaults to 1 if not present.
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- spi-rx-bus-width - The bus width (number of data wires) that is used for MISO.
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Defaults to 1 if not present.
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- spi-rx-delay-us - Microsecond delay after a read transfer.
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- spi-tx-delay-us - Microsecond delay after a write transfer.
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Some SPI controllers and devices support Dual and Quad SPI transfer mode.
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Some SPI controllers and devices support Dual and Quad SPI transfer mode.
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It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4
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It allows data in the SPI system to be transferred using 2 wires (DUAL) or 4
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