sound fixes for 4.4-rc7

This shouldn't be a nightmare before Christmas: just a handful
 small device-specific fixes for various ASoC and HD-audio drivers.
 Most of them are stable fixes.
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Merge tag 'sound-4.4-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound fixes from Takashi Iwai:
 "This shouldn't be a nightmare before Christmas: just a handful small
  device-specific fixes for various ASoC and HD-audio drivers.  Most of
  them are stable fixes"

* tag 'sound-4.4-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
  ALSA: hda/realtek - Fix silent headphone output on MacPro 4,1 (v2)
  ASoC: fsl_sai: fix no frame clk in master mode
  ALSA: hda - Set SKL+ hda controller power at freeze() and thaw()
  ASoC: sgtl5000: fix VAG power up timing
  ASoC: rockchip: spdif: Set transmit data level to 16 samples
  ASoC: wm8974: set cache type for regmap
  ASoC: es8328: Fix shifts for mixer switches
  ASoC: davinci-mcasp: Fix XDATA check in mcasp_start_tx
  ASoC: es8328: Fix deemphasis values
This commit is contained in:
Linus Torvalds 2015-12-23 10:28:39 -08:00
commit a88164345b
10 changed files with 88 additions and 15 deletions

View File

@ -954,6 +954,36 @@ static int azx_resume(struct device *dev)
} }
#endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */ #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
#ifdef CONFIG_PM_SLEEP
/* put codec down to D3 at hibernation for Intel SKL+;
* otherwise BIOS may still access the codec and screw up the driver
*/
#define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170)
#define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70)
#define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
#define IS_SKL_PLUS(pci) (IS_SKL(pci) || IS_SKL_LP(pci) || IS_BXT(pci))
static int azx_freeze_noirq(struct device *dev)
{
struct pci_dev *pci = to_pci_dev(dev);
if (IS_SKL_PLUS(pci))
pci_set_power_state(pci, PCI_D3hot);
return 0;
}
static int azx_thaw_noirq(struct device *dev)
{
struct pci_dev *pci = to_pci_dev(dev);
if (IS_SKL_PLUS(pci))
pci_set_power_state(pci, PCI_D0);
return 0;
}
#endif /* CONFIG_PM_SLEEP */
#ifdef CONFIG_PM #ifdef CONFIG_PM
static int azx_runtime_suspend(struct device *dev) static int azx_runtime_suspend(struct device *dev)
{ {
@ -1063,6 +1093,10 @@ static int azx_runtime_idle(struct device *dev)
static const struct dev_pm_ops azx_pm = { static const struct dev_pm_ops azx_pm = {
SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume) SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
#ifdef CONFIG_PM_SLEEP
.freeze_noirq = azx_freeze_noirq,
.thaw_noirq = azx_thaw_noirq,
#endif
SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle) SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
}; };

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@ -1775,6 +1775,7 @@ enum {
ALC889_FIXUP_MBA11_VREF, ALC889_FIXUP_MBA11_VREF,
ALC889_FIXUP_MBA21_VREF, ALC889_FIXUP_MBA21_VREF,
ALC889_FIXUP_MP11_VREF, ALC889_FIXUP_MP11_VREF,
ALC889_FIXUP_MP41_VREF,
ALC882_FIXUP_INV_DMIC, ALC882_FIXUP_INV_DMIC,
ALC882_FIXUP_NO_PRIMARY_HP, ALC882_FIXUP_NO_PRIMARY_HP,
ALC887_FIXUP_ASUS_BASS, ALC887_FIXUP_ASUS_BASS,
@ -1863,7 +1864,7 @@ static void alc889_fixup_mbp_vref(struct hda_codec *codec,
const struct hda_fixup *fix, int action) const struct hda_fixup *fix, int action)
{ {
struct alc_spec *spec = codec->spec; struct alc_spec *spec = codec->spec;
static hda_nid_t nids[2] = { 0x14, 0x15 }; static hda_nid_t nids[3] = { 0x14, 0x15, 0x19 };
int i; int i;
if (action != HDA_FIXUP_ACT_INIT) if (action != HDA_FIXUP_ACT_INIT)
@ -2153,6 +2154,12 @@ static const struct hda_fixup alc882_fixups[] = {
.chained = true, .chained = true,
.chain_id = ALC885_FIXUP_MACPRO_GPIO, .chain_id = ALC885_FIXUP_MACPRO_GPIO,
}, },
[ALC889_FIXUP_MP41_VREF] = {
.type = HDA_FIXUP_FUNC,
.v.func = alc889_fixup_mbp_vref,
.chained = true,
.chain_id = ALC885_FIXUP_MACPRO_GPIO,
},
[ALC882_FIXUP_INV_DMIC] = { [ALC882_FIXUP_INV_DMIC] = {
.type = HDA_FIXUP_FUNC, .type = HDA_FIXUP_FUNC,
.v.func = alc_fixup_inv_dmic, .v.func = alc_fixup_inv_dmic,
@ -2235,7 +2242,7 @@ static const struct snd_pci_quirk alc882_fixup_tbl[] = {
SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x3f00, "Macbook 5,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4000, "MacbookPro 5,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4100, "Macmini 3,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 5,1", ALC885_FIXUP_MACPRO_GPIO), SND_PCI_QUIRK(0x106b, 0x4200, "Mac Pro 4,1/5,1", ALC889_FIXUP_MP41_VREF),
SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4300, "iMac 9,1", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4600, "MacbookPro 5,2", ALC889_FIXUP_IMAC91_VREF),
SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF), SND_PCI_QUIRK(0x106b, 0x4900, "iMac 9,1 Aluminum", ALC889_FIXUP_IMAC91_VREF),

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@ -85,7 +85,15 @@ static const DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0);
static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 300, 0); static const DECLARE_TLV_DB_SCALE(mic_tlv, 0, 300, 0);
static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; static const struct {
int rate;
unsigned int val;
} deemph_settings[] = {
{ 0, ES8328_DACCONTROL6_DEEMPH_OFF },
{ 32000, ES8328_DACCONTROL6_DEEMPH_32k },
{ 44100, ES8328_DACCONTROL6_DEEMPH_44_1k },
{ 48000, ES8328_DACCONTROL6_DEEMPH_48k },
};
static int es8328_set_deemph(struct snd_soc_codec *codec) static int es8328_set_deemph(struct snd_soc_codec *codec)
{ {
@ -97,21 +105,22 @@ static int es8328_set_deemph(struct snd_soc_codec *codec)
* rate. * rate.
*/ */
if (es8328->deemph) { if (es8328->deemph) {
best = 1; best = 0;
for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { for (i = 1; i < ARRAY_SIZE(deemph_settings); i++) {
if (abs(deemph_settings[i] - es8328->playback_fs) < if (abs(deemph_settings[i].rate - es8328->playback_fs) <
abs(deemph_settings[best] - es8328->playback_fs)) abs(deemph_settings[best].rate - es8328->playback_fs))
best = i; best = i;
} }
val = best << 1; val = deemph_settings[best].val;
} else { } else {
val = 0; val = ES8328_DACCONTROL6_DEEMPH_OFF;
} }
dev_dbg(codec->dev, "Set deemphasis %d\n", val); dev_dbg(codec->dev, "Set deemphasis %d\n", val);
return snd_soc_update_bits(codec, ES8328_DACCONTROL6, 0x6, val); return snd_soc_update_bits(codec, ES8328_DACCONTROL6,
ES8328_DACCONTROL6_DEEMPH_MASK, val);
} }
static int es8328_get_deemph(struct snd_kcontrol *kcontrol, static int es8328_get_deemph(struct snd_kcontrol *kcontrol,

View File

@ -153,6 +153,7 @@ int es8328_probe(struct device *dev, struct regmap *regmap);
#define ES8328_DACCONTROL6_CLICKFREE (1 << 3) #define ES8328_DACCONTROL6_CLICKFREE (1 << 3)
#define ES8328_DACCONTROL6_DAC_INVR (1 << 4) #define ES8328_DACCONTROL6_DAC_INVR (1 << 4)
#define ES8328_DACCONTROL6_DAC_INVL (1 << 5) #define ES8328_DACCONTROL6_DAC_INVL (1 << 5)
#define ES8328_DACCONTROL6_DEEMPH_MASK (3 << 6)
#define ES8328_DACCONTROL6_DEEMPH_OFF (0 << 6) #define ES8328_DACCONTROL6_DEEMPH_OFF (0 << 6)
#define ES8328_DACCONTROL6_DEEMPH_32k (1 << 6) #define ES8328_DACCONTROL6_DEEMPH_32k (1 << 6)
#define ES8328_DACCONTROL6_DEEMPH_44_1k (2 << 6) #define ES8328_DACCONTROL6_DEEMPH_44_1k (2 << 6)

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@ -189,6 +189,7 @@ static int power_vag_event(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMU: case SND_SOC_DAPM_POST_PMU:
snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER, snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP); SGTL5000_VAG_POWERUP, SGTL5000_VAG_POWERUP);
msleep(400);
break; break;
case SND_SOC_DAPM_PRE_PMD: case SND_SOC_DAPM_PRE_PMD:

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@ -574,6 +574,7 @@ static const struct regmap_config wm8974_regmap = {
.max_register = WM8974_MONOMIX, .max_register = WM8974_MONOMIX,
.reg_defaults = wm8974_reg_defaults, .reg_defaults = wm8974_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults), .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
.cache_type = REGCACHE_FLAT,
}; };
static int wm8974_probe(struct snd_soc_codec *codec) static int wm8974_probe(struct snd_soc_codec *codec)

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@ -223,8 +223,8 @@ static void mcasp_start_tx(struct davinci_mcasp *mcasp)
/* wait for XDATA to be cleared */ /* wait for XDATA to be cleared */
cnt = 0; cnt = 0;
while (!(mcasp_get_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG) & while ((mcasp_get_reg(mcasp, DAVINCI_MCASP_TXSTAT_REG) & XRDATA) &&
~XRDATA) && (cnt < 100000)) (cnt < 100000))
cnt++; cnt++;
/* Release TX state machine */ /* Release TX state machine */

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@ -505,6 +505,24 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd,
FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); FSL_SAI_CSR_FR, FSL_SAI_CSR_FR);
regmap_update_bits(sai->regmap, FSL_SAI_RCSR, regmap_update_bits(sai->regmap, FSL_SAI_RCSR,
FSL_SAI_CSR_FR, FSL_SAI_CSR_FR); FSL_SAI_CSR_FR, FSL_SAI_CSR_FR);
/*
* For sai master mode, after several open/close sai,
* there will be no frame clock, and can't recover
* anymore. Add software reset to fix this issue.
* This is a hardware bug, and will be fix in the
* next sai version.
*/
if (!sai->is_slave_mode) {
/* Software Reset for both Tx and Rx */
regmap_write(sai->regmap,
FSL_SAI_TCSR, FSL_SAI_CSR_SR);
regmap_write(sai->regmap,
FSL_SAI_RCSR, FSL_SAI_CSR_SR);
/* Clear SR bit to finish the reset */
regmap_write(sai->regmap, FSL_SAI_TCSR, 0);
regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
}
} }
break; break;
default: default:

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@ -152,8 +152,10 @@ static int rk_spdif_trigger(struct snd_pcm_substream *substream,
case SNDRV_PCM_TRIGGER_RESUME: case SNDRV_PCM_TRIGGER_RESUME:
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR, ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
SPDIF_DMACR_TDE_ENABLE, SPDIF_DMACR_TDE_ENABLE |
SPDIF_DMACR_TDE_ENABLE); SPDIF_DMACR_TDL_MASK,
SPDIF_DMACR_TDE_ENABLE |
SPDIF_DMACR_TDL(16));
if (ret != 0) if (ret != 0)
return ret; return ret;

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@ -42,7 +42,7 @@
#define SPDIF_DMACR_TDL_SHIFT 0 #define SPDIF_DMACR_TDL_SHIFT 0
#define SPDIF_DMACR_TDL(x) ((x) << SPDIF_DMACR_TDL_SHIFT) #define SPDIF_DMACR_TDL(x) ((x) << SPDIF_DMACR_TDL_SHIFT)
#define SPDIF_DMACR_TDL_MASK (0x1f << SDPIF_DMACR_TDL_SHIFT) #define SPDIF_DMACR_TDL_MASK (0x1f << SPDIF_DMACR_TDL_SHIFT)
/* /*
* XFER * XFER