m68knommu: switch ColdFire TIMER to use GENERIC_TIME
Switch the ColdFire TIMER timer to use GENERIC_TIME. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -3,7 +3,7 @@
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/*
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* timers.c -- generic ColdFire hardware timer support.
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*
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* Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
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* Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
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*/
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/***************************************************************************/
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@ -13,6 +13,8 @@
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#include <linux/sched.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/profile.h>
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#include <linux/clocksource.h>
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#include <asm/io.h>
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#include <asm/traps.h>
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#include <asm/machdep.h>
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@ -25,6 +27,7 @@
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/*
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* By default use timer1 as the system clock timer.
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*/
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#define FREQ (MCF_BUSCLK / 16)
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#define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a))
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/*
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@ -41,7 +44,7 @@ unsigned int mcf_timerlevel = 5;
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* Unfortunately it is a little different on each ColdFire.
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*/
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extern void mcf_settimericr(int timer, int level);
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extern int mcf_timerirqpending(int timer);
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void coldfire_profile_init(void);
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#if defined(CONFIG_M532x)
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#define __raw_readtrr __raw_readl
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@ -51,38 +54,70 @@ extern int mcf_timerirqpending(int timer);
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#define __raw_writetrr __raw_writew
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#endif
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static u32 mcftmr_cycles_per_jiffy;
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static u32 mcftmr_cnt;
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/***************************************************************************/
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static irqreturn_t hw_tick(int irq, void *dummy)
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static irqreturn_t mcftmr_tick(int irq, void *dummy)
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{
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/* Reset the ColdFire timer */
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__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
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mcftmr_cnt += mcftmr_cycles_per_jiffy;
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return arch_timer_interrupt(irq, dummy);
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}
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/***************************************************************************/
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static struct irqaction coldfire_timer_irq = {
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static struct irqaction mcftmr_timer_irq = {
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.name = "timer",
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.flags = IRQF_DISABLED | IRQF_TIMER,
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.handler = hw_tick,
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.handler = mcftmr_tick,
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};
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/***************************************************************************/
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static int ticks_per_intr;
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static cycle_t mcftmr_read_clk(void)
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{
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unsigned long flags;
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u32 cycles;
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u16 tcn;
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local_irq_save(flags);
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tcn = __raw_readw(TA(MCFTIMER_TCN));
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cycles = mcftmr_cnt;
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local_irq_restore(flags);
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return cycles + tcn;
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}
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/***************************************************************************/
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static struct clocksource mcftmr_clk = {
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.name = "tmr",
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.rating = 250,
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.read = mcftmr_read_clk,
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.shift = 20,
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.mask = CLOCKSOURCE_MASK(32),
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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/***************************************************************************/
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void hw_timer_init(void)
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{
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setup_irq(mcf_timervector, &coldfire_timer_irq);
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setup_irq(mcf_timervector, &mcftmr_timer_irq);
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__raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
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ticks_per_intr = (MCF_BUSCLK / 16) / HZ;
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__raw_writetrr(ticks_per_intr - 1, TA(MCFTIMER_TRR));
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mcftmr_cycles_per_jiffy = FREQ / HZ;
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__raw_writetrr(mcftmr_cycles_per_jiffy, TA(MCFTIMER_TRR));
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__raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
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MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
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mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
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clocksource_register(&mcftmr_clk);
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mcf_settimericr(1, mcf_timerlevel);
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#ifdef CONFIG_HIGHPROFILE
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@ -90,21 +125,6 @@ void hw_timer_init(void)
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#endif
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}
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/***************************************************************************/
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unsigned long hw_timer_offset(void)
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{
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unsigned long tcn, offset;
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tcn = __raw_readw(TA(MCFTIMER_TCN));
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offset = ((tcn + 1) * (1000000 / HZ)) / ticks_per_intr;
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/* Check if we just wrapped the counters and maybe missed a tick */
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if ((offset < (1000000 / HZ / 2)) && mcf_timerirqpending(1))
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offset += 1000000 / HZ;
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return offset;
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}
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/***************************************************************************/
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#ifdef CONFIG_HIGHPROFILE
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/***************************************************************************/
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