PCI: vmd: White list for fast interrupt handlers
Devices with slow interrupt handlers are significantly harming performance when their interrupt vector is shared with a fast device. Create a class code white list for devices with known fast interrupt handlers and let all other devices share a single vector so that they don't interfere with performance. At the moment, only the NVM Express class code is on the list, but more may be added if VMD users desire to use other low-latency devices in these domains. Signed-off-by: Keith Busch <keith.busch@intel.com> [lorenzo.pieralisi@arm.com: changelog] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Jon Derrick: <jonathan.derrick@intel.com>
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@ -197,9 +197,20 @@ static struct vmd_irq_list *vmd_next_irq(struct vmd_dev *vmd, struct msi_desc *d
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int i, best = 1;
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unsigned long flags;
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if (pci_is_bridge(msi_desc_to_pci_dev(desc)) || vmd->msix_count == 1)
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if (vmd->msix_count == 1)
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return &vmd->irqs[0];
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/*
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* White list for fast-interrupt handlers. All others will share the
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* "slow" interrupt vector.
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*/
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switch (msi_desc_to_pci_dev(desc)->class) {
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case PCI_CLASS_STORAGE_EXPRESS:
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break;
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default:
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return &vmd->irqs[0];
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}
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raw_spin_lock_irqsave(&list_lock, flags);
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for (i = 1; i < vmd->msix_count; i++)
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if (vmd->irqs[i].count < vmd->irqs[best].count)
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