[ARM] 3140/1: NSLU2 machine support
Patch from Alessandro Zummo This patch adds support for the LinkSys NSLU2 running with both big and little-endian kernels. The LinkSys NSLU2 is a cost engineered ARM, XScale 420 based system similar to the the Intel IXDP425 evaluation board. It uses the IXP4XX ARCH. While this patch applies independently of other patches the resultant kernel requires further patches to successfully use onboard devices, including the onboard flash. Since these patches are independent of this one they will be submitted separately. A defconfig is not included here because not all of the required drivers are actually in the kernel. We intend to provide one as soon as the patches will be incorporated in mainstream. This patch is the combined work of nslu2-linux.org Signed-off-by: John Bowler <jbowler@acm.org> Signed-off-by: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Alessandro Zummo
Russell King
parent
af36bef0c5
commit
a7918f39bb
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@ -8,6 +8,16 @@ menu "Intel IXP4xx Implementation Options"
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comment "IXP4xx Platforms"
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# This entry is placed on top because otherwise it would have
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# been shown as a submenu.
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config MACH_NSLU2
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bool
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prompt "NSLU2" if !(MACH_IXDP465 || MACH_IXDPG425 || ARCH_IXDP425 || ARCH_ADI_COYOTE || ARCH_AVILA || ARCH_IXCDP1100 || ARCH_PRPMC1100 || MACH_GTWX5715)
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help
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Say 'Y' here if you want your kernel to support Linksys's
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NSLU2 NAS device. For more information on this platform,
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see http://www.nslu2-linux.org
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config ARCH_AVILA
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bool "Avila"
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help
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@ -8,4 +8,5 @@ obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o ixdp425-setup.o
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obj-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o coyote-setup.o
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obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o coyote-setup.o
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obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o gtwx5715-setup.o
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obj-$(CONFIG_MACH_NSLU2) += nslu2-pci.o nslu2-setup.o nslu2-power.o
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@ -0,0 +1,77 @@
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/*
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* arch/arm/mach-ixp4xx/nslu2-pci.c
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*
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* NSLU2 board-level PCI initialization
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*
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* based on ixdp425-pci.c:
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* Copyright (C) 2002 Intel Corporation.
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Maintainer: http://www.nslu2-linux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/config.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <asm/mach/pci.h>
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#include <asm/mach-types.h>
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void __init nslu2_pci_preinit(void)
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{
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set_irq_type(IRQ_NSLU2_PCI_INTA, IRQT_LOW);
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set_irq_type(IRQ_NSLU2_PCI_INTB, IRQT_LOW);
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set_irq_type(IRQ_NSLU2_PCI_INTC, IRQT_LOW);
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gpio_line_isr_clear(NSLU2_PCI_INTA_PIN);
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gpio_line_isr_clear(NSLU2_PCI_INTB_PIN);
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gpio_line_isr_clear(NSLU2_PCI_INTC_PIN);
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/* INTD is not configured as GPIO is used
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* for the power input button.
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*/
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ixp4xx_pci_preinit();
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}
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static int __init nslu2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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static int pci_irq_table[NSLU2_PCI_IRQ_LINES] = {
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IRQ_NSLU2_PCI_INTA,
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IRQ_NSLU2_PCI_INTB,
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IRQ_NSLU2_PCI_INTC,
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};
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int irq = -1;
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if (slot >= 1 && slot <= NSLU2_PCI_MAX_DEV &&
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pin >= 1 && pin <= NSLU2_PCI_IRQ_LINES) {
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irq = pci_irq_table[(slot + pin - 2) % NSLU2_PCI_IRQ_LINES];
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}
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return irq;
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}
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struct hw_pci __initdata nslu2_pci = {
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.nr_controllers = 1,
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.preinit = nslu2_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = nslu2_map_irq,
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};
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int __init nslu2_pci_init(void) /* monkey see, monkey do */
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{
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if (machine_is_nslu2())
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pci_common_init(&nslu2_pci);
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return 0;
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}
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subsys_initcall(nslu2_pci_init);
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@ -0,0 +1,92 @@
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/*
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* arch/arm/mach-ixp4xx/nslu2-power.c
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*
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* NSLU2 Power/Reset driver
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*
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* Copyright (C) 2005 Tower Technologies
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*
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* based on nslu2-io.c
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* Copyright (C) 2004 Karen Spearel
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*
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* Author: Alessandro Zummo <a.zummo@towertech.it>
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* Maintainers: http://www.nslu2-linux.org/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/module.h>
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#include <linux/reboot.h>
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#include <linux/interrupt.h>
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#include <asm/mach-types.h>
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extern void ctrl_alt_del(void);
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static irqreturn_t nslu2_power_handler(int irq, void *dev_id, struct pt_regs *regs)
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{
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/* Signal init to do the ctrlaltdel action, this will bypass init if
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* it hasn't started and do a kernel_restart.
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*/
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ctrl_alt_del();
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return IRQ_HANDLED;
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}
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static irqreturn_t nslu2_reset_handler(int irq, void *dev_id, struct pt_regs *regs)
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{
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/* This is the paper-clip reset, it shuts the machine down directly.
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*/
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machine_power_off();
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return IRQ_HANDLED;
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}
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static int __init nslu2_power_init(void)
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{
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if (!(machine_is_nslu2()))
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return 0;
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*IXP4XX_GPIO_GPISR = 0x20400000; /* read the 2 irqs to clr */
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set_irq_type(NSLU2_RB_IRQ, IRQT_LOW);
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set_irq_type(NSLU2_PB_IRQ, IRQT_HIGH);
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gpio_line_isr_clear(NSLU2_RB_GPIO);
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gpio_line_isr_clear(NSLU2_PB_GPIO);
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if (request_irq(NSLU2_RB_IRQ, &nslu2_reset_handler,
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SA_INTERRUPT, "NSLU2 reset button", NULL) < 0) {
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printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
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NSLU2_RB_IRQ);
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return -EIO;
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}
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if (request_irq(NSLU2_PB_IRQ, &nslu2_power_handler,
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SA_INTERRUPT, "NSLU2 power button", NULL) < 0) {
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printk(KERN_DEBUG "Power Button IRQ %d not available\n",
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NSLU2_PB_IRQ);
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return -EIO;
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}
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return 0;
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}
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static void __exit nslu2_power_exit(void)
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{
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free_irq(NSLU2_RB_IRQ, NULL);
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free_irq(NSLU2_PB_IRQ, NULL);
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}
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module_init(nslu2_power_init);
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module_exit(nslu2_power_exit);
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MODULE_AUTHOR("Alessandro Zummo <a.zummo@towertech.it>");
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MODULE_DESCRIPTION("NSLU2 Power/Reset driver");
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MODULE_LICENSE("GPL");
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@ -0,0 +1,134 @@
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/*
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* arch/arm/mach-ixp4xx/nslu2-setup.c
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*
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* NSLU2 board-setup
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*
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* based ixdp425-setup.c:
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* Copyright (C) 2003-2004 MontaVista Software, Inc.
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*
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* Author: Mark Rakes <mrakes at mac.com>
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* Maintainers: http://www.nslu2-linux.org/
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*
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* Fixed missing init_time in MACHINE_START kas11 10/22/04
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* Changed to conform to new style __init ixdp425 kas11 10/22/04
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*/
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#include <linux/kernel.h>
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#include <linux/serial.h>
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#include <linux/serial_8250.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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static struct flash_platform_data nslu2_flash_data = {
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.map_name = "cfi_probe",
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.width = 2,
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};
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static struct resource nslu2_flash_resource = {
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.start = NSLU2_FLASH_BASE,
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.end = NSLU2_FLASH_BASE + NSLU2_FLASH_SIZE,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nslu2_flash = {
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.name = "IXP4XX-Flash",
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.id = 0,
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.dev.platform_data = &nslu2_flash_data,
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.num_resources = 1,
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.resource = &nslu2_flash_resource,
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};
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static struct ixp4xx_i2c_pins nslu2_i2c_gpio_pins = {
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.sda_pin = NSLU2_SDA_PIN,
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.scl_pin = NSLU2_SCL_PIN,
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};
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static struct platform_device nslu2_i2c_controller = {
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.name = "IXP4XX-I2C",
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.id = 0,
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.dev.platform_data = &nslu2_i2c_gpio_pins,
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.num_resources = 0,
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};
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static struct resource nslu2_uart_resources[] = {
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{
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.start = IXP4XX_UART1_BASE_PHYS,
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.end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = IXP4XX_UART2_BASE_PHYS,
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.end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
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.flags = IORESOURCE_MEM,
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}
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};
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static struct plat_serial8250_port nslu2_uart_data[] = {
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{
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.mapbase = IXP4XX_UART1_BASE_PHYS,
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.membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART1,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{
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.mapbase = IXP4XX_UART2_BASE_PHYS,
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.membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
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.irq = IRQ_IXP4XX_UART2,
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.flags = UPF_BOOT_AUTOCONF,
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.iotype = UPIO_MEM,
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.regshift = 2,
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.uartclk = IXP4XX_UART_XTAL,
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},
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{ }
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};
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static struct platform_device nslu2_uart = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev.platform_data = nslu2_uart_data,
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.num_resources = 2,
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.resource = nslu2_uart_resources,
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};
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static struct platform_device *nslu2_devices[] __initdata = {
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&nslu2_i2c_controller,
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&nslu2_flash,
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&nslu2_uart,
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};
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static void nslu2_power_off(void)
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{
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/* This causes the box to drop the power and go dead. */
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/* enable the pwr cntl gpio */
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gpio_line_config(NSLU2_PO_GPIO, IXP4XX_GPIO_OUT);
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/* do the deed */
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gpio_line_set(NSLU2_PO_GPIO, IXP4XX_GPIO_HIGH);
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}
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static void __init nslu2_init(void)
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{
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ixp4xx_sys_init();
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pm_power_off = nslu2_power_off;
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platform_add_devices(nslu2_devices, ARRAY_SIZE(nslu2_devices));
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}
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MACHINE_START(NSLU2, "Linksys NSLU2")
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/* Maintainer: www.nslu2-linux.org */
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.phys_ram = PHYS_OFFSET,
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.phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
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.io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xFFFC,
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.boot_params = 0x00000100,
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.map_io = ixp4xx_map_io,
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.init_irq = ixp4xx_init_irq,
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.timer = &ixp4xx_timer,
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.init_machine = nslu2_init,
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MACHINE_END
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@ -44,5 +44,6 @@ extern unsigned int processor_id;
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#include "ixdp425.h"
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#include "coyote.h"
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#include "prpmc1100.h"
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#include "nslu2.h"
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#endif /* _ASM_ARCH_HARDWARE_H */
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@ -93,4 +93,11 @@
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#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11
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#define IRQ_COYOTE_IDE IRQ_IXP4XX_GPIO5
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/*
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* NSLU2 board IRQs
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*/
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#define IRQ_NSLU2_PCI_INTA IRQ_IXP4XX_GPIO11
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#define IRQ_NSLU2_PCI_INTB IRQ_IXP4XX_GPIO10
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#define IRQ_NSLU2_PCI_INTC IRQ_IXP4XX_GPIO9
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#endif
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@ -0,0 +1,96 @@
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/*
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* include/asm-arm/arch-ixp4xx/nslu2.h
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*
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* NSLU2 platform specific definitions
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*
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* Author: Mark Rakes <mrakes AT mac.com>
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* Maintainers: http://www.nslu2-linux.org
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*
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* based on ixdp425.h:
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* Copyright 2004 (c) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#define NSLU2_FLASH_BASE IXP4XX_EXP_BUS_CS0_BASE_PHYS
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#define NSLU2_FLASH_SIZE IXP4XX_EXP_BUS_CSX_REGION_SIZE
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#define NSLU2_SDA_PIN 7
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#define NSLU2_SCL_PIN 6
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/*
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* NSLU2 PCI IRQs
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*/
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#define NSLU2_PCI_MAX_DEV 3
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#define NSLU2_PCI_IRQ_LINES 3
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/* PCI controller GPIO to IRQ pin mappings */
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#define NSLU2_PCI_INTA_PIN 11
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#define NSLU2_PCI_INTB_PIN 10
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#define NSLU2_PCI_INTC_PIN 9
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#define NSLU2_PCI_INTD_PIN 8
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/* NSLU2 Timer */
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#define NSLU2_FREQ 66000000
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#define NSLU2_CLOCK_TICK_RATE (((NSLU2_FREQ / HZ & ~IXP4XX_OST_RELOAD_MASK) + 1) * HZ)
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#define NSLU2_CLOCK_TICKS_PER_USEC ((NSLU2_CLOCK_TICK_RATE + USEC_PER_SEC/2) / USEC_PER_SEC)
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/* GPIO */
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#define NSLU2_GPIO0 0
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#define NSLU2_GPIO1 1
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#define NSLU2_GPIO2 2
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#define NSLU2_GPIO3 3
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#define NSLU2_GPIO4 4
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#define NSLU2_GPIO5 5
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#define NSLU2_GPIO6 6
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#define NSLU2_GPIO7 7
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#define NSLU2_GPIO8 8
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#define NSLU2_GPIO9 9
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#define NSLU2_GPIO10 10
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#define NSLU2_GPIO11 11
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#define NSLU2_GPIO12 12
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#define NSLU2_GPIO13 13
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#define NSLU2_GPIO14 14
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#define NSLU2_GPIO15 15
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/* Buttons */
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#define NSLU2_PB_GPIO NSLU2_GPIO5
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#define NSLU2_PO_GPIO NSLU2_GPIO8 /* power off */
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#define NSLU2_RB_GPIO NSLU2_GPIO12
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#define NSLU2_PB_IRQ IRQ_IXP4XX_GPIO5
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#define NSLU2_RB_IRQ IRQ_IXP4XX_GPIO12
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#define NSLU2_PB_BM (1L << NSLU2_PB_GPIO)
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#define NSLU2_PO_BM (1L << NSLU2_PO_GPIO)
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#define NSLU2_RB_BM (1L << NSLU2_RB_GPIO)
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/* Buzzer */
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#define NSLU2_GPIO_BUZZ 4
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#define NSLU2_BZ_BM (1L << NSLU2_GPIO_BUZZ)
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/* LEDs */
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#define NSLU2_LED_RED NSLU2_GPIO0
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#define NSLU2_LED_GRN NSLU2_GPIO1
|
||||
|
||||
#define NSLU2_LED_RED_BM (1L << NSLU2_LED_RED)
|
||||
#define NSLU2_LED_GRN_BM (1L << NSLU2_LED_GRN)
|
||||
|
||||
#define NSLU2_LED_DISK1 NSLU2_GPIO2
|
||||
#define NSLU2_LED_DISK2 NSLU2_GPIO3
|
||||
|
||||
#define NSLU2_LED_DISK1_BM (1L << NSLU2_GPIO2)
|
||||
#define NSLU2_LED_DISK2_BM (1L << NSLU2_GPIO3)
|
||||
|
||||
|
||||
Loading…
Reference in New Issue