hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Fixes for omap variants against v4.19-rc1 

These are mostly fixes related to using ti-sysc interconnect target module
 driver for accessing right register offsets for sgx and cpsw and for
 no_console_suspend regression.
 
 There is also a droid4 emmc fix where emmc may not get detected for some
 models, and vibrator dts mismerge fix.
 
 And we have a file permission fix for am335x-osd3358-sm-red.dts that
 just got added. And we must tag RTC as system-power-controller for
 am437x for PMIC to shut down during poweroff.
 -----BEGIN PGP SIGNATURE-----
 
 iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAluHD+IRHHRvbnlAYXRv
 bWlkZS5jb20ACgkQG9Q+yVyrpXPolQ//Zj4/pBU5caVIerXtiVDEY492CNhNnMpZ
 JtxJkBHeSs9yAtQOgVgdNkn/zazM3xZfAxrZIZjXzJJqtuK0bC1mmy4PxJCxQzG5
 ndccxU27MVR4tN1BE5gdD2t4mzn4N1Sos4f5Itl3bS7T0G1x/hvEjb3G0b/c5EQ/
 2QureLTCZUQcUHy/0tD6G6EoXBTj4IM9QDOCMpfCREIYC4r8ChT02H+xC9MNUY5s
 Y1F76NrjYi9oOSFI9sqYSEaqBYpG1WPVeQ0pAoN0x6nuyPgpif4+LkLqdkY/mIu0
 GN8NeHdJmXwax0i172fmhjhnWnkYl2KjjoonE3anqoIpXIALp3WvhMITJdiNjnTX
 0fxAhVLgRd8i1/bezBNAnCAlILAHr/MR5DFbUVMIT5113axbUg6+CTWb/89Z6PMo
 GThDngYVxpHBsxWUC2vKc8YhRqwfQCO5nolbcdQVDnktKIY51EFE8J1MEWibZ2O4
 K4jyN3Bl0eOBrie0ZQ7azF7wBCq7xObVMuRcHkVIH+y2aurC5GgOGQ3SwEX/7Ro3
 XCVZWFtFsha6TIABzam7CN7/1xL+RUIHM+umjJgLHS8q2OVXguBv+xtQOnVfQgyB
 C96GqPhch6SC9y7guxSenknO/e5cQ1bHhXV+uA11LMQWaEyEgRzlfm+4MyYClXEa
 tuM4mUcbY/A=
 =CHc2
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v4.19/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into fixes

Fixes for omap variants against v4.19-rc1

These are mostly fixes related to using ti-sysc interconnect target module
driver for accessing right register offsets for sgx and cpsw and for
no_console_suspend regression.

There is also a droid4 emmc fix where emmc may not get detected for some
models, and vibrator dts mismerge fix.

And we have a file permission fix for am335x-osd3358-sm-red.dts that
just got added. And we must tag RTC as system-power-controller for
am437x for PMIC to shut down during poweroff.

* tag 'omap-for-v4.19/fixes-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: dts: omap4-droid4: Fix emmc errors seen on some devices
  ARM: dts: Fix file permission for am335x-osd3358-sm-red.dts
  arm: dts: am4372: setup rtc as system-power-controller
  ARM: dts: omap4-droid4: fix vibrations on Droid 4
  bus: ti-sysc: Fix no_console_suspend handling
  bus: ti-sysc: Fix module register ioremap for larger offsets
  ARM: OMAP2+: Fix module address for modules using mpu_rt_idx
  ARM: OMAP2+: Fix null hwmod for ti-sysc debug

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-09-01 18:22:19 -07:00
parent 67e6ddb5be 2d59bb6023
commit a72b44a871
5 changed files with 65 additions and 30 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

0
arch/arm/boot/dts/am335x-osd3358-sm-red.dts Executable file → Normal file
View File

1
arch/arm/boot/dts/am4372.dtsi
View File

@ -469,6 +469,7 @@
ti,hwmods = "rtc";
clocks = <&clk_32768_ck>;
clock-names = "int-clk";
system-power-controller;
status = "disabled";
};

20
arch/arm/boot/dts/omap4-droid4-xt894.dts
View File

@ -354,7 +354,7 @@
&mmc2 {
vmmc-supply = <&vsdio>;
bus-width = <8>;
non-removable;
ti,non-removable;
};
&mmc3 {
@ -621,15 +621,6 @@
OMAP4_IOPAD(0x10c, PIN_INPUT | MUX_MODE1) /* abe_mcbsp3_fsx */
>;
};
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
vibrator_direction_pin: pinmux_vibrator_direction_pin {
pinctrl-single,pins = <
@ -644,6 +635,15 @@
};
};
&omap4_pmx_wkup {
usb_gpio_mux_sel2: pinmux_usb_gpio_mux_sel2_pins {
/* gpio_wk0 */
pinctrl-single,pins = <
OMAP4_IOPAD(0x040, PIN_OUTPUT_PULLDOWN | MUX_MODE3)
>;
};
};
/*
* As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
* uart1 wakeirq.

39
arch/arm/mach-omap2/omap_hwmod.c
View File

@ -2160,6 +2160,37 @@ static int of_dev_hwmod_lookup(struct device_node *np,
return -ENODEV;
}
/**
* omap_hwmod_fix_mpu_rt_idx - fix up mpu_rt_idx register offsets
*
* @oh: struct omap_hwmod *
* @np: struct device_node *
*
* Fix up module register offsets for modules with mpu_rt_idx.
* Only needed for cpsw with interconnect target module defined
* in device tree while still using legacy hwmod platform data
* for rev, sysc and syss registers.
*
* Can be removed when all cpsw hwmod platform data has been
* dropped.
*/
static void omap_hwmod_fix_mpu_rt_idx(struct omap_hwmod *oh,
struct device_node *np,
struct resource *res)
{
struct device_node *child = NULL;
int error;
child = of_get_next_child(np, child);
if (!child)
return;
error = of_address_to_resource(child, oh->mpu_rt_idx, res);
if (error)
pr_err("%s: error mapping mpu_rt_idx: %i\n",
__func__, error);
}
/**
* omap_hwmod_parse_module_range - map module IO range from device tree
* @oh: struct omap_hwmod *
@ -2220,7 +2251,13 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
size = be32_to_cpup(ranges);
pr_debug("omap_hwmod: %s %s at 0x%llx size 0x%llx\n",
oh->name, np->name, base, size);
oh ? oh->name : "", np->name, base, size);
if (oh && oh->mpu_rt_idx) {
omap_hwmod_fix_mpu_rt_idx(oh, np, res);
return 0;
}
res->start = base;
res->end = base + size - 1;

35
drivers/bus/ti-sysc.c
View File

@ -498,32 +498,29 @@ static int sysc_check_registers(struct sysc *ddata)
/**
* syc_ioremap - ioremap register space for the interconnect target module
* @ddata: deviec driver data
* @ddata: device driver data
*
* Note that the interconnect target module registers can be anywhere
* within the first child device address space. For example, SGX has
* them at offset 0x1fc00 in the 32MB module address space. We just
* what we need around the interconnect target module registers.
* within the interconnect target module range. For example, SGX has
* them at offset 0x1fc00 in the 32MB module address space. And cpsw
* has them at offset 0x1200 in the CPSW_WR child. Usually the
* the interconnect target module registers are at the beginning of
* the module range though.
*/
static int sysc_ioremap(struct sysc *ddata)
{
u32 size = 0;
int size;
if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
size = ddata->offsets[SYSC_SYSSTATUS];
else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
size = ddata->offsets[SYSC_SYSCONFIG];
else if (ddata->offsets[SYSC_REVISION] >= 0)
size = ddata->offsets[SYSC_REVISION];
else
size = max3(ddata->offsets[SYSC_REVISION],
ddata->offsets[SYSC_SYSCONFIG],
ddata->offsets[SYSC_SYSSTATUS]);
if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
return -EINVAL;
size &= 0xfff00;
size += SZ_256;
ddata->module_va = devm_ioremap(ddata->dev,
ddata->module_pa,
size);
size + sizeof(u32));
if (!ddata->module_va)
return -EIO;
@ -1224,10 +1221,10 @@ static int sysc_child_suspend_noirq(struct device *dev)
if (!pm_runtime_status_suspended(dev)) {
error = pm_generic_runtime_suspend(dev);
if (error) {
dev_err(dev, "%s error at %i: %i\n",
__func__, __LINE__, error);
dev_warn(dev, "%s busy at %i: %i\n",
__func__, __LINE__, error);
return error;
return 0;
}
error = sysc_runtime_suspend(ddata->dev);