drivers: phy: usb3/pipe3: Adapt pipe3 driver to Generic PHY Framework
Adapted omap-usb3 PHY driver to Generic PHY Framework and moved phy-omap-usb3 driver in drivers/usb/phy to drivers/phy and also renamed the file to phy-ti-pipe3 since this same driver will be used for SATA PHY and PCIE PHY. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
This commit is contained in:
parent
06c886a95c
commit
a70143bbef
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@ -43,6 +43,17 @@ config OMAP_USB2
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The USB OTG controller communicates with the comparator using this
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driver.
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config TI_PIPE3
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tristate "TI PIPE3 PHY Driver"
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depends on ARCH_OMAP2PLUS || COMPILE_TEST
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select GENERIC_PHY
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select OMAP_CONTROL_USB
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help
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Enable this to support the PIPE3 PHY that is part of TI SOCs. This
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driver takes care of all the PHY functionality apart from comparator.
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This driver interacts with the "OMAP Control PHY Driver" to power
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on/off the PHY.
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config TWL4030_USB
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tristate "TWL4030 USB Transceiver Driver"
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depends on TWL4030_CORE && REGULATOR_TWL4030 && USB_MUSB_OMAP2PLUS
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@ -8,6 +8,7 @@ obj-$(CONFIG_PHY_EXYNOS_DP_VIDEO) += phy-exynos-dp-video.o
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obj-$(CONFIG_PHY_EXYNOS_MIPI_VIDEO) += phy-exynos-mipi-video.o
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obj-$(CONFIG_PHY_MVEBU_SATA) += phy-mvebu-sata.o
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obj-$(CONFIG_OMAP_USB2) += phy-omap-usb2.o
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obj-$(CONFIG_TI_PIPE3) += phy-ti-pipe3.o
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obj-$(CONFIG_TWL4030_USB) += phy-twl4030-usb.o
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obj-$(CONFIG_PHY_EXYNOS5250_SATA) += phy-exynos5250-sata.o
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obj-$(CONFIG_PHY_SUN4I_USB) += phy-sun4i-usb.o
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@ -1,5 +1,5 @@
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/*
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* omap-usb3 - USB PHY, talking to dwc3 controller in OMAP.
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* phy-ti-pipe3 - PIPE3 PHY driver.
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*
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* Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
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* This program is free software; you can redistribute it and/or modify
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@ -19,10 +19,11 @@
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/usb/omap_usb.h>
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#include <linux/phy/phy.h>
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#include <linux/of.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <linux/delay.h>
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#include <linux/usb/omap_control_usb.h>
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@ -52,17 +53,34 @@
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/*
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* This is an Empirical value that works, need to confirm the actual
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* value required for the USB3PHY_PLL_CONFIGURATION2.PLL_IDLE status
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* to be correctly reflected in the USB3PHY_PLL_STATUS register.
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* value required for the PIPE3PHY_PLL_CONFIGURATION2.PLL_IDLE status
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* to be correctly reflected in the PIPE3PHY_PLL_STATUS register.
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*/
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# define PLL_IDLE_TIME 100;
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struct usb_dpll_map {
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unsigned long rate;
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struct usb_dpll_params params;
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struct pipe3_dpll_params {
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u16 m;
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u8 n;
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u8 freq:3;
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u8 sd;
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u32 mf;
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};
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static struct usb_dpll_map dpll_map[] = {
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struct ti_pipe3 {
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void __iomem *pll_ctrl_base;
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struct device *dev;
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struct device *control_dev;
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struct clk *wkupclk;
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struct clk *sys_clk;
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struct clk *optclk;
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};
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struct pipe3_dpll_map {
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unsigned long rate;
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struct pipe3_dpll_params params;
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};
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static struct pipe3_dpll_map dpll_map[] = {
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{12000000, {1250, 5, 4, 20, 0} }, /* 12 MHz */
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{16800000, {3125, 20, 4, 20, 0} }, /* 16.8 MHz */
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{19200000, {1172, 8, 4, 20, 65537} }, /* 19.2 MHz */
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@ -71,7 +89,18 @@ static struct usb_dpll_map dpll_map[] = {
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{38400000, {3125, 47, 4, 20, 92843} }, /* 38.4 MHz */
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};
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static struct usb_dpll_params *omap_usb3_get_dpll_params(unsigned long rate)
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static inline u32 ti_pipe3_readl(void __iomem *addr, unsigned offset)
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{
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return __raw_readl(addr + offset);
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}
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static inline void ti_pipe3_writel(void __iomem *addr, unsigned offset,
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u32 data)
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{
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__raw_writel(data, addr + offset);
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}
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static struct pipe3_dpll_params *ti_pipe3_get_dpll_params(unsigned long rate)
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{
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int i;
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@ -83,110 +112,123 @@ static struct usb_dpll_params *omap_usb3_get_dpll_params(unsigned long rate)
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return NULL;
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}
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static int omap_usb3_suspend(struct usb_phy *x, int suspend)
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static int ti_pipe3_power_off(struct phy *x)
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{
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struct omap_usb *phy = phy_to_omapusb(x);
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int val;
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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int val;
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int timeout = PLL_IDLE_TIME;
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if (suspend && !phy->is_suspended) {
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val |= PLL_IDLE;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val |= PLL_IDLE;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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do {
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (val & PLL_TICOPWDN)
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break;
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udelay(1);
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} while (--timeout);
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do {
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (val & PLL_TICOPWDN)
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break;
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udelay(5);
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} while (--timeout);
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omap_control_usb_phy_power(phy->control_dev, 0);
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if (!timeout) {
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dev_err(phy->dev, "power off failed\n");
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return -EBUSY;
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}
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phy->is_suspended = 1;
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} else if (!suspend && phy->is_suspended) {
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phy->is_suspended = 0;
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omap_control_usb_phy_power(phy->control_dev, 0);
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val &= ~PLL_IDLE;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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return 0;
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}
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do {
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (!(val & PLL_TICOPWDN))
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break;
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udelay(1);
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} while (--timeout);
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static int ti_pipe3_power_on(struct phy *x)
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{
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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int val;
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int timeout = PLL_IDLE_TIME;
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val &= ~PLL_IDLE;
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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do {
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (!(val & PLL_TICOPWDN))
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break;
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udelay(5);
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} while (--timeout);
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if (!timeout) {
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dev_err(phy->dev, "power on failed\n");
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return -EBUSY;
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}
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return 0;
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}
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static void omap_usb_dpll_relock(struct omap_usb *phy)
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static void ti_pipe3_dpll_relock(struct ti_pipe3 *phy)
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{
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u32 val;
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unsigned long timeout;
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omap_usb_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_GO, SET_PLL_GO);
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timeout = jiffies + msecs_to_jiffies(20);
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do {
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_STATUS);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
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if (val & PLL_LOCK)
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break;
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} while (!WARN_ON(time_after(jiffies, timeout)));
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}
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static int omap_usb_dpll_lock(struct omap_usb *phy)
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static int ti_pipe3_dpll_lock(struct ti_pipe3 *phy)
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{
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u32 val;
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unsigned long rate;
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struct usb_dpll_params *dpll_params;
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struct pipe3_dpll_params *dpll_params;
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rate = clk_get_rate(phy->sys_clk);
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dpll_params = omap_usb3_get_dpll_params(rate);
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dpll_params = ti_pipe3_get_dpll_params(rate);
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if (!dpll_params) {
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dev_err(phy->dev,
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"No DPLL configuration for %lu Hz SYS CLK\n", rate);
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return -EINVAL;
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}
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
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val &= ~PLL_REGN_MASK;
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val |= dpll_params->n << PLL_REGN_SHIFT;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION2);
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val &= ~PLL_SELFREQDCO_MASK;
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val |= dpll_params->freq << PLL_SELFREQDCO_SHIFT;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION2, val);
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION1);
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val &= ~PLL_REGM_MASK;
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val |= dpll_params->m << PLL_REGM_SHIFT;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION1, val);
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION4);
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val &= ~PLL_REGM_F_MASK;
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val |= dpll_params->mf << PLL_REGM_F_SHIFT;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION4, val);
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val = omap_usb_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
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val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_CONFIGURATION3);
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val &= ~PLL_SD_MASK;
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val |= dpll_params->sd << PLL_SD_SHIFT;
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omap_usb_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
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ti_pipe3_writel(phy->pll_ctrl_base, PLL_CONFIGURATION3, val);
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omap_usb_dpll_relock(phy);
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ti_pipe3_dpll_relock(phy);
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return 0;
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}
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static int omap_usb3_init(struct usb_phy *x)
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static int ti_pipe3_init(struct phy *x)
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{
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struct omap_usb *phy = phy_to_omapusb(x);
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struct ti_pipe3 *phy = phy_get_drvdata(x);
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int ret;
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ret = omap_usb_dpll_lock(phy);
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ret = ti_pipe3_dpll_lock(phy);
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if (ret)
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return ret;
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@ -195,9 +237,18 @@ static int omap_usb3_init(struct usb_phy *x)
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return 0;
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}
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static int omap_usb3_probe(struct platform_device *pdev)
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static struct phy_ops ops = {
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.init = ti_pipe3_init,
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.power_on = ti_pipe3_power_on,
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.power_off = ti_pipe3_power_off,
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.owner = THIS_MODULE,
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};
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static int ti_pipe3_probe(struct platform_device *pdev)
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{
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struct omap_usb *phy;
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struct ti_pipe3 *phy;
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struct phy *generic_phy;
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struct phy_provider *phy_provider;
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struct resource *res;
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struct device_node *node = pdev->dev.of_node;
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struct device_node *control_node;
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@ -208,7 +259,7 @@ static int omap_usb3_probe(struct platform_device *pdev)
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phy = devm_kzalloc(&pdev->dev, sizeof(*phy), GFP_KERNEL);
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if (!phy) {
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dev_err(&pdev->dev, "unable to alloc mem for OMAP USB3 PHY\n");
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dev_err(&pdev->dev, "unable to alloc mem for TI PIPE3 PHY\n");
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return -ENOMEM;
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}
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@ -219,13 +270,6 @@ static int omap_usb3_probe(struct platform_device *pdev)
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phy->dev = &pdev->dev;
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phy->phy.dev = phy->dev;
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phy->phy.label = "omap-usb3";
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phy->phy.init = omap_usb3_init;
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phy->phy.set_suspend = omap_usb3_suspend;
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phy->phy.type = USB_PHY_TYPE_USB3;
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phy->is_suspended = 1;
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phy->wkupclk = devm_clk_get(phy->dev, "usb_phy_cm_clk32k");
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if (IS_ERR(phy->wkupclk)) {
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dev_err(&pdev->dev, "unable to get usb_phy_cm_clk32k\n");
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@ -251,6 +295,7 @@ static int omap_usb3_probe(struct platform_device *pdev)
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dev_err(&pdev->dev, "Failed to get control device phandle\n");
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return -EINVAL;
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}
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control_pdev = of_find_device_by_node(control_node);
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if (!control_pdev) {
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dev_err(&pdev->dev, "Failed to get control device\n");
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phy->control_dev = &control_pdev->dev;
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omap_control_usb_phy_power(phy->control_dev, 0);
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usb_add_phy_dev(&phy->phy);
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platform_set_drvdata(pdev, phy);
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pm_runtime_enable(phy->dev);
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generic_phy = devm_phy_create(phy->dev, &ops, NULL);
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if (IS_ERR(generic_phy))
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return PTR_ERR(generic_phy);
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phy_set_drvdata(generic_phy, phy);
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phy_provider = devm_of_phy_provider_register(phy->dev,
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of_phy_simple_xlate);
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if (IS_ERR(phy_provider))
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return PTR_ERR(phy_provider);
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pm_runtime_get(&pdev->dev);
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return 0;
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}
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static int omap_usb3_remove(struct platform_device *pdev)
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static int ti_pipe3_remove(struct platform_device *pdev)
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{
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struct omap_usb *phy = platform_get_drvdata(pdev);
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struct ti_pipe3 *phy = platform_get_drvdata(pdev);
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clk_unprepare(phy->wkupclk);
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clk_unprepare(phy->optclk);
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usb_remove_phy(&phy->phy);
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if (!pm_runtime_suspended(&pdev->dev))
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pm_runtime_put(&pdev->dev);
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pm_runtime_disable(&pdev->dev);
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@ -286,10 +339,9 @@ static int omap_usb3_remove(struct platform_device *pdev)
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#ifdef CONFIG_PM_RUNTIME
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static int omap_usb3_runtime_suspend(struct device *dev)
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static int ti_pipe3_runtime_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct omap_usb *phy = platform_get_drvdata(pdev);
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struct ti_pipe3 *phy = dev_get_drvdata(dev);
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clk_disable(phy->wkupclk);
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clk_disable(phy->optclk);
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@ -297,11 +349,10 @@ static int omap_usb3_runtime_suspend(struct device *dev)
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return 0;
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}
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static int omap_usb3_runtime_resume(struct device *dev)
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static int ti_pipe3_runtime_resume(struct device *dev)
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{
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u32 ret = 0;
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struct platform_device *pdev = to_platform_device(dev);
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struct omap_usb *phy = platform_get_drvdata(pdev);
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struct ti_pipe3 *phy = dev_get_drvdata(dev);
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ret = clk_enable(phy->optclk);
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if (ret) {
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@ -324,38 +375,39 @@ err1:
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return ret;
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}
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static const struct dev_pm_ops omap_usb3_pm_ops = {
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SET_RUNTIME_PM_OPS(omap_usb3_runtime_suspend, omap_usb3_runtime_resume,
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NULL)
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static const struct dev_pm_ops ti_pipe3_pm_ops = {
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SET_RUNTIME_PM_OPS(ti_pipe3_runtime_suspend,
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ti_pipe3_runtime_resume, NULL)
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};
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#define DEV_PM_OPS (&omap_usb3_pm_ops)
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#define DEV_PM_OPS (&ti_pipe3_pm_ops)
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#else
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#define DEV_PM_OPS NULL
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#endif
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#ifdef CONFIG_OF
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static const struct of_device_id omap_usb3_id_table[] = {
|
||||
static const struct of_device_id ti_pipe3_id_table[] = {
|
||||
{ .compatible = "ti,phy-usb3" },
|
||||
{ .compatible = "ti,omap-usb3" },
|
||||
{}
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, omap_usb3_id_table);
|
||||
MODULE_DEVICE_TABLE(of, ti_pipe3_id_table);
|
||||
#endif
|
||||
|
||||
static struct platform_driver omap_usb3_driver = {
|
||||
.probe = omap_usb3_probe,
|
||||
.remove = omap_usb3_remove,
|
||||
static struct platform_driver ti_pipe3_driver = {
|
||||
.probe = ti_pipe3_probe,
|
||||
.remove = ti_pipe3_remove,
|
||||
.driver = {
|
||||
.name = "omap-usb3",
|
||||
.name = "ti-pipe3",
|
||||
.owner = THIS_MODULE,
|
||||
.pm = DEV_PM_OPS,
|
||||
.of_match_table = of_match_ptr(omap_usb3_id_table),
|
||||
.of_match_table = of_match_ptr(ti_pipe3_id_table),
|
||||
},
|
||||
};
|
||||
|
||||
module_platform_driver(omap_usb3_driver);
|
||||
module_platform_driver(ti_pipe3_driver);
|
||||
|
||||
MODULE_ALIAS("platform: omap_usb3");
|
||||
MODULE_ALIAS("platform: ti_pipe3");
|
||||
MODULE_AUTHOR("Texas Instruments Inc.");
|
||||
MODULE_DESCRIPTION("OMAP USB3 phy driver");
|
||||
MODULE_DESCRIPTION("TI PIPE3 phy driver");
|
||||
MODULE_LICENSE("GPL v2");
|
|
@ -85,17 +85,6 @@ config OMAP_CONTROL_USB
|
|||
power on the USB2 PHY is present in OMAP4 and OMAP5. OMAP5 has an
|
||||
additional register to power on USB3 PHY.
|
||||
|
||||
config OMAP_USB3
|
||||
tristate "OMAP USB3 PHY Driver"
|
||||
depends on ARCH_OMAP2PLUS || COMPILE_TEST
|
||||
select OMAP_CONTROL_USB
|
||||
select USB_PHY
|
||||
help
|
||||
Enable this to support the USB3 PHY that is part of SOC. This
|
||||
driver takes care of all the PHY functionality apart from comparator.
|
||||
This driver interacts with the "OMAP Control USB Driver" to power
|
||||
on/off the PHY.
|
||||
|
||||
config AM335X_CONTROL_USB
|
||||
tristate
|
||||
|
||||
|
|
|
@ -17,7 +17,6 @@ obj-$(CONFIG_OMAP_CONTROL_USB) += phy-omap-control.o
|
|||
obj-$(CONFIG_AM335X_CONTROL_USB) += phy-am335x-control.o
|
||||
obj-$(CONFIG_AM335X_PHY_USB) += phy-am335x.o
|
||||
obj-$(CONFIG_OMAP_OTG) += phy-omap-otg.o
|
||||
obj-$(CONFIG_OMAP_USB3) += phy-omap-usb3.o
|
||||
obj-$(CONFIG_SAMSUNG_USBPHY) += phy-samsung-usb.o
|
||||
obj-$(CONFIG_SAMSUNG_USB2PHY) += phy-samsung-usb2.o
|
||||
obj-$(CONFIG_SAMSUNG_USB3PHY) += phy-samsung-usb3.o
|
||||
|
|
Loading…
Reference in New Issue