omap: mailbox: correct OMAP4 reset logic
OMAP4 mailbox has a different register set. There is no MAILBOX_SYSSTATUS register. The reset is indicated with the SOFTRESET bit of the MAILBOX_SYSCONFIG register itself. This bit should read 0 for a successful Reset. Also, the SOFTRESET bit occupies bit0 and not bit1 as with previous generations. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Hiroshi DOYU <Hiroshi.DOYU@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -40,6 +40,7 @@
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#define AUTOIDLE (1 << 0)
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#define SOFTRESET (1 << 1)
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#define SMARTIDLE (2 << 3)
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#define OMAP4_SOFTRESET (1 << 0)
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/* SYSSTATUS: register bit definition */
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#define RESETDONE (1 << 0)
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@ -99,17 +100,32 @@ static int omap2_mbox_startup(struct omap_mbox *mbox)
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}
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clk_enable(mbox_ick_handle);
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mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG);
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timeout = jiffies + msecs_to_jiffies(20);
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do {
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l = mbox_read_reg(MAILBOX_SYSSTATUS);
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if (l & RESETDONE)
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break;
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} while (!time_after(jiffies, timeout));
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if (cpu_is_omap44xx()) {
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mbox_write_reg(OMAP4_SOFTRESET, MAILBOX_SYSCONFIG);
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timeout = jiffies + msecs_to_jiffies(20);
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do {
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l = mbox_read_reg(MAILBOX_SYSCONFIG);
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if (!(l & OMAP4_SOFTRESET))
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break;
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} while (!time_after(jiffies, timeout));
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if (!(l & RESETDONE)) {
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pr_err("Can't take mmu out of reset\n");
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return -ENODEV;
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if (l & OMAP4_SOFTRESET) {
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pr_err("Can't take mailbox out of reset\n");
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return -ENODEV;
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}
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} else {
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mbox_write_reg(SOFTRESET, MAILBOX_SYSCONFIG);
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timeout = jiffies + msecs_to_jiffies(20);
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do {
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l = mbox_read_reg(MAILBOX_SYSSTATUS);
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if (l & RESETDONE)
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break;
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} while (!time_after(jiffies, timeout));
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if (!(l & RESETDONE)) {
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pr_err("Can't take mailbox out of reset\n");
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return -ENODEV;
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}
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}
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l = mbox_read_reg(MAILBOX_REVISION);
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