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powerpc/86xx: Move pci1 definition to the include file 

Signed-off-by: Alessio Igor Bogani <alessio.bogani@elettra.eu>
Signed-off-by: Scott Wood <oss@buserror.net>
This commit is contained in:
Alessio Igor Bogani 2016-04-20 10:18:29 +02:00 committed by Scott Wood
parent 4680c9d506
commit a66639d4ee
8 changed files with 38 additions and 91 deletions
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4
arch/powerpc/boot/dts/fsl/gef_ppc9a.dts
View File

@ -211,6 +211,10 @@
0x0 0x00400000>;
};
};
pci1: pcie@fef09000 {
status = "disabled";
};
};
/include/ "mpc8641si-post.dtsi"

22
arch/powerpc/boot/dts/fsl/gef_sbc310.dts
View File

@ -24,10 +24,6 @@
model = "GEF_SBC310";
compatible = "gef,sbc310";
aliases {
pci1 = &pci1;
};
memory {
device_type = "memory";
reg = <0x0 0x40000000>; // set by uboot
@ -223,29 +219,11 @@
};
pci1: pcie@fef09000 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
reg = <0xfef09000 0x1000>;
bus-range = <0x0 0xff>;
ranges = <0x02000000 0x0 0xc0000000 0xc0000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0xfe400000 0x0 0x00400000>;
clock-frequency = <100000000>;
interrupts = <0x19 0x2 0 0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
0x0000 0x0 0x0 0x1 &mpic 0x4 0x2
0x0000 0x0 0x0 0x2 &mpic 0x5 0x2
0x0000 0x0 0x0 0x3 &mpic 0x6 0x2
0x0000 0x0 0x0 0x4 &mpic 0x7 0x2
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0xc0000000
0x02000000 0x0 0xc0000000
0x0 0x20000000

4
arch/powerpc/boot/dts/fsl/gef_sbc610.dts
View File

@ -209,6 +209,10 @@
0x0 0x00400000>;
};
};
pci1: pcie@fef09000 {
status = "disabled";
};
};
/include/ "mpc8641si-post.dtsi"

24
arch/powerpc/boot/dts/fsl/mpc8641_hpcn.dts
View File

@ -15,10 +15,6 @@
model = "MPC8641HPCN";
compatible = "fsl,mpc8641hpcn";
aliases {
pci1 = &pci1;
};
memory {
device_type = "memory";
reg = <0x00000000 0x40000000>; // 1G at 0x0
@ -359,29 +355,11 @@
};
pci1: pcie@ffe09000 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
reg = <0xffe09000 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0xffc10000 0x0 0x00010000>;
clock-frequency = <100000000>;
interrupts = <25 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0x0000 0 0 1 &mpic 4 1
0x0000 0 0 2 &mpic 5 1
0x0000 0 0 3 &mpic 6 1
0x0000 0 0 4 &mpic 7 1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0xa0000000
0x02000000 0x0 0xa0000000
0x0 0x20000000

24
arch/powerpc/boot/dts/fsl/mpc8641_hpcn_36b.dts
View File

@ -17,10 +17,6 @@
#address-cells = <2>;
#size-cells = <2>;
aliases {
pci1 = &pci1;
};
memory {
device_type = "memory";
reg = <0x0 0x00000000 0x0 0x40000000>; // 1G at 0x0
@ -326,29 +322,11 @@
};
pci1: pcie@fffe09000 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
reg = <0x0f 0xffe09000 0x0 0x1000>;
bus-range = <0x0 0xff>;
ranges = <0x02000000 0x0 0xe0000000 0x0c 0x20000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0x0f 0xffc10000 0x0 0x00010000>;
clock-frequency = <100000000>;
interrupts = <25 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0x0000 0 0 1 &mpic 4 1
0x0000 0 0 2 &mpic 5 1
0x0000 0 0 3 &mpic 6 1
0x0000 0 0 4 &mpic 7 1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0xe0000000
0x02000000 0x0 0xe0000000
0x0 0x20000000

27
arch/powerpc/boot/dts/fsl/mpc8641si-post.dtsi
View File

@ -113,6 +113,33 @@
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
};
};
&pci1 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
bus-range = <0x0 0xff>;
clock-frequency = <100000000>;
interrupts = <25 2 0 0>;
interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
interrupt-map = <
0x0000 0x0 0x0 0x1 &mpic 0x4 0x1
0x0000 0x0 0x0 0x2 &mpic 0x5 0x1
0x0000 0x0 0x0 0x3 &mpic 0x6 0x1
0x0000 0x0 0x0 0x4 &mpic 0x7 0x1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#interrupt-cells = <1>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";

1
arch/powerpc/boot/dts/fsl/mpc8641si-pre.dtsi
View File

@ -25,6 +25,7 @@
serial0 = &serial0;
serial1 = &serial1;
pci0 = &pci0;
pci1 = &pci1;
};
cpus {

23
arch/powerpc/boot/dts/fsl/sbc8641d.dts
View File

@ -19,10 +19,6 @@
model = "SBC8641D";
compatible = "wind,sbc8641";
aliases {
pci1 = &pci1;
};
memory {
device_type = "memory";
reg = <0x00000000 0x20000000>; // 512M at 0x0
@ -165,30 +161,11 @@
};
pci1: pcie@f8009000 {
compatible = "fsl,mpc8641-pcie";
device_type = "pci";
#size-cells = <2>;
#address-cells = <3>;
reg = <0xf8009000 0x1000>;
bus-range = <0 0xff>;
ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
0x01000000 0x0 0x00000000 0xe3000000 0x0 0x00100000>;
clock-frequency = <100000000>;
interrupts = <25 2 0 0>;
interrupt-map-mask = <0xf800 0 0 7>;
interrupt-map = <
/* IDSEL 0x0 */
0x0000 0 0 1 &mpic 4 1
0x0000 0 0 2 &mpic 5 1
0x0000 0 0 3 &mpic 6 1
0x0000 0 0 4 &mpic 7 1
>;
pcie@0 {
reg = <0 0 0 0 0>;
#size-cells = <2>;
#address-cells = <3>;
device_type = "pci";
ranges = <0x02000000 0x0 0xa0000000
0x02000000 0x0 0xa0000000
0x0 0x20000000