ARM: mx28: check for gated clocks when setting saif divider
Like with all other clocks, the divider for the SAIF devices should not be altered when the clock is gated. Bail out when this is the case like the other clocks do. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Dong Aisheng-B29396 <B29396@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -477,6 +477,10 @@ static int name##_set_rate(struct clk *clk, unsigned long rate) \
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reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \
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reg &= ~BM_CLKCTRL_##rs##_DIV; \
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reg |= div << BP_CLKCTRL_##rs##_DIV; \
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if (reg & (1 << clk->enable_shift)) { \
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pr_err("%s: clock is gated\n", __func__); \
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return -EINVAL; \
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} \
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__raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_##rs); \
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\
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for (i = 10000; i; i--) \
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