drm/i915: add DP test request handling
DPCD 1.1+ adds some automated test infrastructure support. Add support for reading the IRQ source and jumping to a test handling routine if needed. Subsequent patches will handle particular tests; this patch just ACKs any requested tests by default. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
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@ -1776,6 +1776,27 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
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return false;
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}
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static bool
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intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
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{
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int ret;
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ret = intel_dp_aux_native_read_retry(intel_dp,
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DP_DEVICE_SERVICE_IRQ_VECTOR,
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sink_irq_vector, 1);
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if (!ret)
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return false;
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return true;
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}
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static void
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intel_dp_handle_test_request(struct intel_dp *intel_dp)
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{
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/* NAK by default */
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intel_dp_aux_native_write_1(intel_dp, DP_TEST_RESPONSE, DP_TEST_ACK);
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}
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/*
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* According to DP spec
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* 5.1.2:
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@ -1788,6 +1809,8 @@ intel_dp_get_dpcd(struct intel_dp *intel_dp)
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static void
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intel_dp_check_link_status(struct intel_dp *intel_dp)
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{
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u8 sink_irq_vector;
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if (intel_dp->dpms_mode != DRM_MODE_DPMS_ON)
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return;
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@ -1806,6 +1829,20 @@ intel_dp_check_link_status(struct intel_dp *intel_dp)
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return;
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}
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/* Try to read the source of the interrupt */
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if (intel_dp->dpcd[DP_DPCD_REV] >= 0x11 &&
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intel_dp_get_sink_irq(intel_dp, &sink_irq_vector)) {
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/* Clear interrupt source */
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intel_dp_aux_native_write_1(intel_dp,
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DP_DEVICE_SERVICE_IRQ_VECTOR,
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sink_irq_vector);
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if (sink_irq_vector & DP_AUTOMATED_TEST_REQUEST)
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intel_dp_handle_test_request(intel_dp);
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if (sink_irq_vector & (DP_CP_IRQ | DP_SINK_SPECIFIC_IRQ))
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DRM_DEBUG_DRIVER("CP or sink specific irq unhandled\n");
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}
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if (!intel_channel_eq_ok(intel_dp)) {
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DRM_DEBUG_KMS("%s: channel EQ not ok, retraining\n",
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drm_get_encoder_name(&intel_dp->base.base));
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@ -153,6 +153,12 @@
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# define DP_PSR_CRC_VERIFICATION (1 << 2)
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# define DP_PSR_FRAME_CAPTURE (1 << 3)
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#define DP_DEVICE_SERVICE_IRQ_VECTOR 0x201
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# define DP_REMOTE_CONTROL_COMMAND_PENDING (1 << 0)
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# define DP_AUTOMATED_TEST_REQUEST (1 << 1)
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# define DP_CP_IRQ (1 << 2)
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# define DP_SINK_SPECIFIC_IRQ (1 << 6)
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#define DP_LANE0_1_STATUS 0x202
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#define DP_LANE2_3_STATUS 0x203
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# define DP_LANE_CR_DONE (1 << 0)
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@ -185,6 +191,25 @@
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# define DP_ADJUST_PRE_EMPHASIS_LANE1_MASK 0xc0
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# define DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT 6
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#define DP_TEST_REQUEST 0x218
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# define DP_TEST_LINK_TRAINING (1 << 0)
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# define DP_TEST_LINK_PATTERN (1 << 1)
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# define DP_TEST_LINK_EDID_READ (1 << 2)
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# define DP_TEST_LINK_PHY_TEST_PATTERN (1 << 3) /* DPCD >= 1.1 */
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#define DP_TEST_LINK_RATE 0x219
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# define DP_LINK_RATE_162 (0x6)
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# define DP_LINK_RATE_27 (0xa)
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#define DP_TEST_LANE_COUNT 0x220
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#define DP_TEST_PATTERN 0x221
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#define DP_TEST_RESPONSE 0x260
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# define DP_TEST_ACK (1 << 0)
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# define DP_TEST_NAK (1 << 1)
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# define DP_TEST_EDID_CHECKSUM_WRITE (1 << 2)
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#define DP_SET_POWER 0x600
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# define DP_SET_POWER_D0 0x1
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# define DP_SET_POWER_D3 0x2
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