sh: Convert SH-2A to new cacheflush interface.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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@ -1,30 +0,0 @@
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#ifndef __ASM_CPU_SH2A_CACHEFLUSH_H
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#define __ASM_CPU_SH2A_CACHEFLUSH_H
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/*
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* Cache flushing:
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*
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* - flush_cache_all() flushes entire cache
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* - flush_cache_mm(mm) flushes the specified mm context's cache lines
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* - flush_cache_dup mm(mm) handles cache flushing when forking
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* - flush_cache_page(mm, vmaddr, pfn) flushes a single page
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* - flush_cache_range(vma, start, end) flushes a range of pages
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*
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* - flush_dcache_page(pg) flushes(wback&invalidates) a page for dcache
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* - flush_icache_range(start, end) flushes(invalidates) a range for icache
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* - flush_icache_page(vma, pg) flushes(invalidates) a page for icache
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*
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* Caches are indexed (effectively) by physical address on SH-2, so
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* we don't need them.
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*/
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#define flush_cache_all() do { } while (0)
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#define flush_cache_mm(mm) do { } while (0)
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#define flush_cache_dup_mm(mm) do { } while (0)
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#define flush_cache_range(vma, start, end) do { } while (0)
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#define flush_cache_page(vma, vmaddr, pfn) do { } while (0)
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#define flush_dcache_page(page) do { } while (0)
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void flush_icache_range(unsigned long start, unsigned long end);
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#define flush_icache_page(vma,pg) do { } while (0)
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#define flush_cache_sigtramp(vaddr) do { } while (0)
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#endif /* __ASM_CPU_SH2A_CACHEFLUSH_H */
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@ -15,7 +15,7 @@
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#include <asm/cacheflush.h>
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#include <asm/cacheflush.h>
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#include <asm/io.h>
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#include <asm/io.h>
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void __flush_wback_region(void *start, int size)
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static void sh2a__flush_wback_region(void *start, int size)
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{
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{
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unsigned long v;
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unsigned long v;
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unsigned long begin, end;
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unsigned long begin, end;
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@ -44,7 +44,7 @@ void __flush_wback_region(void *start, int size)
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local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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void __flush_purge_region(void *start, int size)
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static void sh2a__flush_purge_region(void *start, int size)
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{
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{
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unsigned long v;
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unsigned long v;
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unsigned long begin, end;
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unsigned long begin, end;
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@ -65,7 +65,7 @@ void __flush_purge_region(void *start, int size)
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local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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void __flush_invalidate_region(void *start, int size)
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static void sh2a__flush_invalidate_region(void *start, int size)
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{
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{
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unsigned long v;
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unsigned long v;
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unsigned long begin, end;
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unsigned long begin, end;
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@ -97,7 +97,7 @@ void __flush_invalidate_region(void *start, int size)
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}
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}
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/* WBack O-Cache and flush I-Cache */
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/* WBack O-Cache and flush I-Cache */
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void flush_icache_range(unsigned long start, unsigned long end)
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static void sh2a_flush_icache_range(unsigned long start, unsigned long end)
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{
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{
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unsigned long v;
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unsigned long v;
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unsigned long flags;
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unsigned long flags;
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@ -127,3 +127,12 @@ void flush_icache_range(unsigned long start, unsigned long end)
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back_to_cached();
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back_to_cached();
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local_irq_restore(flags);
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local_irq_restore(flags);
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}
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}
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void __init sh2a_cache_init(void)
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{
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flush_icache_range = sh2a_flush_icache_range;
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__flush_wback_region = sh2a__flush_wback_region;
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__flush_purge_region = sh2a__flush_purge_region;
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__flush_invalidate_region = sh2a__flush_invalidate_region;
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}
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@ -250,6 +250,12 @@ void __init cpu_cache_init(void)
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sh2_cache_init();
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sh2_cache_init();
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}
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}
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if (boot_cpu_data.family == CPU_FAMILY_SH2A) {
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extern void __weak sh2a_cache_init(void);
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sh2a_cache_init();
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}
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if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
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if ((boot_cpu_data.family == CPU_FAMILY_SH4) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4A) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4A) ||
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(boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
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(boot_cpu_data.family == CPU_FAMILY_SH4AL_DSP)) {
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