staging: ccree: simplify access to struct device
Introduce a function to retrieve struct device from private data structure in preparation to replacing custom logging macros with proper dev_dbg and friends which require struct device. Signed-off-by: Gilad Ben-Yossef <gilad@benyossef.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
613fa6f1d3
commit
a55ef6f52f
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@ -92,13 +92,12 @@ static inline bool valid_assoclen(struct aead_request *req)
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static void ssi_aead_exit(struct crypto_aead *tfm)
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{
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struct device *dev = NULL;
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struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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SSI_LOG_DEBUG("Clearing context @%p for %s\n",
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crypto_aead_ctx(tfm), crypto_tfm_alg_name(&tfm->base));
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dev = &ctx->drvdata->plat_dev->dev;
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/* Unmap enckey buffer */
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if (ctx->enckey) {
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dma_free_coherent(dev, AES_MAX_KEY_SIZE, ctx->enckey, ctx->enckey_dma_addr);
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@ -146,11 +145,12 @@ static void ssi_aead_exit(struct crypto_aead *tfm)
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static int ssi_aead_init(struct crypto_aead *tfm)
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{
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struct device *dev;
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struct aead_alg *alg = crypto_aead_alg(tfm);
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struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
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struct ssi_crypto_alg *ssi_alg =
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container_of(alg, struct ssi_crypto_alg, aead_alg);
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struct device *dev = drvdata_to_dev(ssi_alg->drvdata);
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SSI_LOG_DEBUG("Initializing context @%p for %s\n", ctx, crypto_tfm_alg_name(&tfm->base));
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/* Initialize modes in instance */
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@ -158,7 +158,6 @@ static int ssi_aead_init(struct crypto_aead *tfm)
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ctx->flow_mode = ssi_alg->flow_mode;
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ctx->auth_mode = ssi_alg->auth_mode;
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ctx->drvdata = ssi_alg->drvdata;
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dev = &ctx->drvdata->plat_dev->dev;
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crypto_aead_set_reqsize(tfm, sizeof(struct aead_req_ctx));
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/* Allocate key buffer, cache line aligned */
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@ -426,7 +425,7 @@ ssi_get_plain_hmac_key(struct crypto_aead *tfm, const u8 *key, unsigned int keyl
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{
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dma_addr_t key_dma_addr = 0;
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struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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u32 larval_addr = ssi_ahash_get_larval_digest_sram_addr(
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ctx->drvdata, ctx->auth_mode);
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struct ssi_crypto_req ssi_req = {};
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@ -1952,7 +1951,7 @@ static int ssi_aead_process(struct aead_request *req, enum drv_crypto_direction
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struct crypto_aead *tfm = crypto_aead_reqtfm(req);
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struct ssi_aead_ctx *ctx = crypto_aead_ctx(tfm);
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struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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struct ssi_crypto_req ssi_req = {};
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SSI_LOG_DEBUG("%s context=%p req=%p iv=%p src=%p src_ofs=%d dst=%p dst_ofs=%d cryptolen=%d\n",
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@ -514,7 +514,7 @@ int ssi_buffer_mgr_map_blkcipher_request(
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struct blkcipher_req_ctx *req_ctx = (struct blkcipher_req_ctx *)ctx;
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struct mlli_params *mlli_params = &req_ctx->mlli_params;
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struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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struct buffer_array sg_data;
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u32 dummy = 0;
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int rc = 0;
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@ -770,7 +770,7 @@ static inline int ssi_buffer_mgr_aead_chain_iv(
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{
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struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
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unsigned int hw_iv_size = areq_ctx->hw_iv_size;
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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int rc = 0;
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if (unlikely(!req->iv)) {
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@ -1110,7 +1110,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
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bool is_last_table, bool do_chain)
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{
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struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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enum drv_crypto_direction direct = areq_ctx->gen_ctx.op_type;
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unsigned int authsize = areq_ctx->req_authsize;
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int src_last_bytes = 0, dst_last_bytes = 0;
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@ -1279,7 +1279,7 @@ int ssi_buffer_mgr_map_aead_request(
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{
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struct aead_req_ctx *areq_ctx = aead_request_ctx(req);
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struct mlli_params *mlli_params = &areq_ctx->mlli_params;
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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struct buffer_array sg_data;
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unsigned int authsize = areq_ctx->req_authsize;
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struct buff_mgr_handle *buff_mgr = drvdata->buff_mgr_handle;
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@ -1490,7 +1490,7 @@ int ssi_buffer_mgr_map_hash_request_final(
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struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, bool do_update)
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{
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struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
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areq_ctx->buff0;
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u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
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@ -1580,7 +1580,7 @@ int ssi_buffer_mgr_map_hash_request_update(
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struct ssi_drvdata *drvdata, void *ctx, struct scatterlist *src, unsigned int nbytes, unsigned int block_size)
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{
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struct ahash_req_ctx *areq_ctx = (struct ahash_req_ctx *)ctx;
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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u8 *curr_buff = areq_ctx->buff_index ? areq_ctx->buff1 :
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areq_ctx->buff0;
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u32 *curr_buff_cnt = areq_ctx->buff_index ? &areq_ctx->buff1_cnt :
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@ -1755,7 +1755,7 @@ void ssi_buffer_mgr_unmap_hash_request(
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int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
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{
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struct buff_mgr_handle *buff_mgr_handle;
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struct device *dev = &drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(drvdata);
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buff_mgr_handle = kmalloc(sizeof(*buff_mgr_handle), GFP_KERNEL);
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if (!buff_mgr_handle)
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@ -181,7 +181,7 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
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struct crypto_alg *alg = tfm->__crt_alg;
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struct ssi_crypto_alg *ssi_alg =
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container_of(alg, struct ssi_crypto_alg, crypto_alg);
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struct device *dev;
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struct device *dev = drvdata_to_dev(ssi_alg->drvdata);
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int rc = 0;
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unsigned int max_key_buf_size = get_max_keysize(tfm);
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@ -191,7 +191,6 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
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ctx_p->cipher_mode = ssi_alg->cipher_mode;
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ctx_p->flow_mode = ssi_alg->flow_mode;
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ctx_p->drvdata = ssi_alg->drvdata;
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dev = &ctx_p->drvdata->plat_dev->dev;
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/* Allocate key buffer, cache line aligned */
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ctx_p->user.key = kmalloc(max_key_buf_size, GFP_KERNEL | GFP_DMA);
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@ -230,7 +229,7 @@ static int ssi_blkcipher_init(struct crypto_tfm *tfm)
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static void ssi_blkcipher_exit(struct crypto_tfm *tfm)
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{
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struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm);
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struct device *dev = &ctx_p->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx_p->drvdata);
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unsigned int max_key_buf_size = get_max_keysize(tfm);
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SSI_LOG_DEBUG("Clearing context @%p for %s\n",
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@ -298,7 +297,7 @@ static int ssi_blkcipher_setkey(struct crypto_tfm *tfm,
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unsigned int keylen)
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{
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struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm);
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struct device *dev = &ctx_p->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx_p->drvdata);
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u32 tmp[DES_EXPKEY_WORDS];
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unsigned int max_key_buf_size = get_max_keysize(tfm);
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@ -738,7 +737,7 @@ static int ssi_blkcipher_process(
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enum drv_crypto_direction direction)
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{
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struct ssi_ablkcipher_ctx *ctx_p = crypto_tfm_ctx(tfm);
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struct device *dev = &ctx_p->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx_p->drvdata);
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struct cc_hw_desc desc[MAX_ABLKCIPHER_SEQ_LEN];
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struct ssi_crypto_req ssi_req = {};
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int rc, seq_len = 0, cts_restore_flag = 0;
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@ -1281,10 +1280,6 @@ int ssi_ablkcipher_free(struct ssi_drvdata *drvdata)
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struct ssi_crypto_alg *t_alg, *n;
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struct ssi_blkcipher_handle *blkcipher_handle =
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drvdata->blkcipher_handle;
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struct device *dev;
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dev = &drvdata->plat_dev->dev;
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if (blkcipher_handle) {
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/* Remove registered algs */
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list_for_each_entry_safe(t_alg, n,
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@ -229,14 +229,13 @@ static int init_cc_resources(struct platform_device *plat_dev)
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u32 signature_val;
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int rc = 0;
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new_drvdata = devm_kzalloc(&plat_dev->dev, sizeof(*new_drvdata),
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GFP_KERNEL);
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new_drvdata = devm_kzalloc(dev, sizeof(*new_drvdata), GFP_KERNEL);
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if (!new_drvdata) {
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SSI_LOG_ERR("Failed to allocate drvdata");
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rc = -ENOMEM;
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goto post_drvdata_err;
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}
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dev_set_drvdata(&plat_dev->dev, new_drvdata);
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dev_set_drvdata(dev, new_drvdata);
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new_drvdata->plat_dev = plat_dev;
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new_drvdata->clk = of_clk_get(np, 0);
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@ -246,8 +245,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
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/* First CC registers space */
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req_mem_cc_regs = platform_get_resource(plat_dev, IORESOURCE_MEM, 0);
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/* Map registers space */
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new_drvdata->cc_base = devm_ioremap_resource(&plat_dev->dev,
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req_mem_cc_regs);
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new_drvdata->cc_base = devm_ioremap_resource(dev, req_mem_cc_regs);
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if (IS_ERR(new_drvdata->cc_base)) {
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SSI_LOG_ERR("Failed to ioremap registers");
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rc = PTR_ERR(new_drvdata->cc_base);
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@ -271,7 +269,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
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goto post_drvdata_err;
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}
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rc = devm_request_irq(&plat_dev->dev, new_drvdata->irq, cc_isr,
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rc = devm_request_irq(dev, new_drvdata->irq, cc_isr,
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IRQF_SHARED, "arm_cc7x", new_drvdata);
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if (rc) {
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SSI_LOG_ERR("Could not register to interrupt %d\n",
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@ -284,11 +282,11 @@ static int init_cc_resources(struct platform_device *plat_dev)
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if (rc)
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goto post_drvdata_err;
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if (!new_drvdata->plat_dev->dev.dma_mask)
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new_drvdata->plat_dev->dev.dma_mask = &new_drvdata->plat_dev->dev.coherent_dma_mask;
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if (!dev->dma_mask)
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dev->dma_mask = &dev->coherent_dma_mask;
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if (!new_drvdata->plat_dev->dev.coherent_dma_mask)
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new_drvdata->plat_dev->dev.coherent_dma_mask = DMA_BIT_MASK(DMA_BIT_MASK_LEN);
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if (!dev->coherent_dma_mask)
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dev->coherent_dma_mask = DMA_BIT_MASK(DMA_BIT_MASK_LEN);
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/* Verify correct mapping */
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signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE));
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@ -311,7 +309,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
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}
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#ifdef ENABLE_CC_SYSFS
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rc = ssi_sysfs_init(&plat_dev->dev.kobj, new_drvdata);
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rc = ssi_sysfs_init(&dev->kobj, new_drvdata);
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if (unlikely(rc != 0)) {
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SSI_LOG_ERR("init_stat_db failed\n");
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goto post_regs_err;
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@ -415,7 +413,7 @@ post_clk_err:
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cc_clk_off(new_drvdata);
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post_drvdata_err:
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SSI_LOG_ERR("ccree init error occurred!\n");
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dev_set_drvdata(&plat_dev->dev, NULL);
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dev_set_drvdata(dev, NULL);
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return rc;
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}
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@ -37,6 +37,7 @@
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#include <crypto/hash.h>
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#include <linux/version.h>
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#include <linux/clk.h>
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#include <linux/platform_device.h>
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/* Registers definitions from shared/hw/ree_include */
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#include "dx_reg_base_host.h"
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@ -184,6 +185,11 @@ struct async_gen_req_ctx {
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enum drv_crypto_direction op_type;
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};
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static inline struct device *drvdata_to_dev(struct ssi_drvdata *drvdata)
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{
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return &drvdata->plat_dev->dev;
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}
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#ifdef DX_DUMP_BYTES
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void dump_byte_array(const char *name, const u8 *the_array, unsigned long size);
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#else
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@ -414,7 +414,7 @@ static int ssi_hash_digest(struct ahash_req_ctx *state,
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unsigned int nbytes, u8 *result,
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void *async_req)
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{
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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bool is_hmac = ctx->is_hmac;
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struct ssi_crypto_req ssi_req = {};
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struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
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@ -579,7 +579,7 @@ static int ssi_hash_update(struct ahash_req_ctx *state,
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unsigned int nbytes,
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void *async_req)
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{
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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struct ssi_crypto_req ssi_req = {};
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struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
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u32 idx = 0;
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@ -676,7 +676,7 @@ static int ssi_hash_finup(struct ahash_req_ctx *state,
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u8 *result,
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void *async_req)
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{
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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bool is_hmac = ctx->is_hmac;
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struct ssi_crypto_req ssi_req = {};
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struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
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@ -810,7 +810,7 @@ static int ssi_hash_final(struct ahash_req_ctx *state,
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u8 *result,
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void *async_req)
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{
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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bool is_hmac = ctx->is_hmac;
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struct ssi_crypto_req ssi_req = {};
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struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
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@ -948,7 +948,7 @@ ctx->drvdata, ctx->hash_mode), HASH_LEN_SIZE);
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static int ssi_hash_init(struct ahash_req_ctx *state, struct ssi_hash_ctx *ctx)
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{
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struct device *dev = &ctx->drvdata->plat_dev->dev;
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struct device *dev = drvdata_to_dev(ctx->drvdata);
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state->xcbc_count = 0;
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@ -970,10 +970,12 @@ static int ssi_hash_setkey(void *hash,
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int i, idx = 0, rc = 0;
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struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
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ssi_sram_addr_t larval_addr;
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struct device *dev;
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SSI_LOG_DEBUG("start keylen: %d", keylen);
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ctx = crypto_ahash_ctx(((struct crypto_ahash *)hash));
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dev = drvdata_to_dev(ctx->drvdata);
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blocksize = crypto_tfm_alg_blocksize(&((struct crypto_ahash *)hash)->base);
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digestsize = crypto_ahash_digestsize(((struct crypto_ahash *)hash));
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@ -989,10 +991,9 @@ static int ssi_hash_setkey(void *hash,
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if (keylen != 0) {
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ctx->key_params.key_dma_addr = dma_map_single(
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&ctx->drvdata->plat_dev->dev,
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(void *)key,
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dev, (void *)key,
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keylen, DMA_TO_DEVICE);
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if (unlikely(dma_mapping_error(&ctx->drvdata->plat_dev->dev,
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if (unlikely(dma_mapping_error(dev,
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ctx->key_params.key_dma_addr))) {
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SSI_LOG_ERR("Mapping key va=0x%p len=%u for"
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" DMA failed\n", key, keylen);
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@ -1139,8 +1140,7 @@ out:
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crypto_ahash_set_flags((struct crypto_ahash *)hash, CRYPTO_TFM_RES_BAD_KEY_LEN);
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if (ctx->key_params.key_dma_addr) {
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dma_unmap_single(&ctx->drvdata->plat_dev->dev,
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ctx->key_params.key_dma_addr,
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dma_unmap_single(dev, ctx->key_params.key_dma_addr,
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ctx->key_params.keylen, DMA_TO_DEVICE);
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SSI_LOG_DEBUG("Unmapped key-buffer: key_dma_addr=%pad keylen=%u\n",
|
||||
ctx->key_params.key_dma_addr,
|
||||
|
@ -1154,6 +1154,7 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash,
|
|||
{
|
||||
struct ssi_crypto_req ssi_req = {};
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash);
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
int idx = 0, rc = 0;
|
||||
struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
|
||||
|
||||
|
@ -1171,11 +1172,9 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash,
|
|||
ctx->key_params.keylen = keylen;
|
||||
|
||||
ctx->key_params.key_dma_addr = dma_map_single(
|
||||
&ctx->drvdata->plat_dev->dev,
|
||||
(void *)key,
|
||||
dev, (void *)key,
|
||||
keylen, DMA_TO_DEVICE);
|
||||
if (unlikely(dma_mapping_error(&ctx->drvdata->plat_dev->dev,
|
||||
ctx->key_params.key_dma_addr))) {
|
||||
if (unlikely(dma_mapping_error(dev, ctx->key_params.key_dma_addr))) {
|
||||
SSI_LOG_ERR("Mapping key va=0x%p len=%u for"
|
||||
" DMA failed\n", key, keylen);
|
||||
return -ENOMEM;
|
||||
|
@ -1226,8 +1225,7 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash,
|
|||
if (rc != 0)
|
||||
crypto_ahash_set_flags(ahash, CRYPTO_TFM_RES_BAD_KEY_LEN);
|
||||
|
||||
dma_unmap_single(&ctx->drvdata->plat_dev->dev,
|
||||
ctx->key_params.key_dma_addr,
|
||||
dma_unmap_single(dev, ctx->key_params.key_dma_addr,
|
||||
ctx->key_params.keylen, DMA_TO_DEVICE);
|
||||
SSI_LOG_DEBUG("Unmapped key-buffer: key_dma_addr=%pad keylen=%u\n",
|
||||
ctx->key_params.key_dma_addr,
|
||||
|
@ -1241,6 +1239,7 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash,
|
|||
const u8 *key, unsigned int keylen)
|
||||
{
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash);
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
|
||||
SSI_LOG_DEBUG("===== setkey (%d) ====\n", keylen);
|
||||
|
||||
|
@ -1259,16 +1258,14 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash,
|
|||
|
||||
/* STAT_PHASE_1: Copy key to ctx */
|
||||
|
||||
dma_sync_single_for_cpu(&ctx->drvdata->plat_dev->dev,
|
||||
ctx->opad_tmp_keys_dma_addr,
|
||||
dma_sync_single_for_cpu(dev, ctx->opad_tmp_keys_dma_addr,
|
||||
keylen, DMA_TO_DEVICE);
|
||||
|
||||
memcpy(ctx->opad_tmp_keys_buff, key, keylen);
|
||||
if (keylen == 24)
|
||||
memset(ctx->opad_tmp_keys_buff + 24, 0, CC_AES_KEY_SIZE_MAX - 24);
|
||||
|
||||
dma_sync_single_for_device(&ctx->drvdata->plat_dev->dev,
|
||||
ctx->opad_tmp_keys_dma_addr,
|
||||
dma_sync_single_for_device(dev, ctx->opad_tmp_keys_dma_addr,
|
||||
keylen, DMA_TO_DEVICE);
|
||||
|
||||
ctx->key_params.keylen = keylen;
|
||||
|
@ -1279,7 +1276,7 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash,
|
|||
|
||||
static void ssi_hash_free_ctx(struct ssi_hash_ctx *ctx)
|
||||
{
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
|
||||
if (ctx->digest_buff_dma_addr != 0) {
|
||||
dma_unmap_single(dev, ctx->digest_buff_dma_addr,
|
||||
|
@ -1304,7 +1301,7 @@ static void ssi_hash_free_ctx(struct ssi_hash_ctx *ctx)
|
|||
|
||||
static int ssi_hash_alloc_ctx(struct ssi_hash_ctx *ctx)
|
||||
{
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
|
||||
ctx->key_params.keylen = 0;
|
||||
|
||||
|
@ -1371,7 +1368,7 @@ static int ssi_mac_update(struct ahash_request *req)
|
|||
struct ahash_req_ctx *state = ahash_request_ctx(req);
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm);
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
unsigned int block_size = crypto_tfm_alg_blocksize(&tfm->base);
|
||||
struct ssi_crypto_req ssi_req = {};
|
||||
struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
|
||||
|
@ -1431,7 +1428,7 @@ static int ssi_mac_final(struct ahash_request *req)
|
|||
struct ahash_req_ctx *state = ahash_request_ctx(req);
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm);
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
struct ssi_crypto_req ssi_req = {};
|
||||
struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
|
||||
int idx = 0;
|
||||
|
@ -1542,7 +1539,7 @@ static int ssi_mac_finup(struct ahash_request *req)
|
|||
struct ahash_req_ctx *state = ahash_request_ctx(req);
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm);
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
struct ssi_crypto_req ssi_req = {};
|
||||
struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
|
||||
int idx = 0;
|
||||
|
@ -1613,7 +1610,7 @@ static int ssi_mac_digest(struct ahash_request *req)
|
|||
struct ahash_req_ctx *state = ahash_request_ctx(req);
|
||||
struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(tfm);
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
u32 digestsize = crypto_ahash_digestsize(tfm);
|
||||
struct ssi_crypto_req ssi_req = {};
|
||||
struct cc_hw_desc desc[SSI_MAX_AHASH_SEQ_LEN];
|
||||
|
@ -1737,7 +1734,7 @@ static int ssi_ahash_export(struct ahash_request *req, void *out)
|
|||
{
|
||||
struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash);
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
struct ahash_req_ctx *state = ahash_request_ctx(req);
|
||||
u8 *curr_buff = state->buff_index ? state->buff1 : state->buff0;
|
||||
u32 curr_buff_cnt = state->buff_index ? state->buff1_cnt :
|
||||
|
@ -1778,7 +1775,7 @@ static int ssi_ahash_import(struct ahash_request *req, const void *in)
|
|||
{
|
||||
struct crypto_ahash *ahash = crypto_ahash_reqtfm(req);
|
||||
struct ssi_hash_ctx *ctx = crypto_ahash_ctx(ahash);
|
||||
struct device *dev = &ctx->drvdata->plat_dev->dev;
|
||||
struct device *dev = drvdata_to_dev(ctx->drvdata);
|
||||
struct ahash_req_ctx *state = ahash_request_ctx(req);
|
||||
u32 tmp;
|
||||
int rc;
|
||||
|
|
|
@ -121,16 +121,17 @@ int ssi_power_mgr_init(struct ssi_drvdata *drvdata)
|
|||
{
|
||||
int rc = 0;
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
struct platform_device *plat_dev = drvdata->plat_dev;
|
||||
struct device *dev = drvdata_to_dev(drvdata);
|
||||
|
||||
/* must be before the enabling to avoid resdundent suspending */
|
||||
pm_runtime_set_autosuspend_delay(&plat_dev->dev, SSI_SUSPEND_TIMEOUT);
|
||||
pm_runtime_use_autosuspend(&plat_dev->dev);
|
||||
pm_runtime_set_autosuspend_delay(dev, SSI_SUSPEND_TIMEOUT);
|
||||
pm_runtime_use_autosuspend(dev);
|
||||
/* activate the PM module */
|
||||
rc = pm_runtime_set_active(&plat_dev->dev);
|
||||
rc = pm_runtime_set_active(dev);
|
||||
if (rc != 0)
|
||||
return rc;
|
||||
/* enable the PM module*/
|
||||
pm_runtime_enable(&plat_dev->dev);
|
||||
pm_runtime_enable(dev);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
|
@ -138,8 +139,6 @@ int ssi_power_mgr_init(struct ssi_drvdata *drvdata)
|
|||
void ssi_power_mgr_fini(struct ssi_drvdata *drvdata)
|
||||
{
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
struct platform_device *plat_dev = drvdata->plat_dev;
|
||||
|
||||
pm_runtime_disable(&plat_dev->dev);
|
||||
pm_runtime_disable(drvdata_to_dev(drvdata));
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -68,13 +68,13 @@ static void comp_work_handler(struct work_struct *work);
|
|||
void request_mgr_fini(struct ssi_drvdata *drvdata)
|
||||
{
|
||||
struct ssi_request_mgr_handle *req_mgr_h = drvdata->request_mgr_handle;
|
||||
struct device *dev = drvdata_to_dev(drvdata);
|
||||
|
||||
if (!req_mgr_h)
|
||||
return; /* Not allocated */
|
||||
|
||||
if (req_mgr_h->dummy_comp_buff_dma != 0) {
|
||||
dma_free_coherent(&drvdata->plat_dev->dev,
|
||||
sizeof(u32), req_mgr_h->dummy_comp_buff,
|
||||
dma_free_coherent(dev, sizeof(u32), req_mgr_h->dummy_comp_buff,
|
||||
req_mgr_h->dummy_comp_buff_dma);
|
||||
}
|
||||
|
||||
|
@ -97,6 +97,7 @@ void request_mgr_fini(struct ssi_drvdata *drvdata)
|
|||
int request_mgr_init(struct ssi_drvdata *drvdata)
|
||||
{
|
||||
struct ssi_request_mgr_handle *req_mgr_h;
|
||||
struct device *dev = drvdata_to_dev(drvdata);
|
||||
int rc = 0;
|
||||
|
||||
req_mgr_h = kzalloc(sizeof(*req_mgr_h), GFP_KERNEL);
|
||||
|
@ -134,8 +135,7 @@ int request_mgr_init(struct ssi_drvdata *drvdata)
|
|||
req_mgr_h->max_used_sw_slots = 0;
|
||||
|
||||
/* Allocate DMA word for "dummy" completion descriptor use */
|
||||
req_mgr_h->dummy_comp_buff = dma_alloc_coherent(&drvdata->plat_dev->dev,
|
||||
sizeof(u32),
|
||||
req_mgr_h->dummy_comp_buff = dma_alloc_coherent(dev, sizeof(u32),
|
||||
&req_mgr_h->dummy_comp_buff_dma,
|
||||
GFP_KERNEL);
|
||||
if (!req_mgr_h->dummy_comp_buff) {
|
||||
|
@ -269,6 +269,9 @@ int send_request(
|
|||
unsigned int iv_seq_len = 0;
|
||||
unsigned int total_seq_len = len; /*initial sequence length*/
|
||||
struct cc_hw_desc iv_seq[SSI_IVPOOL_SEQ_LEN];
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
struct device *dev = drvdata_to_dev(drvdata);
|
||||
#endif
|
||||
int rc;
|
||||
unsigned int max_required_seq_len = (total_seq_len +
|
||||
((ssi_req->ivgen_dma_addr_len == 0) ? 0 :
|
||||
|
@ -276,7 +279,7 @@ int send_request(
|
|||
((is_dout == 0) ? 1 : 0));
|
||||
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
rc = ssi_power_mgr_runtime_get(&drvdata->plat_dev->dev);
|
||||
rc = ssi_power_mgr_runtime_get(dev);
|
||||
if (rc != 0) {
|
||||
SSI_LOG_ERR("ssi_power_mgr_runtime_get returned %x\n", rc);
|
||||
return rc;
|
||||
|
@ -303,7 +306,7 @@ int send_request(
|
|||
* (SW queue is full)
|
||||
*/
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
ssi_power_mgr_runtime_put_suspend(&drvdata->plat_dev->dev);
|
||||
ssi_power_mgr_runtime_put_suspend(dev);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
|
@ -339,7 +342,7 @@ int send_request(
|
|||
SSI_LOG_ERR("Failed to generate IV (rc=%d)\n", rc);
|
||||
spin_unlock_bh(&req_mgr_h->hw_lock);
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
ssi_power_mgr_runtime_put_suspend(&drvdata->plat_dev->dev);
|
||||
ssi_power_mgr_runtime_put_suspend(dev);
|
||||
#endif
|
||||
return rc;
|
||||
}
|
||||
|
@ -452,7 +455,7 @@ static void comp_work_handler(struct work_struct *work)
|
|||
static void proc_completions(struct ssi_drvdata *drvdata)
|
||||
{
|
||||
struct ssi_crypto_req *ssi_req;
|
||||
struct platform_device *plat_dev = drvdata->plat_dev;
|
||||
struct device *dev = drvdata_to_dev(drvdata);
|
||||
struct ssi_request_mgr_handle *request_mgr_handle =
|
||||
drvdata->request_mgr_handle;
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
|
@ -492,12 +495,13 @@ static void proc_completions(struct ssi_drvdata *drvdata)
|
|||
#endif /* COMPLETION_DELAY */
|
||||
|
||||
if (likely(ssi_req->user_cb))
|
||||
ssi_req->user_cb(&plat_dev->dev, ssi_req->user_arg, drvdata->cc_base);
|
||||
ssi_req->user_cb(dev, ssi_req->user_arg,
|
||||
drvdata->cc_base);
|
||||
request_mgr_handle->req_queue_tail = (request_mgr_handle->req_queue_tail + 1) & (MAX_REQUEST_QUEUE_SIZE - 1);
|
||||
SSI_LOG_DEBUG("Dequeue request tail=%u\n", request_mgr_handle->req_queue_tail);
|
||||
SSI_LOG_DEBUG("Request completed. axi_completed=%d\n", request_mgr_handle->axi_completed);
|
||||
#if defined(CONFIG_PM_RUNTIME) || defined(CONFIG_PM_SLEEP)
|
||||
rc = ssi_power_mgr_runtime_put_suspend(&plat_dev->dev);
|
||||
rc = ssi_power_mgr_runtime_put_suspend(dev);
|
||||
if (rc != 0)
|
||||
SSI_LOG_ERR("Failed to set runtime suspension %d\n", rc);
|
||||
#endif
|
||||
|
|
Loading…
Reference in New Issue