Documentation: DT: Add entry for FSL Management Complex
This patch adds a devicetree binding documentation for FSL's Management Complex. Management Complex is a hardware resource manager that manages specialized hardware objects used in network-oriented packet processing applications Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Olof Johansson <olof@lixom.net>
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* Freescale Management Complex
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The Freescale Management Complex (fsl-mc) is a hardware resource
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manager that manages specialized hardware objects used in
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network-oriented packet processing applications. After the fsl-mc
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block is enabled, pools of hardware resources are available, such as
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queues, buffer pools, I/O interfaces. These resources are building
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blocks that can be used to create functional hardware objects/devices
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such as network interfaces, crypto accelerator instances, L2 switches,
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etc.
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Required properties:
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- compatible
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Value type: <string>
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Definition: Must be "fsl,qoriq-mc". A Freescale Management Complex
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compatible with this binding must have Block Revision
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Registers BRR1 and BRR2 at offset 0x0BF8 and 0x0BFC in
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the MC control register region.
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- reg
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies one or two regions
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defining the MC's registers:
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-the first region is the command portal for the
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this machine and must always be present
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-the second region is the MC control registers. This
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region may not be present in some scenarios, such
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as in the device tree presented to a virtual machine.
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Example:
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fsl_mc: fsl-mc@80c000000 {
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compatible = "fsl,qoriq-mc";
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reg = <0x00000008 0x0c000000 0 0x40>, /* MC portal base */
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<0x00000000 0x08340000 0 0x40000>; /* MC control reg */
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};
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