PCI: Cache PRI and PASID bits in pci_dev
Device drivers need to check if an IOMMU enabled ATS, PRI and PASID in order to know when they can use the SVM API. Cache PRI and PASID bits in the pci_dev structure, similarly to what is currently done for ATS. Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -153,6 +153,9 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
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u32 max_requests;
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u32 max_requests;
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int pos;
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int pos;
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if (WARN_ON(pdev->pri_enabled))
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return -EBUSY;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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if (!pos)
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if (!pos)
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return -EINVAL;
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return -EINVAL;
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@ -170,6 +173,8 @@ int pci_enable_pri(struct pci_dev *pdev, u32 reqs)
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control |= PCI_PRI_CTRL_ENABLE;
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control |= PCI_PRI_CTRL_ENABLE;
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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pdev->pri_enabled = 1;
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return 0;
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return 0;
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}
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}
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EXPORT_SYMBOL_GPL(pci_enable_pri);
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EXPORT_SYMBOL_GPL(pci_enable_pri);
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@ -185,6 +190,9 @@ void pci_disable_pri(struct pci_dev *pdev)
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u16 control;
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u16 control;
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int pos;
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int pos;
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if (WARN_ON(!pdev->pri_enabled))
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return;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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if (!pos)
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if (!pos)
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return;
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return;
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@ -192,6 +200,8 @@ void pci_disable_pri(struct pci_dev *pdev)
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pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
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pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control);
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control &= ~PCI_PRI_CTRL_ENABLE;
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control &= ~PCI_PRI_CTRL_ENABLE;
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control);
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pdev->pri_enabled = 0;
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}
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}
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EXPORT_SYMBOL_GPL(pci_disable_pri);
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EXPORT_SYMBOL_GPL(pci_disable_pri);
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@ -207,6 +217,9 @@ int pci_reset_pri(struct pci_dev *pdev)
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u16 control;
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u16 control;
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int pos;
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int pos;
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if (WARN_ON(pdev->pri_enabled))
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return -EBUSY;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
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if (!pos)
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if (!pos)
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return -EINVAL;
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return -EINVAL;
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@ -239,6 +252,9 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
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u16 control, supported;
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u16 control, supported;
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int pos;
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int pos;
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if (WARN_ON(pdev->pasid_enabled))
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return -EBUSY;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
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if (!pos)
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if (!pos)
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return -EINVAL;
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return -EINVAL;
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@ -259,6 +275,8 @@ int pci_enable_pasid(struct pci_dev *pdev, int features)
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pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
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pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
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pdev->pasid_enabled = 1;
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return 0;
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return 0;
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}
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}
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EXPORT_SYMBOL_GPL(pci_enable_pasid);
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EXPORT_SYMBOL_GPL(pci_enable_pasid);
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@ -273,11 +291,16 @@ void pci_disable_pasid(struct pci_dev *pdev)
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u16 control = 0;
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u16 control = 0;
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int pos;
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int pos;
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if (WARN_ON(!pdev->pasid_enabled))
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return;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID);
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if (!pos)
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if (!pos)
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return;
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return;
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pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
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pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control);
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pdev->pasid_enabled = 0;
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}
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}
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EXPORT_SYMBOL_GPL(pci_disable_pasid);
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EXPORT_SYMBOL_GPL(pci_disable_pasid);
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@ -356,6 +356,8 @@ struct pci_dev {
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unsigned int msix_enabled:1;
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unsigned int msix_enabled:1;
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unsigned int ari_enabled:1; /* ARI forwarding */
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unsigned int ari_enabled:1; /* ARI forwarding */
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unsigned int ats_enabled:1; /* Address Translation Service */
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unsigned int ats_enabled:1; /* Address Translation Service */
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unsigned int pasid_enabled:1; /* Process Address Space ID */
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unsigned int pri_enabled:1; /* Page Request Interface */
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unsigned int is_managed:1;
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unsigned int is_managed:1;
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unsigned int needs_freset:1; /* Dev requires fundamental reset */
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unsigned int needs_freset:1; /* Dev requires fundamental reset */
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unsigned int state_saved:1;
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unsigned int state_saved:1;
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