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m68knommu: make 520x QSPI platform addressing consistent 

If we make all QSPI (SPI protocol) addressing consistent across all ColdFire
family members then we will be able to remove the duplicated plaform data
and code and use a single setup for all.

So modify the ColdFire 520x QSPI addressing so that:

. base addresses are absolute (not relative to MBAR peripheral register)
. use a common name for IRQs used
. move chip select definitions (CS) to appropriate header

Signed-off-by: Greg Ungerer <gerg@uclinux.org>
This commit is contained in:
Greg Ungerer 2011-12-24 12:32:52 +10:00
parent b7ce7f0d0e
commit a4e2e2ac08
3 changed files with 16 additions and 10 deletions
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12
arch/m68k/include/asm/m520xsim.h
View File

@ -61,6 +61,8 @@
#define MCF_IRQ_FECTX0 (MCFINT_VECBASE + MCFINT_FECTX0)
#define MCF_IRQ_FECENTC0 (MCFINT_VECBASE + MCFINT_FECENTC0)
#define MCF_IRQ_QSPI (MCFINT_VECBASE + MCFINT_QSPI)
/*
* SDRAM configuration registers.
*/
@ -165,6 +167,16 @@
#define MCFFEC_BASE0 0xFC030000 /* Base of FEC ethernet */
#define MCFFEC_SIZE0 0x800 /* Register set size */
/*
* QSPI module.
*/
#define MCFQSPI_BASE 0xFC05C000 /* Base of QSPI module */
#define MCFQSPI_SIZE 0x40 /* Register set size */
#define MCFQSPI_CS0 46
#define MCFQSPI_CS1 47
#define MCFQSPI_CS2 27
/*
* Reset Control Unit.
*/

2
arch/m68k/include/asm/mcfqspi.h
View File

@ -25,8 +25,6 @@
#define MCFQSPI_IOBASE (MCF_IPSBAR + 0x340)
#elif defined(CONFIG_M5249)
#define MCFQSPI_IOBASE (MCF_MBAR + 0x300)
#elif defined(CONFIG_M520x)
#define MCFQSPI_IOBASE 0xFC05C000
#elif defined(CONFIG_M532x)
#define MCFQSPI_IOBASE 0xFC058000
#endif

12
arch/m68k/platform/520x/config.c
View File

@ -28,21 +28,17 @@
#if defined(CONFIG_SPI_COLDFIRE_QSPI) || defined(CONFIG_SPI_COLDFIRE_QSPI_MODULE)
static struct resource m520x_qspi_resources[] = {
{
.start = MCFQSPI_IOBASE,
.end = MCFQSPI_IOBASE + MCFQSPI_IOSIZE - 1,
.start = MCFQSPI_BASE,
.end = MCFQSPI_BASE + MCFQSPI_SIZE - 1,
.flags = IORESOURCE_MEM,
},
{
.start = MCFINT_VECBASE + MCFINT_QSPI,
.end = MCFINT_VECBASE + MCFINT_QSPI,
.start = MCF_IRQ_QSPI,
.end = MCF_IRQ_QSPI,
.flags = IORESOURCE_IRQ,
},
};
#define MCFQSPI_CS0 46
#define MCFQSPI_CS1 47
#define MCFQSPI_CS2 27
static int m520x_cs_setup(struct mcfqspi_cs_control *cs_control)
{
int status;