ks8851: Low level functions for read/write to companion eeprom
Low-level functions provide 16bits words read and write capability to ks8851 companion eeprom. Signed-off-by: Sebastien Jan <s-jan@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sebastien Jan
David S. Miller
parent
7d9974666e
commit
a4bdfff744
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@ -1034,6 +1034,234 @@ static const struct net_device_ops ks8851_netdev_ops = {
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.ndo_validate_addr = eth_validate_addr,
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};
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/* Companion eeprom access */
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enum { /* EEPROM programming states */
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EEPROM_CONTROL,
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EEPROM_ADDRESS,
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EEPROM_DATA,
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EEPROM_COMPLETE
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};
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/**
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* ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
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* @dev: The network device the PHY is on.
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* @addr: EEPROM address to read
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*
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* eeprom_size: used to define the data coding length. Can be changed
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* through debug-fs.
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*
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* Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
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* Warning: The READ feature is not supported on ks8851 revision 0.
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*
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* Rough programming model:
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* - on period start: set clock high and read value on bus
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* - on period / 2: set clock low and program value on bus
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* - start on period / 2
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*/
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unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
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{
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struct ks8851_net *ks = netdev_priv(dev);
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int eepcr;
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int ctrl = EEPROM_OP_READ;
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int state = EEPROM_CONTROL;
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int bit_count = EEPROM_OP_LEN - 1;
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unsigned int data = 0;
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int dummy;
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unsigned int addr_len;
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addr_len = (ks->eeprom_size == 128) ? 6 : 8;
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/* start transaction: chip select high, authorize write */
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mutex_lock(&ks->lock);
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eepcr = EEPCR_EESA | EEPCR_EESRWA;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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eepcr |= EEPCR_EECS;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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while (state != EEPROM_COMPLETE) {
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/* falling clock period starts... */
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/* set EED_IO pin for control and address */
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eepcr &= ~EEPCR_EEDO;
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switch (state) {
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case EEPROM_CONTROL:
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eepcr |= ((ctrl >> bit_count) & 1) << 2;
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if (bit_count-- <= 0) {
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bit_count = addr_len - 1;
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state = EEPROM_ADDRESS;
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}
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break;
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case EEPROM_ADDRESS:
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eepcr |= ((addr >> bit_count) & 1) << 2;
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bit_count--;
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break;
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case EEPROM_DATA:
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/* Change to receive mode */
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eepcr &= ~EEPCR_EESRWA;
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break;
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}
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/* lower clock */
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eepcr &= ~EEPCR_EESCK;
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mutex_lock(&ks->lock);
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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/* waitread period / 2 */
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udelay(EEPROM_SK_PERIOD / 2);
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/* rising clock period starts... */
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/* raise clock */
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mutex_lock(&ks->lock);
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eepcr |= EEPCR_EESCK;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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/* Manage read */
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switch (state) {
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case EEPROM_ADDRESS:
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if (bit_count < 0) {
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bit_count = EEPROM_DATA_LEN - 1;
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state = EEPROM_DATA;
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}
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break;
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case EEPROM_DATA:
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mutex_lock(&ks->lock);
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dummy = ks8851_rdreg16(ks, KS_EEPCR);
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mutex_unlock(&ks->lock);
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data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
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if (bit_count-- <= 0)
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state = EEPROM_COMPLETE;
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break;
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}
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/* wait period / 2 */
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udelay(EEPROM_SK_PERIOD / 2);
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}
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/* close transaction */
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mutex_lock(&ks->lock);
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eepcr &= ~EEPCR_EECS;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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eepcr = 0;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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return data;
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}
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/**
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* ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
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* @dev: The network device the PHY is on.
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* @op: operand (can be WRITE, EWEN, EWDS)
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* @addr: EEPROM address to write
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* @data: data to write
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*
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* eeprom_size: used to define the data coding length. Can be changed
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* through debug-fs.
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*
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* Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
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*
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* Note that a write enable is required before writing data.
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*
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* Rough programming model:
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* - on period start: set clock high
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* - on period / 2: set clock low and program value on bus
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* - start on period / 2
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*/
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void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
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unsigned int addr, unsigned int data)
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{
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struct ks8851_net *ks = netdev_priv(dev);
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int eepcr;
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int state = EEPROM_CONTROL;
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int bit_count = EEPROM_OP_LEN - 1;
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unsigned int addr_len;
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addr_len = (ks->eeprom_size == 128) ? 6 : 8;
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switch (op) {
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case EEPROM_OP_EWEN:
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addr = 0x30;
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break;
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case EEPROM_OP_EWDS:
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addr = 0;
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break;
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}
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/* start transaction: chip select high, authorize write */
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mutex_lock(&ks->lock);
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eepcr = EEPCR_EESA | EEPCR_EESRWA;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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eepcr |= EEPCR_EECS;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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while (state != EEPROM_COMPLETE) {
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/* falling clock period starts... */
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/* set EED_IO pin for control and address */
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eepcr &= ~EEPCR_EEDO;
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switch (state) {
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case EEPROM_CONTROL:
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eepcr |= ((op >> bit_count) & 1) << 2;
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if (bit_count-- <= 0) {
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bit_count = addr_len - 1;
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state = EEPROM_ADDRESS;
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}
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break;
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case EEPROM_ADDRESS:
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eepcr |= ((addr >> bit_count) & 1) << 2;
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if (bit_count-- <= 0) {
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if (op == EEPROM_OP_WRITE) {
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bit_count = EEPROM_DATA_LEN - 1;
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state = EEPROM_DATA;
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} else {
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state = EEPROM_COMPLETE;
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}
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}
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break;
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case EEPROM_DATA:
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eepcr |= ((data >> bit_count) & 1) << 2;
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if (bit_count-- <= 0)
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state = EEPROM_COMPLETE;
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break;
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}
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/* lower clock */
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eepcr &= ~EEPCR_EESCK;
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mutex_lock(&ks->lock);
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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/* wait period / 2 */
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udelay(EEPROM_SK_PERIOD / 2);
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/* rising clock period starts... */
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/* raise clock */
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eepcr |= EEPCR_EESCK;
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mutex_lock(&ks->lock);
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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/* wait period / 2 */
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udelay(EEPROM_SK_PERIOD / 2);
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}
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/* close transaction */
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mutex_lock(&ks->lock);
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eepcr &= ~EEPCR_EECS;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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eepcr = 0;
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ks8851_wrreg16(ks, KS_EEPCR, eepcr);
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mutex_unlock(&ks->lock);
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}
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/* ethtool support */
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static void ks8851_get_drvinfo(struct net_device *dev,
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@ -25,12 +25,24 @@
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#define OBCR_ODS_16mA (1 << 6)
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#define KS_EEPCR 0x22
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#define EEPCR_EESRWA (1 << 5)
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#define EEPCR_EESA (1 << 4)
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#define EEPCR_EESB (1 << 3)
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#define EEPCR_EESB_OFFSET 3
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#define EEPCR_EESB (1 << EEPCR_EESB_OFFSET)
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#define EEPCR_EEDO (1 << 2)
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#define EEPCR_EESCK (1 << 1)
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#define EEPCR_EECS (1 << 0)
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#define EEPROM_OP_LEN 3 /* bits:*/
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#define EEPROM_OP_READ 0x06
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#define EEPROM_OP_EWEN 0x04
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#define EEPROM_OP_WRITE 0x05
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#define EEPROM_OP_EWDS 0x14
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#define EEPROM_DATA_LEN 16 /* 16 bits EEPROM */
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#define EEPROM_WRITE_TIME 4 /* wrt ack time in ms */
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#define EEPROM_SK_PERIOD 400 /* in us */
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#define KS_MBIR 0x24
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#define MBIR_TXMBF (1 << 12)
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#define MBIR_TXMBFA (1 << 11)
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