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i.MX device tree updates for 4.12: 

- New board support: I2SE's i.MX28 Duckbill-2 boards, Gateworks Ventana
    i.MX6 GW5903/GW5904, Zodiac Inflight Innovations RDU2 board, Engicam
    i.CoreM6 Quad/Dual OpenFrame modules, Boundary Device i.MX6 Quad Plus
    SOM.
  - Improve compatible string for i.MX50 eSDHC, i.MX7S SRC devices and
    i.MX6SX UART device.
  - Add interrupts for switch and PHY devices on VF610 ZII Devel C board.
  - Add LVDS, LCD backlight, touchscreen and SAI2 support for i.MX6
    icore, geam, and isiot boards.
  - A series from Lucas Stach to improve i.MX6Q Plus device tree and add
    PRE/PRG devices.
  - A series from Stefan Agner to update imx7-colibri device tree
    regarding to display, PMIC/regulator support.
  - Fix PCI bus DTC warnings seen with the latest compiler.
  - Set default phy_type and dr_mode for i.MX25 USBOTG port.
  - A couple of small improvements on i.MX25 pin function DT header.
  - Add audio support for imx6q-cm-fx6 board using Wolfson wm8731 codec
    which is muxed to SSI2 device.
  - Other random updates, small fixes and trivial cleanups.
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Merge tag 'imx-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

i.MX device tree updates for 4.12:
 - New board support: I2SE's i.MX28 Duckbill-2 boards, Gateworks Ventana
   i.MX6 GW5903/GW5904, Zodiac Inflight Innovations RDU2 board, Engicam
   i.CoreM6 Quad/Dual OpenFrame modules, Boundary Device i.MX6 Quad Plus
   SOM.
 - Improve compatible string for i.MX50 eSDHC, i.MX7S SRC devices and
   i.MX6SX UART device.
 - Add interrupts for switch and PHY devices on VF610 ZII Devel C board.
 - Add LVDS, LCD backlight, touchscreen and SAI2 support for i.MX6
   icore, geam, and isiot boards.
 - A series from Lucas Stach to improve i.MX6Q Plus device tree and add
   PRE/PRG devices.
 - A series from Stefan Agner to update imx7-colibri device tree
   regarding to display, PMIC/regulator support.
 - Fix PCI bus DTC warnings seen with the latest compiler.
 - Set default phy_type and dr_mode for i.MX25 USBOTG port.
 - A couple of small improvements on i.MX25 pin function DT header.
 - Add audio support for imx6q-cm-fx6 board using Wolfson wm8731 codec
   which is muxed to SSI2 device.
 - Other random updates, small fixes and trivial cleanups.

* tag 'imx-dt-4.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
  ARM: dts: imx6q-utilite-pro: add hpd gpio
  ARM: dts: imx6qp-sabresd: Set reg_arm regulator supply
  ARM: dts: imx6qdl-sabresd: Set LDO regulator supply
  ARM: dts: imx: add Gateworks Ventana GW5903 support
  ARM: dts: i.MX25: add AIPS control registers
  ARM: dts: imx7-colibri: add Carrier Board 3.3V/5V regulators
  ARM: dts: imx7-colibri: remove 1.8V fixed regulator
  ARM: dts: imx7-colibri: allow to disable Ethernet rail
  ARM: dts: imx7-colibri: fix PMIC voltages
  ARM: dts: imx7-colibri: use OF graph to describe the display
  ARM: dts: imx6qp-nitrogen6_som2: add Quad Plus variant of the SOM
  ARM: dts: imx6q-icore: Add touchscreen node
  ARM: dts: vf610-zii-dev-rev-b: change switch2 label
  ARM: dts: imx6ul-[geam|isiot]: Add sai2 node
  ARM: dts: imx6ul-isiot-common: Add touchscreen node
  ARM: dts: imx6ul-isiot: Add i2c nodes
  ARM: dts: imx6ul-isiot: Add imx6ul-isiot-common.dtsi
  ARM: dts: imx6ul-isiot: Add backlight support for lcdif
  ARM: dts: imx6ul-geam: Add backlight support for lcdif
  ARM: dts: imx6: add ZII RDU2 boards
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2017-04-19 06:45:59 -07:00
parent b633b31406 e48d9e7154
commit a43315e3dd
55 changed files with 4501 additions and 174 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

22
Documentation/devicetree/bindings/arm/i2se.txt Normal file
View File

@ -0,0 +1,22 @@
I2SE Device Tree Bindings
-------------------------
Duckbill Board
Required root node properties:
- compatible = "i2se,duckbill", "fsl,imx28";
Duckbill 2 Board
Required root node properties:
- compatible = "i2se,duckbill-2", "fsl,imx28";
Duckbill 2 485 Board
Required root node properties:
- compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
Duckbill 2 EnOcean Board
Required root node properties:
- compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
Duckbill 2 SPI Board
Required root node properties:
- compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";

16
arch/arm/boot/dts/Makefile
View File

@ -363,6 +363,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-gw551x.dtb \ imx6dl-gw551x.dtb \
imx6dl-gw552x.dtb \ imx6dl-gw552x.dtb \
imx6dl-gw553x.dtb \ imx6dl-gw553x.dtb \
imx6dl-gw5903.dtb \
imx6dl-gw5904.dtb \
imx6dl-hummingboard.dtb \ imx6dl-hummingboard.dtb \
imx6dl-icore.dtb \ imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \ imx6dl-icore-rqs.dtb \
@ -406,9 +408,13 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-gw551x.dtb \ imx6q-gw551x.dtb \
imx6q-gw552x.dtb \ imx6q-gw552x.dtb \
imx6q-gw553x.dtb \ imx6q-gw553x.dtb \
imx6q-gw5903.dtb \
imx6q-gw5904.dtb \
imx6q-h100.dtb \ imx6q-h100.dtb \
imx6q-hummingboard.dtb \ imx6q-hummingboard.dtb \
imx6q-icore.dtb \ imx6q-icore.dtb \
imx6q-icore-ofcap10.dtb \
imx6q-icore-ofcap12.dtb \
imx6q-icore-rqs.dtb \ imx6q-icore-rqs.dtb \
imx6q-marsboard.dtb \ imx6q-marsboard.dtb \
imx6q-mccmon6.dtb \ imx6q-mccmon6.dtb \
@ -436,9 +442,12 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-utilite-pro.dtb \ imx6q-utilite-pro.dtb \
imx6q-wandboard.dtb \ imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb \ imx6q-wandboard-revb1.dtb \
imx6q-zii-rdu2.dtb \
imx6qp-nitrogen6_max.dtb \ imx6qp-nitrogen6_max.dtb \
imx6qp-nitrogen6_som2.dtb \
imx6qp-sabreauto.dtb \ imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb imx6qp-sabresd.dtb \
imx6qp-zii-rdu2.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \ dtb-$(CONFIG_SOC_IMX6SL) += \
imx6sl-evk.dtb \ imx6sl-evk.dtb \
imx6sl-warp.dtb imx6sl-warp.dtb
@ -469,6 +478,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-nitrogen7.dtb \ imx7d-nitrogen7.dtb \
imx7d-sbc-imx7.dtb \ imx7d-sbc-imx7.dtb \
imx7d-sdb.dtb \ imx7d-sdb.dtb \
imx7d-sdb-sht11.dtb \
imx7s-colibri-eval-v3.dtb \ imx7s-colibri-eval-v3.dtb \
imx7s-warp.dtb imx7s-warp.dtb
dtb-$(CONFIG_SOC_LS1021A) += \ dtb-$(CONFIG_SOC_LS1021A) += \
@ -499,6 +509,10 @@ dtb-$(CONFIG_ARCH_MXS) += \
imx28-cfa10056.dtb \ imx28-cfa10056.dtb \
imx28-cfa10057.dtb \ imx28-cfa10057.dtb \
imx28-cfa10058.dtb \ imx28-cfa10058.dtb \
imx28-duckbill-2-485.dtb \
imx28-duckbill-2.dtb \
imx28-duckbill-2-enocean.dtb \
imx28-duckbill-2-spi.dtb \
imx28-duckbill.dtb \ imx28-duckbill.dtb \
imx28-eukrea-mbmx283lc.dtb \ imx28-eukrea-mbmx283lc.dtb \
imx28-eukrea-mbmx287lc.dtb \ imx28-eukrea-mbmx287lc.dtb \

2
arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts
View File

@ -179,8 +179,6 @@
}; };
&usbotg { &usbotg {
phy_type = "utmi";
dr_mode = "otg";
external-vbus-divider; external-vbus-divider;
status = "okay"; status = "okay";
}; };

2
arch/arm/boot/dts/imx25-pdk.dts
View File

@ -309,8 +309,6 @@
}; };
&usbotg { &usbotg {
phy_type = "utmi";
dr_mode = "otg";
external-vbus-divider; external-vbus-divider;
status = "okay"; status = "okay";
}; };

5
arch/arm/boot/dts/imx25-pinfunc.h
View File

@ -17,8 +17,6 @@
* <mux_reg conf_reg input_reg mux_mode input_val> * <mux_reg conf_reg input_reg mux_mode input_val>
*/ */
#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000
#define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000 #define MX25_PAD_A10__A10 0x008 0x000 0x000 0x00 0x000
#define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000 #define MX25_PAD_A10__GPIO_4_0 0x008 0x000 0x000 0x05 0x000
@ -68,7 +66,6 @@
#define MX25_PAD_A22__A22 0x030 0x000 0x000 0x00 0x000 #define MX25_PAD_A22__A22 0x030 0x000 0x000 0x00 0x000
#define MX25_PAD_A22__GPIO_2_8 0x030 0x000 0x000 0x05 0x000 #define MX25_PAD_A22__GPIO_2_8 0x030 0x000 0x000 0x05 0x000
#define MX25_PAD_A22__FEC_TDATA2 0x030 0x000 0x000 0x07 0x000
#define MX25_PAD_A22__SIM2_VEN1 0x030 0x000 0x000 0x06 0x000 #define MX25_PAD_A22__SIM2_VEN1 0x030 0x000 0x000 0x06 0x000
#define MX25_PAD_A22__FEC_TDATA2 0x030 0x000 0x000 0x07 0x000 #define MX25_PAD_A22__FEC_TDATA2 0x030 0x000 0x000 0x07 0x000
@ -542,6 +539,8 @@
#define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x01 0x000 #define MX25_PAD_RTCK__OWIRE 0x1ec 0x3e4 0x000 0x01 0x000
#define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x05 0x000 #define MX25_PAD_RTCK__GPIO_3_14 0x1ec 0x3e4 0x000 0x05 0x000
#define MX25_PAD_TDO__TDO 0x000 0x3e8 0x000 0x00 0x000
#define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x00 0x000 #define MX25_PAD_DE_B__DE_B 0x1f0 0x3ec 0x000 0x00 0x000
#define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x05 0x000 #define MX25_PAD_DE_B__GPIO_2_20 0x1f0 0x3ec 0x000 0x05 0x000

12
arch/arm/boot/dts/imx25.dtsi
View File

@ -93,6 +93,11 @@
reg = <0x43f00000 0x100000>; reg = <0x43f00000 0x100000>;
ranges; ranges;
aips1: bridge@43f00000 {
compatible = "fsl,imx25-aips";
reg = <0x43f00000 0x4000>;
};
i2c1: i2c@43f80000 { i2c1: i2c@43f80000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -342,6 +347,11 @@
reg = <0x53f00000 0x100000>; reg = <0x53f00000 0x100000>;
ranges; ranges;
aips2: bridge@53f00000 {
compatible = "fsl,imx25-aips";
reg = <0x53f00000 0x4000>;
};
clks: ccm@53f80000 { clks: ccm@53f80000 {
compatible = "fsl,imx25-ccm"; compatible = "fsl,imx25-ccm";
reg = <0x53f80000 0x4000>; reg = <0x53f80000 0x4000>;
@ -544,6 +554,8 @@
clock-names = "ipg", "ahb", "per"; clock-names = "ipg", "ahb", "per";
fsl,usbmisc = <&usbmisc 0>; fsl,usbmisc = <&usbmisc 0>;
fsl,usbphy = <&usbphy0>; fsl,usbphy = <&usbphy0>;
phy_type = "utmi";
dr_mode = "otg";
status = "disabled"; status = "disabled";
}; };

189
arch/arm/boot/dts/imx28-duckbill-2-485.dts Normal file
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@ -0,0 +1,189 @@
/*
* Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
* Copyright (C) 2016 Michael Heimpold <mhei@heimpold.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "imx28.dtsi"
/ {
model = "I2SE Duckbill 2 485";
compatible = "i2se,duckbill-2-485", "i2se,duckbill-2", "fsl,imx28";
memory {
reg = <0x40000000 0x08000000>;
};
apb@80000000 {
apbh@80000000 {
ssp0: ssp@80010000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_8bit_pins_a
&mmc0_cd_cfg &mmc0_sck_cfg>;
bus-width = <8>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
non-removable;
};
ssp2: ssp@80014000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pins_b
&mmc2_cd_cfg &mmc2_sck_cfg_b>;
bus-width = <4>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
pinctrl@80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_D17__GPIO_1_17 /* Revision detection */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_reset_pin: mac0-phy-reset@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_ALE__GPIO_0_26 /* PHY Reset */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_int_pin: mac0-phy-int@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_D07__GPIO_0_7 /* PHY Interrupt */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
led_pins: leds@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SAIF0_MCLK__GPIO_3_20
MX28_PAD_SAIF0_LRCLK__GPIO_3_21
MX28_PAD_I2C0_SCL__GPIO_3_24
MX28_PAD_I2C0_SDA__GPIO_3_25
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
};
apbx@80040000 {
lradc@80050000 {
status = "okay";
};
auart0: serial@8006a000 {
pinctrl-names = "default";
pinctrl-0 = <&auart0_2pins_a>;
status = "okay";
};
duart: serial@80074000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>;
status = "okay";
};
usbphy0: usbphy@8007c000 {
status = "okay";
};
};
};
ahb@80080000 {
usb0: usb@80080000 {
status = "okay";
dr_mode = "peripheral";
};
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>, <&mac0_phy_reset_pin>;
phy-supply = <&reg_3p3v>;
phy-reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
phy-reset-duration = <25>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mac0_phy_int_pin>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
max-speed = <100>;
};
};
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
status-red {
label = "duckbill:red:status";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
status-green {
label = "duckbill:green:status";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
rs485-red {
label = "duckbill:red:rs485";
gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
};
rs485-green {
label = "duckbill:green:rs485";
gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
};
};
};

220
arch/arm/boot/dts/imx28-duckbill-2-enocean.dts Normal file
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@ -0,0 +1,220 @@
/*
* Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
* Copyright (C) 2016 Michael Heimpold <mhei@heimpold.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "imx28.dtsi"
/ {
model = "I2SE Duckbill 2 EnOcean";
compatible = "i2se,duckbill-2-enocean", "i2se,duckbill-2", "fsl,imx28";
memory {
reg = <0x40000000 0x08000000>;
};
apb@80000000 {
apbh@80000000 {
ssp0: ssp@80010000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_8bit_pins_a
&mmc0_cd_cfg &mmc0_sck_cfg>;
bus-width = <8>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
non-removable;
};
ssp2: ssp@80014000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pins_b
&mmc2_cd_cfg &mmc2_sck_cfg_b>;
bus-width = <4>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
pinctrl@80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_D17__GPIO_1_17 /* Revision detection */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_reset_pin: mac0-phy-reset@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_ALE__GPIO_0_26 /* PHY Reset */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_int_pin: mac0-phy-int@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_D07__GPIO_0_7 /* PHY Interrupt */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
led_pins: leds@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SAIF0_MCLK__GPIO_3_20
MX28_PAD_SAIF0_LRCLK__GPIO_3_21
MX28_PAD_AUART0_CTS__GPIO_3_2
MX28_PAD_I2C0_SCL__GPIO_3_24
MX28_PAD_I2C0_SDA__GPIO_3_25
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
enocean_button: enocean-button@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_AUART0_RTS__GPIO_3_3
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
};
apbx@80040000 {
lradc@80050000 {
status = "okay";
};
auart0: serial@8006a000 {
pinctrl-names = "default";
pinctrl-0 = <&auart0_2pins_a>;
status = "okay";
};
duart: serial@80074000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>;
status = "okay";
};
usbphy0: usbphy@8007c000 {
status = "okay";
};
};
};
ahb@80080000 {
usb0: usb@80080000 {
status = "okay";
dr_mode = "peripheral";
};
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>, <&mac0_phy_reset_pin>;
phy-supply = <&reg_3p3v>;
phy-reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
phy-reset-duration = <25>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mac0_phy_int_pin>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
max-speed = <100>;
};
};
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
status-red {
label = "duckbill:red:status";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
status-green {
label = "duckbill:green:status";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
enocean-blue {
label = "duckbill:blue:enocean";
gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
};
enocean-red {
label = "duckbill:red:enocean";
gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
};
enocean-green {
label = "duckbill:green:enocean";
gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&enocean_button>;
enocean {
label = "EnOcean";
linux,code = <KEY_NEW>;
gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
};
};
};

199
arch/arm/boot/dts/imx28-duckbill-2-spi.dts Normal file
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@ -0,0 +1,199 @@
/*
* Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
* Copyright (C) 2016 Michael Heimpold <mhei@heimpold.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "imx28.dtsi"
/ {
model = "I2SE Duckbill 2 SPI";
compatible = "i2se,duckbill-2-spi", "i2se,duckbill-2", "fsl,imx28";
aliases {
ethernet1 = &qca7000;
};
memory {
reg = <0x40000000 0x08000000>;
};
apb@80000000 {
apbh@80000000 {
ssp0: ssp@80010000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_8bit_pins_a
&mmc0_cd_cfg &mmc0_sck_cfg>;
bus-width = <8>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
non-removable;
};
ssp2: ssp@80014000 {
compatible = "fsl,imx28-spi";
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
qca7000: ethernet@0 {
reg = <0>;
compatible = "qca,qca7000";
pinctrl-names = "default";
pinctrl-0 = <&qca7000_pins>;
interrupt-parent = <&gpio3>;
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
spi-cpha;
spi-cpol;
spi-max-frequency = <8000000>;
};
};
pinctrl@80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_D17__GPIO_1_17 /* Revision detection */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_reset_pin: mac0-phy-reset@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_ALE__GPIO_0_26 /* PHY Reset */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_int_pin: mac0-phy-int@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_D07__GPIO_0_7 /* PHY Interrupt */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
led_pins: led@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SAIF0_MCLK__GPIO_3_20
MX28_PAD_SAIF0_LRCLK__GPIO_3_21
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
qca7000_pins: qca7000@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_AUART0_RTS__GPIO_3_3 /* Interrupt */
MX28_PAD_LCD_D13__GPIO_1_13 /* QCA7K reset */
MX28_PAD_LCD_D14__GPIO_1_14 /* GPIO 0 */
MX28_PAD_LCD_D15__GPIO_1_15 /* GPIO 1 */
MX28_PAD_LCD_D18__GPIO_1_18 /* GPIO 2 */
MX28_PAD_LCD_D21__GPIO_1_21 /* GPIO 3 */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
};
apbx@80040000 {
lradc@80050000 {
status = "okay";
};
duart: serial@80074000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>;
status = "okay";
};
usbphy0: usbphy@8007c000 {
status = "okay";
};
};
};
ahb@80080000 {
usb0: usb@80080000 {
status = "okay";
dr_mode = "peripheral";
};
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>, <&mac0_phy_reset_pin>;
phy-supply = <&reg_3p3v>;
phy-reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
phy-reset-duration = <25>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mac0_phy_int_pin>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
max-speed = <100>;
};
};
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
status-red {
label = "duckbill:red:status";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
status-green {
label = "duckbill:green:status";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};

183
arch/arm/boot/dts/imx28-duckbill-2.dts Normal file
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@ -0,0 +1,183 @@
/*
* Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
* Copyright (C) 2016 Michael Heimpold <mhei@heimpold.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/gpio/gpio.h>
#include "imx28.dtsi"
/ {
model = "I2SE Duckbill 2";
compatible = "i2se,duckbill-2", "fsl,imx28";
memory {
reg = <0x40000000 0x08000000>;
};
apb@80000000 {
apbh@80000000 {
ssp0: ssp@80010000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc0_8bit_pins_a
&mmc0_cd_cfg &mmc0_sck_cfg>;
bus-width = <8>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
non-removable;
};
ssp2: ssp@80014000 {
compatible = "fsl,imx28-mmc";
pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pins_b
&mmc2_cd_cfg &mmc2_sck_cfg_b>;
bus-width = <4>;
vmmc-supply = <&reg_3p3v>;
status = "okay";
};
pinctrl@80018000 {
pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>;
hog_pins_a: hog@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_LCD_D17__GPIO_1_17 /* Revision detection */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_reset_pin: mac0-phy-reset@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_ALE__GPIO_0_26 /* PHY Reset */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
mac0_phy_int_pin: mac0-phy-int@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_GPMI_D07__GPIO_0_7 /* PHY Interrupt */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
led_pins: leds@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SAIF0_MCLK__GPIO_3_20
MX28_PAD_SAIF0_LRCLK__GPIO_3_21
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
};
};
apbx@80040000 {
lradc@80050000 {
status = "okay";
};
i2c0: i2c@80058000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
};
auart0: serial@8006a000 {
pinctrl-names = "default";
pinctrl-0 = <&auart0_2pins_a>;
status = "okay";
};
duart: serial@80074000 {
pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>;
status = "okay";
};
usbphy0: usbphy@8007c000 {
status = "okay";
};
};
};
ahb@80080000 {
usb0: usb@80080000 {
status = "okay";
dr_mode = "peripheral";
};
mac0: ethernet@800f0000 {
phy-mode = "rmii";
pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>, <&mac0_phy_reset_pin>;
phy-supply = <&reg_3p3v>;
phy-reset-gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
phy-reset-duration = <25>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&mac0_phy_int_pin>;
interrupt-parent = <&gpio0>;
interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
max-speed = <100>;
};
};
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins>;
status-red {
label = "duckbill:red:status";
gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
status-green {
label = "duckbill:green:status";
gpios = <&gpio3 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
};

81
arch/arm/boot/dts/imx28-duckbill.dts
View File

@ -1,5 +1,6 @@
/* /*
* Copyright (C) 2013 Michael Heimpold <mhei@heimpold.de> * Copyright (C) 2013-2014,2016 Michael Heimpold <mhei@heimpold.de>
* Copyright (C) 2015-2017 I2SE GmbH <info@i2se.com>
* *
* The code contained herein is licensed under the GNU General Public * The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License * License. You may obtain a copy of the GNU General Public License
@ -10,6 +11,7 @@
*/ */
/dts-v1/; /dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx28.dtsi" #include "imx28.dtsi"
/ { / {
@ -32,6 +34,13 @@
status = "okay"; status = "okay";
}; };
ssp2: ssp@80014000 {
compatible = "fsl,imx28-spi";
pinctrl-names = "default";
pinctrl-0 = <&spi2_pins_a>;
status = "okay";
};
pinctrl@80018000 { pinctrl@80018000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&hog_pins_a>; pinctrl-0 = <&hog_pins_a>;
@ -39,14 +48,24 @@
hog_pins_a: hog@0 { hog_pins_a: hog@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */ MX28_PAD_LCD_D17__GPIO_1_17 /* Revision detection */
>; >;
fsl,drive-strength = <MXS_DRIVE_4mA>; fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>; fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
led_pins_a: led_gpio@0 { mac0_phy_reset_pin: mac0-phy-reset@0 {
reg = <0>;
fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA7__GPIO_2_7 /* PHY Reset */
>;
fsl,drive-strength = <MXS_DRIVE_4mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
led_pins: leds@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
MX28_PAD_AUART1_RX__GPIO_3_4 MX28_PAD_AUART1_RX__GPIO_3_4
@ -60,6 +79,22 @@
}; };
apbx@80040000 { apbx@80040000 {
lradc@80050000 {
status = "okay";
};
i2c0: i2c@80058000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins_a>;
status = "okay";
};
auart0: serial@8006a000 {
pinctrl-names = "default";
pinctrl-0 = <&auart0_2pins_a>;
status = "okay";
};
duart: serial@80074000 { duart: serial@80074000 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&duart_pins_a>; pinctrl-0 = <&duart_pins_a>;
@ -75,47 +110,43 @@
ahb@80080000 { ahb@80080000 {
usb0: usb@80080000 { usb0: usb@80080000 {
status = "okay"; status = "okay";
dr_mode = "peripheral";
}; };
mac0: ethernet@800f0000 { mac0: ethernet@800f0000 {
phy-mode = "rmii"; phy-mode = "rmii";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mac0_pins_a>; pinctrl-0 = <&mac0_pins_a>, <&mac0_phy_reset_pin>;
phy-supply = <&reg_3p3v>; phy-supply = <&reg_3p3v>;
phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; phy-reset-gpios = <&gpio2 7 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>; phy-reset-duration = <25>;
status = "okay"; status = "okay";
}; };
}; };
regulators { reg_3p3v: regulator-3p3v {
compatible = "simple-bus"; compatible = "regulator-fixed";
#address-cells = <1>; regulator-name = "3P3V";
#size-cells = <0>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
reg_3p3v: regulator@0 { regulator-always-on;
compatible = "regulator-fixed";
reg = <0>;
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
}; };
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&led_pins_a>; pinctrl-0 = <&led_pins>;
status { status-red {
label = "duckbill:green:status";
gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
};
failure {
label = "duckbill:red:status"; label = "duckbill:red:status";
gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-on";
};
status-green {
label = "duckbill:green:status";
gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
}; };
}; };
}; };

2
arch/arm/boot/dts/imx28-m28cu3.dts
View File

@ -57,7 +57,7 @@
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc2_4bit_pins_a pinctrl-0 = <&mmc2_4bit_pins_a
&mmc2_cd_cfg &mmc2_cd_cfg
&mmc2_sck_cfg>; &mmc2_sck_cfg_a>;
bus-width = <4>; bus-width = <4>;
vmmc-supply = <&reg_vddio_sd1>; vmmc-supply = <&reg_vddio_sd1>;
status = "okay"; status = "okay";

28
arch/arm/boot/dts/imx28.dtsi
View File

@ -590,6 +590,22 @@
fsl,pull-up = <MXS_PULL_ENABLE>; fsl,pull-up = <MXS_PULL_ENABLE>;
}; };
mmc2_4bit_pins_b: mmc2-4bit@1 {
reg = <1>;
fsl,pinmux-ids = <
MX28_PAD_SSP2_SCK__SSP2_SCK
MX28_PAD_SSP2_MOSI__SSP2_CMD
MX28_PAD_SSP2_MISO__SSP2_D0
MX28_PAD_SSP2_SS0__SSP2_D3
MX28_PAD_SSP2_SS1__SSP2_D1
MX28_PAD_SSP2_SS2__SSP2_D2
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
>;
fsl,drive-strength = <MXS_DRIVE_8mA>;
fsl,voltage = <MXS_VOLTAGE_HIGH>;
fsl,pull-up = <MXS_PULL_ENABLE>;
};
mmc2_cd_cfg: mmc2-cd-cfg { mmc2_cd_cfg: mmc2-cd-cfg {
fsl,pinmux-ids = < fsl,pinmux-ids = <
MX28_PAD_AUART1_RX__SSP2_CARD_DETECT MX28_PAD_AUART1_RX__SSP2_CARD_DETECT
@ -597,7 +613,8 @@
fsl,pull-up = <MXS_PULL_DISABLE>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mmc2_sck_cfg: mmc2-sck-cfg { mmc2_sck_cfg_a: mmc2-sck-cfg@0 {
reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <
MX28_PAD_SSP0_DATA7__SSP2_SCK MX28_PAD_SSP0_DATA7__SSP2_SCK
>; >;
@ -605,6 +622,15 @@
fsl,pull-up = <MXS_PULL_DISABLE>; fsl,pull-up = <MXS_PULL_DISABLE>;
}; };
mmc2_sck_cfg_b: mmc2-sck-cfg@1 {
reg = <1>;
fsl,pinmux-ids = <
MX28_PAD_SSP2_SCK__SSP2_SCK
>;
fsl,drive-strength = <MXS_DRIVE_12mA>;
fsl,pull-up = <MXS_PULL_DISABLE>;
};
i2c0_pins_a: i2c0@0 { i2c0_pins_a: i2c0@0 {
reg = <0>; reg = <0>;
fsl,pinmux-ids = < fsl,pinmux-ids = <

8
arch/arm/boot/dts/imx50.dtsi
View File

@ -109,7 +109,7 @@
ranges; ranges;
esdhc1: esdhc@50004000 { esdhc1: esdhc@50004000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
reg = <0x50004000 0x4000>; reg = <0x50004000 0x4000>;
interrupts = <1>; interrupts = <1>;
clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>,
@ -121,7 +121,7 @@
}; };
esdhc2: esdhc@50008000 { esdhc2: esdhc@50008000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
reg = <0x50008000 0x4000>; reg = <0x50008000 0x4000>;
interrupts = <2>; interrupts = <2>;
clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>,
@ -170,7 +170,7 @@
}; };
esdhc3: esdhc@50020000 { esdhc3: esdhc@50020000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
reg = <0x50020000 0x4000>; reg = <0x50020000 0x4000>;
interrupts = <3>; interrupts = <3>;
clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>,
@ -182,7 +182,7 @@
}; };
esdhc4: esdhc@50024000 { esdhc4: esdhc@50024000 {
compatible = "fsl,imx50-esdhc"; compatible = "fsl,imx50-esdhc", "fsl,imx53-esdhc";
reg = <0x50024000 0x4000>; reg = <0x50024000 0x4000>;
interrupts = <4>; interrupts = <4>;
clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>,

4
arch/arm/boot/dts/imx53-qsb.dts
View File

@ -88,8 +88,8 @@
}; };
ldo7_reg: ldo7 { ldo7_reg: ldo7 {
regulator-min-microvolt = <1200000>; regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <3600000>; regulator-max-microvolt = <2750000>;
}; };
ldo8_reg: ldo8 { ldo8_reg: ldo8 {

4
arch/arm/boot/dts/imx53-qsrb.dts
View File

@ -128,8 +128,8 @@
vdac_reg: vdac { vdac_reg: vdac {
regulator-name = "VDAC"; regulator-name = "VDAC";
regulator-min-microvolt = <2500000>; regulator-min-microvolt = <2750000>;
regulator-max-microvolt = <2775000>; regulator-max-microvolt = <2750000>;
}; };
vgen1_reg: vgen1 { vgen1_reg: vgen1 {

55
arch/arm/boot/dts/imx6dl-gw5903.dts Normal file
View File

@ -0,0 +1,55 @@
/*
* Copyright 2017 Gateworks Corporation
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this file; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-gw5903.dtsi"
/ {
model = "Gateworks Ventana i.MX6 Duallite/Solo GW5903";
compatible = "gw,imx6dl-gw5903", "gw,ventana", "fsl,imx6dl";
};

55
arch/arm/boot/dts/imx6dl-gw5904.dts Normal file
View File

@ -0,0 +1,55 @@
/*
* Copyright 2017 Gateworks Corporation
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this file; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-gw5904.dtsi"
/ {
model = "Gateworks Ventana i.MX6 DualLite/Solo GW5904";
compatible = "gw,imx6dl-gw5904", "gw,ventana", "fsl,imx6dl";
};

7
arch/arm/boot/dts/imx6q-b450v3.dts
View File

@ -104,4 +104,11 @@
output-low; output-low;
line-name = "PCA9539-P05"; line-name = "PCA9539-P05";
}; };
P07 {
gpio-hog;
gpios = <7 0>;
output-low;
line-name = "PCA9539-P07";
};
}; };

7
arch/arm/boot/dts/imx6q-b650v3.dts
View File

@ -97,6 +97,13 @@
output-low; output-low;
line-name = "PCA9539-P05"; line-name = "PCA9539-P05";
}; };
P07 {
gpio-hog;
gpios = <7 0>;
output-low;
line-name = "PCA9539-P07";
};
}; };
&usbphy1 { &usbphy1 {

70
arch/arm/boot/dts/imx6q-b850v3.dts
View File

@ -72,6 +72,14 @@
fsl,data-mapping = "spwg"; fsl,data-mapping = "spwg";
fsl,data-width = <24>; fsl,data-width = <24>;
status = "okay"; status = "okay";
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&stdp4028_in>;
};
};
}; };
}; };
@ -142,3 +150,65 @@
reg = <0x4a>; reg = <0x4a>;
}; };
}; };
&mux2_i2c2 {
clock-frequency = <100000>;
stdp2690@72 {
compatible = "megachips,stdp2690-ge-b850v3-fw";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
stdp2690_in: endpoint {
remote-endpoint = <&stdp4028_out>;
};
};
port@1 {
reg = <1>;
stdp2690_out: endpoint {
/* Connector for external display */
};
};
};
};
stdp4028@73 {
compatible = "megachips,stdp4028-ge-b850v3-fw";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
interrupt-parent = <&gpio2>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
stdp4028_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
port@1 {
reg = <1>;
stdp4028_out: endpoint {
remote-endpoint = <&stdp2690_in>;
};
};
};
};
};

16
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View File

@ -102,7 +102,7 @@
m25_eeprom: m25p80@0 { m25_eeprom: m25p80@0 {
compatible = "atmel,at25"; compatible = "atmel,at25";
spi-max-frequency = <20000000>; spi-max-frequency = <10000000>;
size = <0x8000>; size = <0x8000>;
pagesize = <64>; pagesize = <64>;
reg = <0>; reg = <0>;
@ -183,20 +183,6 @@
interrupt-parent = <&gpio2>; interrupt-parent = <&gpio2>;
interrupts = <3 IRQ_TYPE_LEVEL_LOW>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
P06 {
gpio-hog;
gpios = <6 0>;
output-low;
line-name = "PCA9539-P06";
};
P07 {
gpio-hog;
gpios = <7 0>;
output-low;
line-name = "PCA9539-P07";
};
P10 { P10 {
gpio-hog; gpio-hog;
gpios = <8 0>; gpios = <8 0>;

83
arch/arm/boot/dts/imx6q-cm-fx6.dts
View File

@ -43,6 +43,7 @@
/dts-v1/; /dts-v1/;
#include <dt-bindings/gpio/gpio.h> #include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
#include "imx6q.dtsi" #include "imx6q.dtsi"
/ { / {
@ -90,6 +91,34 @@
enable-active-high; enable-active-high;
}; };
sound-analog {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board analog audio";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Line", "Line Out",
"Microphone", "Mic Jack",
"Line", "Line In";
simple-audio-card,routing =
"Headphone Jack", "RHPOUT",
"Headphone Jack", "LHPOUT",
"MICIN", "Mic Bias",
"Mic Bias", "Mic Jack";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_master>;
simple-audio-card,frame-master = <&sound_master>;
simple-audio-card,bitclock-inversion;
sound_master: simple-audio-card,cpu {
sound-dai = <&ssi2>;
system-clock-frequency = <2822400>;
};
simple-audio-card,codec {
sound-dai = <&wm8731>;
};
};
sound-spdif { sound-spdif {
compatible = "fsl,imx-audio-spdif"; compatible = "fsl,imx-audio-spdif";
model = "imx-spdif"; model = "imx-spdif";
@ -99,6 +128,36 @@
}; };
}; };
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_RCLKDIR |
IMX_AUDMUX_V2_PTCR_RCSEL(3 | 0x8) |
IMX_AUDMUX_V2_PTCR_TCLKDIR |
IMX_AUDMUX_V2_PTCR_TCSEL(3))
IMX_AUDMUX_V2_PDCR_RXDSEL(3)
>;
};
audmux4 {
fsl,audmux-port = <3>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TFSEL(1) |
IMX_AUDMUX_V2_PTCR_RCLKDIR |
IMX_AUDMUX_V2_PTCR_RCSEL(1 | 0x8) |
IMX_AUDMUX_V2_PTCR_TCLKDIR |
IMX_AUDMUX_V2_PTCR_TCSEL(1))
IMX_AUDMUX_V2_PDCR_RXDSEL(1)
>;
};
};
&cpu0 { &cpu0 {
/* /*
* Although the imx6q fuse indicates that 1.2GHz operation is possible, * Although the imx6q fuse indicates that 1.2GHz operation is possible,
@ -160,9 +219,25 @@
reg = <0x50>; reg = <0x50>;
pagesize = <16>; pagesize = <16>;
}; };
wm8731: codec@1a {
#sound-dai-cells = <0>;
compatible = "wlf,wm8731";
reg = <0x1a>;
};
}; };
&iomuxc { &iomuxc {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059
MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059
MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059
MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059
MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059
>;
};
pinctrl_ecspi1: ecspi1grp { pinctrl_ecspi1: ecspi1grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
@ -279,6 +354,14 @@
status = "okay"; status = "okay";
}; };
&ssi2 {
assigned-clocks = <&clks IMX6QDL_CLK_SSI2_SEL>,
<&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL4_AUDIO_DIV>;
assigned-clock-rates = <0>, <786432000>;
status = "okay";
};
&uart4 { &uart4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>; pinctrl-0 = <&pinctrl_uart4>;

55
arch/arm/boot/dts/imx6q-gw5903.dts Normal file
View File

@ -0,0 +1,55 @@
/*
* Copyright 2017 Gateworks Corporation
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this file; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-gw5903.dtsi"
/ {
model = "Gateworks Ventana i.MX6 Dual/Quad GW5903";
compatible = "gw,imx6q-gw5903", "gw,ventana", "fsl,imx6q";
};

59
arch/arm/boot/dts/imx6q-gw5904.dts Normal file
View File

@ -0,0 +1,59 @@
/*
* Copyright 2017 Gateworks Corporation
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this file; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-gw5904.dtsi"
/ {
model = "Gateworks Ventana i.MX6 Dual/Quad GW5904";
compatible = "gw,imx6q-gw5904", "gw,ventana", "fsl,imx6q";
};
&sata {
status = "okay";
};

76
arch/arm/boot/dts/imx6q-icore-ofcap10.dts Normal file
View File

@ -0,0 +1,76 @@
/*
* Copyright (C) 2016 Amarula Solutions B.V.
* Copyright (C) 2016 Engicam S.r.l.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-icore.dtsi"
/ {
model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 10.1 Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <24>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <60000000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <40>;
hfront-porch = <40>;
vback-porch = <10>;
vfront-porch = <3>;
hsync-len = <80>;
vsync-len = <10>;
};
};
};
};

76
arch/arm/boot/dts/imx6q-icore-ofcap12.dts Normal file
View File

@ -0,0 +1,76 @@
/*
* Copyright (C) 2016 Amarula Solutions B.V.
* Copyright (C) 2016 Engicam S.r.l.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-icore.dtsi"
/ {
model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 12 Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <46800000>;
hactive = <1280>;
vactive = <480>;
hback-porch = <353>;
hfront-porch = <47>;
vback-porch = <39>;
vfront-porch = <4>;
hsync-len = <8>;
vsync-len = <2>;
};
};
};
};

34
arch/arm/boot/dts/imx6q-icore.dts
View File

@ -57,3 +57,37 @@
&can2 { &can2 {
status = "okay"; status = "okay";
}; };
&i2c1 {
max11801: touchscreen@48 {
compatible = "maxim,max11801";
reg = <0x48>;
interrupt-parent = <&gpio3>;
interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <60000000>;
hactive = <800>;
vactive = <480>;
hback-porch = <30>;
hfront-porch = <30>;
vback-porch = <5>;
vfront-porch = <5>;
hsync-len = <64>;
vsync-len = <20>;
};
};
};
};

10
arch/arm/boot/dts/imx6q-utilite-pro.dts
View File

@ -101,9 +101,11 @@
hdmi-connector { hdmi-connector {
compatible = "hdmi-connector"; compatible = "hdmi-connector";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hpd>;
type = "a"; type = "a";
ddc-i2c-bus = <&i2c_dvi_ddc>; ddc-i2c-bus = <&i2c_dvi_ddc>;
hpd-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
port { port {
hdmi_connector_in: endpoint { hdmi_connector_in: endpoint {
@ -209,6 +211,12 @@
>; >;
}; };
pinctrl_hpd: hpdgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp { pinctrl_i2c1: i2c1grp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1

50
arch/arm/boot/dts/imx6q-zii-rdu2.dts Normal file
View File

@ -0,0 +1,50 @@
/*
* Copyright (C) 2016-2017 Zodiac Inflight Innovations
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <imx6q.dtsi>
#include <imx6qdl-zii-rdu2.dtsi>
/ {
model = "ZII RDU2 Board";
compatible = "zii,imx6q-zii-rdu2", "fsl,imx6q";
};

654
arch/arm/boot/dts/imx6qdl-gw5903.dtsi Normal file
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@ -0,0 +1,654 @@
/*
* Copyright 2017 Gateworks Corporation
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this file; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
chosen {
stdout-path = &uart2;
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <
0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100
>;
default-brightness-level = <100>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio6 14 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";
};
};
memory {
reg = <0x10000000 0x40000000>;
};
reg_5p0v: regulator-5p0v {
compatible = "regulator-fixed";
regulator-name = "5P0V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_2p5v: regulator-2p5v {
compatible = "regulator-fixed";
regulator-name = "2P5V";
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
reg_usb_h1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 30 0>;
enable-active-high;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio4 15 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_12p0: regulator-12p0v {
compatible = "regulator-fixed";
regulator-name = "12P0V";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
sound {
compatible = "fsl,imx-audio-tlv320";
model = "imx-tlv320";
ssi-controller = <&ssi1>;
audio-codec = <&tlv320aic3105>;
/* routing of sink, source */
audio-routing =
/* TLV320 LINE1L pin <-> Mic Jack connector */
"LINE1L", "Mic Jack",
/* board Headphone Jack <-> HPOUT */
"Headphone Jack", "HPLOUT",
"Headphone Jack", "HPROUT",
"Mic Jack", "Mic Bias";
mux-int-port = <1>;
mux-ext-port = <6>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
status = "okay";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pca9555: gpio@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
};
eeprom1: eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom2: eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
};
eeprom3: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
};
eeprom4: eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
dts1672: rtc@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
};
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
ltc3676: pmic@3c {
compatible = "lltc,ltc3676";
reg = <0x3c>;
interrupt-parent = <&gpio1>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
regulators {
/* VDD_1P8 (1+R1/R2 = 2.505): Aud/eMMC/microSD/Touch */
reg_1p8v: sw1 {
regulator-name = "vdd1p8";
regulator-min-microvolt = <1033310>;
regulator-max-microvolt = <2004000>;
lltc,fb-voltage-divider = <301000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_DDR (1+R1/R2 = 2.105) */
reg_vdd_ddr: sw2 {
regulator-name = "vddddr";
regulator-min-microvolt = <868310>;
regulator-max-microvolt = <1684000>;
lltc,fb-voltage-divider = <221000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_ARM (1+R1/R2 = 1.635) */
reg_vdd_arm: sw3 {
regulator-name = "vddarm";
regulator-min-microvolt = <674400>;
regulator-max-microvolt = <1308000>;
lltc,fb-voltage-divider = <127000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
linux,phandle = <&reg_vdd_arm>;
};
/* VDD_SOC (1+R1/R2 = 1.635) */
reg_vdd_soc: sw4 {
regulator-name = "vddsoc";
regulator-min-microvolt = <674400>;
regulator-max-microvolt = <1308000>;
lltc,fb-voltage-divider = <127000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
linux,phandle = <&reg_vdd_soc>;
};
/* VDD_1P0 (1+R1/R2 = 1.38): */
reg_1p0v: ldo2 {
regulator-name = "vdd1p0";
regulator-min-microvolt = <1002777>;
regulator-max-microvolt = <1002777>;
lltc,fb-voltage-divider = <100000 261000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_HIGH (1+R1/R2 = 4.17) */
reg_3p0v: ldo4 {
regulator-name = "vdd3p0";
regulator-min-microvolt = <3023250>;
regulator-max-microvolt = <3023250>;
lltc,fb-voltage-divider = <634000 200000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
tlv320aic3105: codec@18 {
compatible = "ti,tlv320aic3x";
reg = <0x18>;
gpio-reset = <&gpio5 17 GPIO_ACTIVE_LOW>;
clocks = <&clks IMX6QDL_CLK_CKO>;
ai3x-micbias-vg = <2>; /* MICBIAS_2_5V */
/* Regulators */
DRVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&reg_1p8v>;
};
accelerometer@1d {
compatible = "fsl,mma8451";
reg = <0x1d>;
interrupt-parent = <&gpio7>;
interrupts = <11 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "INT2";
};
/* headphone detect */
ts3a227e@3b {
compatible = "ti,ts3a227e";
reg = <0x3b>;
interrupt-parent = <&gpio5>;
interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
ti,micbias = <4>; /* 2.5V micbias */
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: g101evn010 {
clock-frequency = <68930000>;
hactive = <1280>;
vactive = <800>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&ssi1 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usdhc1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc1_200mhz>;
vmmc-supply = <&reg_3p3v>;
non-removable;
bus-width = <4>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_3p3v>;
max-frequency = <100000000>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
non-removable;
vmmc-supply = <&reg_3p3v>;
keep-power-in-suspend;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
};
&iomuxc {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x130b0
MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x130b0
MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x130b0
MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x130b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* MCK */
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x4001b0b0 /* PHY_EN */
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b0b0 /* GSC_IRQ# */
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
/* I2C3 */
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
/* Headphone Detect */
MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x0001b0b0 /* HPDET_IRQ# */
MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x0001b0b0 /* HPDET_MIC# */
/* Codec */
MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x0001b0b0 /* CODEC_RST# */
/* Touch Controller */
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b0b0 /* TOUCH_IRQ# */
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b0b0 /* TOUCH_RST */
/* Stow Sensor */
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b0b0 /* ACCEL_IRQ2 */
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x0001b0b0 /* ACCEL_IRQ1 */
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x1b0b1 /* TXEN */
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x4001b0b0 /* PWR_EN */
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp200mhz {
fsl,pins = <
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x4001b0b0 /* EMMY_EN */
MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x4001b0b0 /* EMMY_CFG1# */
MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x4001b0b0 /* EMMY_CFG2# */
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x0001b0b0 /* EMMY_BTWAKE# */
MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x0001b0b0 /* EMMY_WFWAKE# */
MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9
MX6QDL_PAD_SD1_CMD__SD1_CMD 0x100f9
MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9
MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x17059 /* CD */
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x17059
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp100mhz {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170b9 /* CD */
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170b9
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp200mhz {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170f9
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100f9
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170f9
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170f9
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170f9
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170f9
MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x170f9 /* CD */
MX6QDL_PAD_KEY_ROW1__SD2_VSELECT 0x170f9
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
>;
};
};

641
arch/arm/boot/dts/imx6qdl-gw5904.dtsi Normal file
View File

@ -0,0 +1,641 @@
/*
* Copyright 2017 Gateworks Corporation
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public
* License along with this file; if not, write to the Free
* Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
* MA 02110-1301 USA
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
/* these are used by bootloader for disabling nodes */
aliases {
led0 = &led0;
led1 = &led1;
led2 = &led2;
usb0 = &usbh1;
usb1 = &usbotg;
};
chosen {
stdout-path = &uart2;
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm4 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_leds>;
led0: user1 {
label = "user1";
gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */
default-state = "on";
linux,default-trigger = "heartbeat";
};
led1: user2 {
label = "user2";
gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */
default-state = "off";
};
led2: user3 {
label = "user3";
gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */
default-state = "off";
};
};
memory {
reg = <0x10000000 0x40000000>;
};
pps {
compatible = "pps-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pps>;
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
};
reg_1p0v: regulator-1p0v {
compatible = "regulator-fixed";
regulator-name = "1P0V";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_h1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&clks {
assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
<&clks IMX6QDL_CLK_LDB_DI1_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>,
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii-id";
status = "okay";
fixed-link {
speed = <1000>;
full-duplex;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port@5 {
reg = <5>;
label = "cpu";
ethernet = <&fec>;
};
};
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pca9555: gpio@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
gpio-controller;
#gpio-cells = <2>;
};
eeprom1: eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
eeprom2: eeprom@51 {
compatible = "atmel,24c02";
reg = <0x51>;
pagesize = <16>;
};
eeprom3: eeprom@52 {
compatible = "atmel,24c02";
reg = <0x52>;
pagesize = <16>;
};
eeprom4: eeprom@53 {
compatible = "atmel,24c02";
reg = <0x53>;
pagesize = <16>;
};
dts1672: rtc@68 {
compatible = "dallas,ds1672";
reg = <0x68>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
ltc3676: pmic@3c {
compatible = "lltc,ltc3676";
reg = <0x3c>;
interrupt-parent = <&gpio1>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
regulators {
/* VDD_SOC (1+R1/R2 = 1.635) */
reg_vdd_soc: sw1 {
regulator-name = "vddsoc";
regulator-min-microvolt = <674400>;
regulator-max-microvolt = <1308000>;
lltc,fb-voltage-divider = <127000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_1P8 (1+R1/R2 = 2.505): GbE switch */
reg_1p8v: sw2 {
regulator-name = "vdd1p8";
regulator-min-microvolt = <1033310>;
regulator-max-microvolt = <2004000>;
lltc,fb-voltage-divider = <301000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_ARM (1+R1/R2 = 1.635) */
reg_vdd_arm: sw3 {
regulator-name = "vddarm";
regulator-min-microvolt = <674400>;
regulator-max-microvolt = <1308000>;
lltc,fb-voltage-divider = <127000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_DDR (1+R1/R2 = 2.105) */
reg_vdd_ddr: sw4 {
regulator-name = "vddddr";
regulator-min-microvolt = <868310>;
regulator-max-microvolt = <1684000>;
lltc,fb-voltage-divider = <221000 200000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */
reg_2p5v: ldo2 {
regulator-name = "vdd2p5";
regulator-min-microvolt = <2490375>;
regulator-max-microvolt = <2490375>;
lltc,fb-voltage-divider = <487000 200000>;
regulator-boot-on;
regulator-always-on;
};
/* VDD_HIGH (1+R1/R2 = 4.17) */
reg_3p0v: ldo4 {
regulator-name = "vdd3p0";
regulator-min-microvolt = <3023250>;
regulator-max-microvolt = <3023250>;
lltc,fb-voltage-divider = <634000 200000>;
regulator-boot-on;
regulator-always-on;
};
};
};
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
egalax_ts: touchscreen@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
interrupt-parent = <&gpio1>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: hsd100pxn1 {
clock-frequency = <65000000>;
hactive = <1024>;
vactive = <768>;
hback-porch = <220>;
hfront-porch = <40>;
vback-porch = <21>;
vfront-porch = <7>;
hsync-len = <60>;
vsync-len = <10>;
};
};
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
status = "okay";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
status = "disabled";
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
status = "disabled";
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm4>;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
uart-has-rtscts;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
status = "okay";
};
&usbh1 {
vbus-supply = <&reg_usb_h1_vbus>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
non-removable;
vmmc-supply = <&reg_3p3v>;
keep-power-in-suspend;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */
>;
};
pinctrl_gpio_leds: gpioledsgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */
>;
};
pinctrl_pps: ppsgrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
>;
};
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
>;
};
pinctrl_pwm4: pwm4grp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp100mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp200mhz {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9
MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0
>;
};
};

19
arch/arm/boot/dts/imx6qdl-icore.dtsi
View File

@ -48,6 +48,13 @@
reg = <0x10000000 0x80000000>; reg = <0x10000000 0x80000000>;
}; };
backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 100000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
};
reg_3p3v: regulator-3p3v { reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed"; compatible = "regulator-fixed";
regulator-name = "3P3V"; regulator-name = "3P3V";
@ -136,6 +143,12 @@
status = "okay"; status = "okay";
}; };
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&uart4 { &uart4 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>; pinctrl-0 = <&pinctrl_uart4>;
@ -246,6 +259,12 @@
>; >;
}; };
pinctrl_pwm3: pwm3grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
>;
};
pinctrl_usbotg: usbotggrp { pinctrl_usbotg: usbotggrp {
fsl,pins = < fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059

12
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View File

@ -548,6 +548,18 @@
status = "okay"; status = "okay";
}; };
&reg_arm {
vin-supply = <&sw1a_reg>;
};
&reg_pu {
vin-supply = <&sw1c_reg>;
};
&reg_soc {
vin-supply = <&sw1c_reg>;
};
&snvs_poweroff { &snvs_poweroff {
status = "okay"; status = "okay";
}; };

932
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi Normal file
View File

@ -0,0 +1,932 @@
/*
* Copyright (C) 2016-2017 Zodiac Inflight Innovations
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
/ {
chosen {
stdout-path = &uart1;
};
aliases {
mdio-gpio0 = &mdio1;
};
mdio1: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio1>;
gpios = <&gpio6 5 GPIO_ACTIVE_HIGH
&gpio6 4 GPIO_ACTIVE_HIGH>;
};
reg_28p0v: regulator-28p0v {
compatible = "regulator-fixed";
regulator-name = "28V_IN";
regulator-min-microvolt = <28000000>;
regulator-max-microvolt = <28000000>;
regulator-always-on;
};
reg_12p0v: regulator-12p0v {
compatible = "regulator-fixed";
vin-supply = <&reg_28p0v>;
regulator-name = "12V_MAIN";
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
regulator-always-on;
};
reg_5p0v_main: regulator-5p0v-main {
compatible = "regulator-fixed";
vin-supply = <&reg_12p0v>;
regulator-name = "5V_MAIN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
reg_5p0v_user_usb: regulator-5p0v-user-usb {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_user_usb>;
vin-supply = <&reg_5p0v_main>;
regulator-name = "5V_USER_USB";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_LOW>;
startup-delay-us = <1000>;
};
reg_3p3v_pmic: regulator-3p3v-pmic {
compatible = "regulator-fixed";
vin-supply = <&reg_12p0v>;
regulator-name = "PMIC_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
vin-supply = <&reg_3p3v_pmic>;
regulator-name = "GEN_3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_3p3v_sd: regulator-3p3v-sd {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_3p3v_sd>;
vin-supply = <&reg_3p3v>;
regulator-name = "3V3_SD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio7 8 GPIO_ACTIVE_HIGH>;
startup-delay-us = <1000>;
enable-active-high;
regulator-always-on;
};
reg_3p3v_display: regulator-3p3v-display {
compatible = "regulator-fixed";
vin-supply = <&reg_12p0v>;
regulator-name = "3V3_DISPLAY";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_3p3v_ssd: regulator-3p3v-ssd {
compatible = "regulator-fixed";
vin-supply = <&reg_12p0v>;
regulator-name = "3V3_SSD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
sound1 {
compatible = "simple-audio-card";
simple-audio-card,name = "Front";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound1_codec>;
simple-audio-card,frame-master = <&sound1_codec>;
simple-audio-card,widgets =
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Headphone Jack", "HPLEFT",
"Headphone Jack", "HPRIGHT",
"LEFTIN", "HPL",
"RIGHTIN", "HPR";
simple-audio-card,aux-devs = <&hpa1>;
sound1_cpu: simple-audio-card,cpu {
sound-dai = <&ssi2>;
};
sound1_codec: simple-audio-card,codec {
sound-dai = <&codec1>;
clocks = <&cs2000>;
};
};
sound2 {
compatible = "simple-audio-card";
simple-audio-card,name = "Back";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound2_codec>;
simple-audio-card,frame-master = <&sound2_codec>;
simple-audio-card,widgets =
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"Headphone Jack", "HPLEFT",
"Headphone Jack", "HPRIGHT",
"LEFTIN", "HPL",
"RIGHTIN", "HPR";
simple-audio-card,aux-devs = <&hpa2>;
sound2_cpu: simple-audio-card,cpu {
sound-dai = <&ssi1>;
};
sound2_codec: simple-audio-card,codec {
sound-dai = <&codec2>;
clocks = <&cs2000>;
};
};
panel {
power-supply = <&reg_3p3v_display>;
status = "disabled";
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
disp0: disp0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_disp0>;
status = "disabled";
port@0 {
reg = <0>;
disp0_in_0: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
disp0_out: endpoint {
remote-endpoint = <&tc358767_in>;
};
};
};
cs2000_ref: cs2000-ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
cs2000_in_dummy: cs2000-in-dummy {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
edp_refclk: edp-refclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
};
};
&reg_arm {
vin-supply = <&sw1a_reg>;
};
&reg_pu {
vin-supply = <&sw1c_reg>;
};
&reg_soc {
vin-supply = <&sw1c_reg>;
};
&ldb {
lvds-channel@0 {
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>;
status = "okay";
flash@0 {
compatible = "st,m25p128", "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
clock-frequency = <100000>;
status = "okay";
codec2: codec@18 {
compatible = "ti,tlv320dac3100";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_codec2>;
reg = <0x18>;
#sound-dai-cells = <0>;
HPVDD-supply = <&reg_3p3v>;
SPRVDD-supply = <&reg_3p3v>;
SPLVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&vgen4_reg>;
gpio-reset = <&gpio1 2 GPIO_ACTIVE_HIGH>;
};
accel@1c {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_accel>;
compatible = "fsl,mma8451";
reg = <0x1c>;
interrupt-parent = <&gpio1>;
interrupt-names = "int1", "int2";
interrupts = <18 IRQ_TYPE_LEVEL_LOW>, <20 IRQ_TYPE_LEVEL_LOW>;
};
hpa2: amp@60 {
compatible = "ti,tpa6130a2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpa2>;
reg = <0x60>;
power-gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
Vdd-supply = <&reg_5p0v_main>;
};
edp-bridge@68 {
compatible = "toshiba,tc358767";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tc358767>;
reg = <0x68>;
shutdown-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
clock-names = "ref";
clocks = <&edp_refclk>;
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
tc358767_in: endpoint {
remote-endpoint = <&disp0_out>;
};
};
};
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
clock-frequency = <100000>;
status = "okay";
pmic@08 {
compatible = "fsl,pfuze100";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pfuze100_irq>;
reg = <0x08>;
interrupt-parent = <&gpio7>;
interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1500000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2500000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <2800000>;
regulator-always-on;
};
};
};
temp-sense@48 {
compatible = "national,lm75";
reg = <0x48>;
};
cs2000: clkgen@4e {
compatible = "cirrus,cs2000-cp";
reg = <0x4e>;
#clock-cells = <0>;
clock-names = "clk_in", "ref_clk";
clocks = <&cs2000_in_dummy>, <&cs2000_ref>;
assigned-clocks = <&cs2000>;
assigned-clock-rates = <24000000>;
};
eeprom@54 {
compatible = "at,24c128";
reg = <0x54>;
};
rtc@68 {
compatible = "dallas,ds1341";
reg = <0x68>;
};
};
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
clock-frequency = <400000>;
status = "okay";
codec1: codec@18 {
compatible = "ti,tlv320dac3100";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_codec1>;
reg = <0x18>;
#sound-dai-cells = <0>;
HPVDD-supply = <&reg_3p3v>;
SPRVDD-supply = <&reg_3p3v>;
SPLVDD-supply = <&reg_3p3v>;
AVDD-supply = <&reg_3p3v>;
IOVDD-supply = <&reg_3p3v>;
DVDD-supply = <&vgen4_reg>;
gpio-reset = <&gpio1 0 GPIO_ACTIVE_HIGH>;
};
touchscreen@20 {
compatible = "syna,rmi4-i2c";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ts>;
reg = <0x20>;
interrupt-parent = <&gpio1>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
vdd-supply = <&reg_5p0v_main>;
vio-supply = <&reg_3p3v>;
#address-cells = <1>;
#size-cells = <0>;
rmi4-f01@1 {
reg = <0x1>;
syna,nosleep-mode = <1>;
};
rmi4-f11@11 {
reg = <0x11>;
touchscreen-inverted-y;
touchscreen-swapped-x-y;
syna,sensor-type = <1>;
};
rmi4-f12@12 {
reg = <0x12>;
touchscreen-inverted-y;
touchscreen-swapped-x-y;
syna,sensor-type = <1>;
};
};
hpa1: amp@60 {
compatible = "ti,tpa6130a2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tpa1>;
reg = <0x60>;
power-gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
Vdd-supply = <&reg_5p0v_main>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&disp0_in_0>;
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
bus-width = <4>;
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_3p3v_sd>;
vqmmc-supply = <&reg_3p3v>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <4>;
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_3p3v_sd>;
vqmmc-supply = <&reg_3p3v>;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
non-removable;
status = "okay";
};
&sata {
target-supply = <&reg_3p3v_ssd>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio1 23 GPIO_ACTIVE_LOW>;
phy-reset-duration = <100>;
phy-supply = <&reg_3p3v>;
status = "okay";
fixed-link {
speed = <100>;
full-duplex;
};
};
&usbh1 {
vbus-supply = <&reg_5p0v_main>;
status = "okay";
};
&usbotg {
vbus-supply = <&reg_5p0v_user_usb>;
disable-over-current;
dr_mode = "host";
status = "okay";
};
&ssi1 {
status = "okay";
};
&ssi2 {
status = "okay";
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSEL(2) |
IMX_AUDMUX_V2_PTCR_TCSEL(2) |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR)
IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(0)
>;
};
ssi2 {
fsl,audmux-port = <1>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSEL(4) |
IMX_AUDMUX_V2_PTCR_TCSEL(4) |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR)
IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
aud5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(1)
>;
};
};
&iomuxc {
pinctrl_accel: accelgrp {
fsl,pins = <
MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x4001b000
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x4001b000
>;
};
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL0__AUD5_TXC 0x130b0
MX6QDL_PAD_KEY_ROW0__AUD5_TXD 0x130b0
MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x130b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>;
};
pinctrl_codec1: dac1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x40000038
>;
};
pinctrl_codec2: dac2grp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x40000038
>;
};
pinctrl_disp0: disp0grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x100f9
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x100f9
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x100f9
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x100f9
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x100f9
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x100f9
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x100f9
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x100f9
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x100f9
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x100f9
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x100f9
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x100f9
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x100f9
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x100f9
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x100f9
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x100f9
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x100f9
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x100f9
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x100f9
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x100f9
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x100f9
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x100f9
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x100f9
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x100f9
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x100f9
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x100f9
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x100f9
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x100f9
>;
};
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b1
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x000b1
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b1
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x100f5
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x100f5
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x100c0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x100c0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x100f5
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x100f5
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x40010040
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x100b0
MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_mdio1: bitbangmdiogrp {
fsl,pins = <
/* Bitbang MDIO for DEB Switch */
MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x4001b030
MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40018830
>;
};
pinctrl_pcie: pciegrp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x10038
>;
};
pinctrl_pfuze100_irq: pfuze100grp {
fsl,pins = <
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x40010000
>;
};
pinctrl_reg_3p3v_sd: mmcsupply1grp {
fsl,pins = <
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x858
>;
};
pinctrl_reg_user_usb: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x40000038
>;
};
pinctrl_rmii_phy_irq: phygrp {
fsl,pins = <
MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x40010000
>;
};
pinctrl_tc358767: tc358767grp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x10
>;
};
pinctrl_tpa1: tpa6130-1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x40000038
>;
};
pinctrl_tpa2: tpa6130-2grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x40000038
>;
};
pinctrl_ts: tsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
>;
};
pinctrl_uart4: uart4grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x10059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10069
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x40010040
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x40010040
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x10059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10069
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x40010040
MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x40010040
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x1b0b1
>;
};
};

3
arch/arm/boot/dts/imx6qdl.dtsi
View File

@ -197,7 +197,7 @@
arm,shared-override; arm,shared-override;
}; };
pcie: pcie@0x01000000 { pcie: pcie@1ffc000 {
compatible = "fsl,imx6q-pcie", "snps,dw-pcie"; compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
reg = <0x01ffc000 0x04000>, reg = <0x01ffc000 0x04000>,
<0x01f00000 0x80000>; <0x01f00000 0x80000>;
@ -205,6 +205,7 @@
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
device_type = "pci"; device_type = "pci";
bus-range = <0x00 0xff>;
ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */ ranges = <0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */ 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
num-lanes = <1>; num-lanes = <1>;

55
arch/arm/boot/dts/imx6qp-nitrogen6_som2.dts Normal file
View File

@ -0,0 +1,55 @@
/*
* Copyright 2017 Boundary Devices, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include "imx6qp.dtsi"
#include "imx6qdl-nitrogen6_som2.dtsi"
/ {
model = "Boundary Devices i.MX6 Quad Plus Nitrogen6_SOM2 Board";
compatible = "boundary,imx6qp-nitrogen6_som2", "fsl,imx6qp";
};
&sata {
status = "okay";
};

4
arch/arm/boot/dts/imx6qp-sabresd.dts
View File

@ -50,8 +50,8 @@
compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp"; compatible = "fsl,imx6qp-sabresd", "fsl,imx6qp";
}; };
&cpu0 { &reg_arm {
arm-supply = <&sw2_reg>; vin-supply = <&sw2_reg>;
}; };
&iomuxc { &iomuxc {

50
arch/arm/boot/dts/imx6qp-zii-rdu2.dts Normal file
View File

@ -0,0 +1,50 @@
/*
* Copyright (C) 2016-2017 Zodiac Inflight Innovations
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED , WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/dts-v1/;
#include <imx6qp.dtsi>
#include <imx6qdl-zii-rdu2.dtsi>
/ {
model = "ZII RDU2+ Board";
compatible = "zii,imx6qp-zii-rdu2", "fsl,imx6qp";
};

103
arch/arm/boot/dts/imx6qp.dtsi
View File

@ -56,40 +56,59 @@
clocks = <&clks IMX6QDL_CLK_OCRAM>; clocks = <&clks IMX6QDL_CLK_OCRAM>;
}; };
ipu1: ipu@02400000 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
clocks = <&clks IMX6QDL_CLK_IPU1>,
<&clks IMX6QDL_CLK_IPU1_DI0>, <&clks IMX6QDL_CLK_IPU1_DI1>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
<&clks IMX6QDL_CLK_PRG0_APB>;
clock-names = "bus",
"di0", "di1",
"di0_sel", "di1_sel",
"ldb_di0", "ldb_di1", "prg";
};
ipu2: ipu@02800000 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
clocks = <&clks IMX6QDL_CLK_IPU2>,
<&clks IMX6QDL_CLK_IPU2_DI0>, <&clks IMX6QDL_CLK_IPU2_DI1>,
<&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
<&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>,
<&clks IMX6QDL_CLK_PRG1_APB>;
clock-names = "bus",
"di0", "di1",
"di0_sel", "di1_sel",
"ldb_di0", "ldb_di1", "prg";
};
pcie: pcie@0x01000000 {
compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
};
aips-bus@02100000 { aips-bus@02100000 {
mmdc0: mmdc@021b0000 { /* MMDC0 */ pre1: pre@21c8000 {
compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc"; compatible = "fsl,imx6qp-pre";
reg = <0x021b0000 0x4000>; reg = <0x021c8000 0x1000>;
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE0>;
clock-names = "axi";
fsl,iram = <&ocram2>;
};
pre2: pre@21c9000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021c9000 0x1000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE1>;
clock-names = "axi";
fsl,iram = <&ocram2>;
};
pre3: pre@21ca000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021ca000 0x1000>;
interrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE2>;
clock-names = "axi";
fsl,iram = <&ocram3>;
};
pre4: pre@21cb000 {
compatible = "fsl,imx6qp-pre";
reg = <0x021cb000 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
clocks = <&clks IMX6QDL_CLK_PRE3>;
clock-names = "axi";
fsl,iram = <&ocram3>;
};
prg1: prg@21cc000 {
compatible = "fsl,imx6qp-prg";
reg = <0x021cc000 0x1000>;
clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
<&clks IMX6QDL_CLK_PRG0_AXI>;
clock-names = "ipg", "axi";
fsl,pres = <&pre1>, <&pre2>, <&pre3>;
};
prg2: prg@21cd000 {
compatible = "fsl,imx6qp-prg";
reg = <0x021cd000 0x1000>;
clocks = <&clks IMX6QDL_CLK_PRG1_APB>,
<&clks IMX6QDL_CLK_PRG1_AXI>;
clock-names = "ipg", "axi";
fsl,pres = <&pre4>, <&pre2>, <&pre3>;
}; };
}; };
}; };
@ -101,6 +120,16 @@
<0 119 IRQ_TYPE_LEVEL_HIGH>; <0 119 IRQ_TYPE_LEVEL_HIGH>;
}; };
&ipu1 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
fsl,prg = <&prg1>;
};
&ipu2 {
compatible = "fsl,imx6qp-ipu", "fsl,imx6q-ipu";
fsl,prg = <&prg2>;
};
&ldb { &ldb {
clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>, clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
<&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>, <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
@ -110,3 +139,11 @@
"di0_sel", "di1_sel", "di2_sel", "di3_sel", "di0_sel", "di1_sel", "di2_sel", "di3_sel",
"di0", "di1"; "di0", "di1";
}; };
&mmdc0 {
compatible = "fsl,imx6qp-mmdc", "fsl,imx6q-mmdc";
};
&pcie {
compatible = "fsl,imx6qp-pcie", "snps,dw-pcie";
};

21
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -297,7 +297,8 @@
}; };
uart1: serial@02020000 { uart1: serial@02020000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>; reg = <0x02020000 0x4000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
@ -1053,7 +1054,8 @@
}; };
uart2: serial@021e8000 { uart2: serial@021e8000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x4000>; reg = <0x021e8000 0x4000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
@ -1065,7 +1067,8 @@
}; };
uart3: serial@021ec000 { uart3: serial@021ec000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x4000>; reg = <0x021ec000 0x4000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
@ -1077,7 +1080,8 @@
}; };
uart4: serial@021f0000 { uart4: serial@021f0000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x4000>; reg = <0x021f0000 0x4000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
@ -1089,7 +1093,8 @@
}; };
uart5: serial@021f4000 { uart5: serial@021f4000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x4000>; reg = <0x021f4000 0x4000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
@ -1229,7 +1234,8 @@
}; };
uart6: serial@022a0000 { uart6: serial@022a0000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x022a0000 0x4000>; reg = <0x022a0000 0x4000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
@ -1281,7 +1287,7 @@
}; };
}; };
pcie: pcie@0x08000000 { pcie: pcie@8ffc000 {
compatible = "fsl,imx6sx-pcie", "snps,dw-pcie"; compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
reg = <0x08ffc000 0x4000>; /* DBI */ reg = <0x08ffc000 0x4000>; /* DBI */
#address-cells = <3>; #address-cells = <3>;
@ -1293,6 +1299,7 @@
0x81000000 0 0 0x08f80000 0 0x00010000 0x81000000 0 0 0x08f80000 0 0x00010000
/* non-prefetchable memory */ /* non-prefetchable memory */
0x82000000 0 0x08000000 0x08000000 0 0x00f00000>; 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
bus-range = <0x00 0xff>;
num-lanes = <1>; num-lanes = <1>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>, clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,

5
arch/arm/boot/dts/imx6ul-14x14-evk.dts
View File

@ -85,11 +85,6 @@
assigned-clock-rates = <786432000>; assigned-clock-rates = <786432000>;
}; };
&cpu0 {
arm-supply = <&reg_arm>;
soc-supply = <&reg_soc>;
};
&i2c2 { &i2c2 {
clock_frequency = <100000>; clock_frequency = <100000>;
pinctrl-names = "default"; pinctrl-names = "default";

45
arch/arm/boot/dts/imx6ul-geam.dtsi
View File

@ -49,6 +49,23 @@
reg = <0x80000000 0x08000000>; reg = <0x80000000 0x08000000>;
}; };
backlight {
compatible = "pwm-backlight";
pwms = <&pwm8 0 100000>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <100>;
};
chosen { chosen {
stdout-path = &uart1; stdout-path = &uart1;
}; };
@ -143,12 +160,24 @@
display = <&display0>; display = <&display0>;
}; };
&pwm8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm8>;
status = "okay";
};
&tsc { &tsc {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tsc>; pinctrl-0 = <&pinctrl_tsc>;
xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>; xnur-gpio = <&gpio1 3 GPIO_ACTIVE_LOW>;
}; };
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
status = "okay";
};
&uart1 { &uart1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>; pinctrl-0 = <&pinctrl_uart1>;
@ -290,6 +319,12 @@
>; >;
}; };
pinctrl_pwm8: pwm8grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
>;
};
pinctrl_tsc: tscgrp { pinctrl_tsc: tscgrp {
fsl,pin = < fsl,pin = <
MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0 MX6UL_PAD_GPIO1_IO01__GPIO1_IO01 0xb0
@ -299,6 +334,16 @@
>; >;
}; };
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
>;
};
pinctrl_uart1: uart1grp { pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1

141
arch/arm/boot/dts/imx6ul-isiot-common.dtsi Normal file
View File

@ -0,0 +1,141 @@
/*
* Copyright (C) 2016 Amarula Solutions B.V.
* Copyright (C) 2016 Engicam S.r.l.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* version 2 as published by the Free Software Foundation.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
&i2c1 {
stmpe811: gpio-expander@44 {
compatible = "st,stmpe811";
reg = <0x44>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
interrupt-parent = <&gpio1>;
interrupts = <18 IRQ_TYPE_EDGE_FALLING>;
interrupt-controller;
#interrupt-cells = <2>;
stmpe: touchscreen {
compatible = "st,stmpe-ts";
st,sample-time = <4>;
st,mod-12b = <1>;
st,ref-sel = <0>;
st,adc-freq = <1>;
st,ave-ctrl = <1>;
st,touch-det-delay = <2>;
st,settling = <2>;
st,fraction-z = <7>;
st,i-drive = <1>;
};
};
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif_dat
&pinctrl_lcdif_ctrl>;
display = <&display0>;
status = "okay";
display0: display {
bits-per-pixel = <16>;
bus-width = <18>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <28000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <30>;
hback-porch = <30>;
hsync-len = <64>;
vback-porch = <5>;
vfront-porch = <5>;
vsync-len = <20>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&iomuxc {
pinctrl_lcdif_ctrl: lcdifctrlgrp {
fsl,pins = <
MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79
MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79
MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79
MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79
>;
};
pinctrl_lcdif_dat: lcdifdatgrp {
fsl,pins = <
MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79
MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79
MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79
MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79
MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79
MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79
MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79
MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79
MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79
MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79
MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79
MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79
MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79
MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79
MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79
MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79
MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79
MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79
>;
};
pinctrl_stmpe: stmpegrp {
fsl,pins = <
MX6UL_PAD_UART1_CTS_B__GPIO1_IO18 0x1b0b0
>;
};
};

1
arch/arm/boot/dts/imx6ul-isiot-emmc.dts
View File

@ -43,6 +43,7 @@
/dts-v1/; /dts-v1/;
#include "imx6ul-isiot.dtsi" #include "imx6ul-isiot.dtsi"
#include "imx6ul-isiot-common.dtsi"
/ { / {
model = "Engicam Is.IoT MX6UL eMMC Starter kit"; model = "Engicam Is.IoT MX6UL eMMC Starter kit";

1
arch/arm/boot/dts/imx6ul-isiot-nand.dts
View File

@ -43,6 +43,7 @@
/dts-v1/; /dts-v1/;
#include "imx6ul-isiot.dtsi" #include "imx6ul-isiot.dtsi"
#include "imx6ul-isiot-common.dtsi"
/ { / {
model = "Engicam Is.IoT MX6UL NAND Starter kit"; model = "Engicam Is.IoT MX6UL NAND Starter kit";

73
arch/arm/boot/dts/imx6ul-isiot.dtsi
View File

@ -52,6 +52,49 @@
chosen { chosen {
stdout-path = &uart1; stdout-path = &uart1;
}; };
backlight {
compatible = "pwm-backlight";
pwms = <&pwm8 0 100000>;
brightness-levels = < 0 1 2 3 4 5 6 7 8 9
10 11 12 13 14 15 16 17 18 19
20 21 22 23 24 25 26 27 28 29
30 31 32 33 34 35 36 37 38 39
40 41 42 43 44 45 46 47 48 49
50 51 52 53 54 55 56 57 58 59
60 61 62 63 64 65 66 67 68 69
70 71 72 73 74 75 76 77 78 79
80 81 82 83 84 85 86 87 88 89
90 91 92 93 94 95 96 97 98 99
100>;
default-brightness-level = <100>;
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c2 {
clock_frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&pwm8 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm8>;
status = "okay";
};
&sai2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai2>;
status = "okay";
}; };
&uart1 { &uart1 {
@ -72,6 +115,36 @@
}; };
&iomuxc { &iomuxc {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6UL_PAD_UART4_TX_DATA__I2C1_SCL 0x4001b8b0
MX6UL_PAD_UART4_RX_DATA__I2C1_SDA 0x4001b8b0
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6UL_PAD_GPIO1_IO00__I2C2_SCL 0x4001b8b0
MX6UL_PAD_GPIO1_IO01__I2C2_SDA 0x4001b8b0
>;
};
pinctrl_pwm8: pwm8grp {
fsl,pins = <
MX6UL_PAD_ENET1_RX_ER__PWM8_OUT 0x110b0
>;
};
pinctrl_sai2: sai2grp {
fsl,pins = <
MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0
MX6UL_PAD_JTAG_TMS__CCM_CLKO1 0x4001b031
MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088
MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088
MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0
>;
};
pinctrl_uart1: uart1grp { pinctrl_uart1: uart1grp {
fsl,pins = < fsl,pins = <
MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1

55
arch/arm/boot/dts/imx7-colibri-eval-v3.dtsi
View File

@ -44,11 +44,39 @@
chosen { chosen {
stdout-path = "serial0:115200n8"; stdout-path = "serial0:115200n8";
}; };
panel: panel {
compatible = "edt,et057090dhu";
backlight = <&bl>;
power-supply = <&reg_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&lcdif_out>;
};
};
};
reg_3v3: regulator-3v3 {
compatible = "regulator-fixed";
regulator-name = "3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
reg_5v0: regulator-5v0 {
compatible = "regulator-fixed";
regulator-name = "5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
}; };
&bl { &bl {
brightness-levels = <0 4 8 16 32 64 128 255>; brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>; default-brightness-level = <6>;
power-supply = <&reg_3v3>;
status = "okay"; status = "okay";
}; };
@ -75,32 +103,11 @@
}; };
&lcdif { &lcdif {
display = <&display0>;
status = "okay"; status = "okay";
display0: lcd-display { port {
bits-per-pixel = <16>; lcdif_out: endpoint {
bus-width = <18>; remote-endpoint = <&panel_in>;
display-timings {
native-mode = <&timing_vga>;
/* Standard VGA timing */
timing_vga: 640x480 {
clock-frequency = <25175000>;
hactive = <640>;
vactive = <480>;
hback-porch = <40>;
hfront-porch = <24>;
vback-porch = <32>;
vfront-porch = <11>;
hsync-len = <96>;
vsync-len = <2>;
de-active = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <0>;
};
}; };
}; };
}; };

45
arch/arm/boot/dts/imx7-colibri.dtsi
View File

@ -60,13 +60,6 @@
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
}; };
reg_vref_1v8: regulator-vref-1v8 {
compatible = "regulator-fixed";
regulator-name = "vref-1v8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
sound { sound {
compatible = "simple-audio-card"; compatible = "simple-audio-card";
simple-audio-card,name = "imx7-sgtl5000"; simple-audio-card,name = "imx7-sgtl5000";
@ -85,11 +78,11 @@
}; };
&adc1 { &adc1 {
vref-supply = <&reg_vref_1v8>; vref-supply = <&reg_DCDC3>;
}; };
&adc2 { &adc2 {
vref-supply = <&reg_vref_1v8>; vref-supply = <&reg_DCDC3>;
}; };
&cpu0 { &cpu0 {
@ -151,29 +144,29 @@
regulators { regulators {
reg_DCDC1: DCDC1 { /* V1.0_SOC */ reg_DCDC1: DCDC1 { /* V1.0_SOC */
regulator-min-microvolt = <975000>; regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1125000>; regulator-max-microvolt = <1100000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
reg_DCDC2: DCDC2 { /* V1.1_ARM */ reg_DCDC2: DCDC2 { /* V1.1_ARM */
regulator-min-microvolt = <975000>; regulator-min-microvolt = <975000>;
regulator-max-microvolt = <1125000>; regulator-max-microvolt = <1100000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
reg_DCDC3: DCDC3 { /* V1.8 */ reg_DCDC3: DCDC3 { /* V1.8 */
regulator-min-microvolt = <1775000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1825000>; regulator-max-microvolt = <1800000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
reg_DCDC4: DCDC4 { /* V1.35_DRAM */ reg_DCDC4: DCDC4 { /* V1.35_DRAM */
regulator-min-microvolt = <1325000>; regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1375000>; regulator-max-microvolt = <1350000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
@ -181,33 +174,33 @@
reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */ reg_LDO1: LDO1 { /* PWR_EN_+V3.3_ETH */
regulator-min-microvolt = <1800000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>; regulator-max-microvolt = <3300000>;
regulator-always-on; regulator-boot-on;
}; };
reg_LDO2: LDO2 { /* +V1.8_SD */ reg_LDO2: LDO2 { /* +V1.8_SD */
regulator-min-microvolt = <1775000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3325000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */ reg_LDO3: LDO3 { /* PWR_EN_+V3.3_LPSR */
regulator-min-microvolt = <3275000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3325000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
reg_LDO4: LDO4 { /* V1.8_LPSR */ reg_LDO4: LDO4 { /* V1.8_LPSR */
regulator-min-microvolt = <1775000>; regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1825000>; regulator-max-microvolt = <1800000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };
reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */ reg_LDO5: LDO5 { /* PWR_EN_+V3.3 */
regulator-min-microvolt = <1775000>; regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <1825000>; regulator-max-microvolt = <3300000>;
regulator-boot-on; regulator-boot-on;
regulator-always-on; regulator-always-on;
}; };

1
arch/arm/boot/dts/imx7d-colibri-eval-v3.dts
View File

@ -57,6 +57,7 @@
regulator-min-microvolt = <5000000>; regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>; regulator-max-microvolt = <5000000>;
gpio = <&gpio4 7 GPIO_ACTIVE_LOW>; gpio = <&gpio4 7 GPIO_ACTIVE_LOW>;
vin-supply = <&reg_5v0>;
}; };
}; };

74
arch/arm/boot/dts/imx7d-sdb-sht11.dts Normal file
View File

@ -0,0 +1,74 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include "imx7d-sdb.dts"
/ {
sensor {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sensor>;
compatible = "sensirion,sht15";
clk-gpios = <&gpio4 12 0>;
data-gpios = <&gpio4 13 0>;
vcc-supply = <&reg_sht15>;
};
reg_sht15: regulator-sht15 {
compatible = "regulator-fixed";
regulator-name = "reg_sht15";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
};
};
&i2c3 {
status = "disabled";
};
&iomuxc {
pinctrl_sensor: sensorgrp {
fsl,pins = <
MX7D_PAD_I2C3_SDA__GPIO4_IO13 0x4000007f
MX7D_PAD_I2C3_SCL__GPIO4_IO12 0x4000007f
>;
};
};

7
arch/arm/boot/dts/imx7s.dtsi
View File

@ -493,10 +493,9 @@
}; };
ocotp: ocotp-ctrl@30350000 { ocotp: ocotp-ctrl@30350000 {
compatible = "syscon"; compatible = "fsl,imx7d-ocotp", "syscon";
reg = <0x30350000 0x10000>; reg = <0x30350000 0x10000>;
clocks = <&clks IMX7D_CLK_DUMMY>; clocks = <&clks IMX7D_OCOTP_CLK>;
status = "disabled";
}; };
anatop: anatop@30360000 { anatop: anatop@30360000 {
@ -559,7 +558,7 @@
}; };
src: src@30390000 { src: src@30390000 {
compatible = "fsl,imx7d-src", "fsl,imx51-src", "syscon"; compatible = "fsl,imx7d-src", "syscon";
reg = <0x30390000 0x10000>; reg = <0x30390000 0x10000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
#reset-cells = <1>; #reset-cells = <1>;

14
arch/arm/boot/dts/vf610-zii-dev-rev-b.dts
View File

@ -239,7 +239,7 @@
#size-cells = <0>; #size-cells = <0>;
reg = <4>; reg = <4>;
switch2: switch2@0 { switch2: switch@0 {
compatible = "marvell,mv88e6085"; compatible = "marvell,mv88e6085";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
@ -459,18 +459,6 @@
>; >;
}; };
pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
fsl,pins = <
VF610_PAD_PTB5__GPIO_27 0x219d
>;
};
pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
fsl,pins = <
VF610_PAD_PTB4__GPIO_26 0x219d
>;
};
pinctrl_mdio_mux: pinctrl-mdio-mux { pinctrl_mdio_mux: pinctrl-mdio-mux {
fsl,pins = < fsl,pins = <
VF610_PAD_PTA18__GPIO_8 0x31c2 VF610_PAD_PTA18__GPIO_8 0x31c2

77
arch/arm/boot/dts/vf610-zii-dev-rev-c.dts
View File

@ -67,11 +67,17 @@
switch0: switch@0 { switch0: switch@0 {
compatible = "marvell,mv88e6190"; compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch0>;
pinctrl-names = "default";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0>; reg = <0>;
dsa,member = <0 0>; dsa,member = <0 0>;
eeprom-length = <512>; eeprom-length = <512>;
interrupt-parent = <&gpio0>;
interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
ports { ports {
#address-cells = <1>; #address-cells = <1>;
@ -91,21 +97,25 @@
port@1 { port@1 {
reg = <1>; reg = <1>;
label = "lan1"; label = "lan1";
phy-handle = <&switch0phy1>;
}; };
port@2 { port@2 {
reg = <2>; reg = <2>;
label = "lan2"; label = "lan2";
phy-handle = <&switch0phy2>;
}; };
port@3 { port@3 {
reg = <3>; reg = <3>;
label = "lan3"; label = "lan3";
phy-handle = <&switch0phy3>;
}; };
port@4 { port@4 {
reg = <4>; reg = <4>;
label = "lan4"; label = "lan4";
phy-handle = <&switch0phy4>;
}; };
switch0port10: port@10 { switch0port10: port@10 {
@ -115,6 +125,35 @@
link = <&switch1port10>; link = <&switch1port10>;
}; };
}; };
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch0phy1: switch0phy@1 {
reg = <1>;
interrupt-parent = <&switch0>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
};
switch0phy2: switch0phy@2 {
reg = <2>;
interrupt-parent = <&switch0>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
};
switch0phy3: switch0phy@3 {
reg = <3>;
interrupt-parent = <&switch0>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
switch0phy4: switch0phy@4 {
reg = <4>;
interrupt-parent = <&switch0>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};
};
}; };
}; };
@ -125,11 +164,17 @@
switch1: switch@0 { switch1: switch@0 {
compatible = "marvell,mv88e6190"; compatible = "marvell,mv88e6190";
pinctrl-0 = <&pinctrl_gpio_switch1>;
pinctrl-names = "default";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0>; reg = <0>;
dsa,member = <0 1>; dsa,member = <0 1>;
eeprom-length = <512>; eeprom-length = <512>;
interrupt-parent = <&gpio0>;
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
interrupt-controller;
#interrupt-cells = <2>;
ports { ports {
#address-cells = <1>; #address-cells = <1>;
@ -138,21 +183,25 @@
port@1 { port@1 {
reg = <1>; reg = <1>;
label = "lan5"; label = "lan5";
phy-handle = <&switch1phy1>;
}; };
port@2 { port@2 {
reg = <2>; reg = <2>;
label = "lan6"; label = "lan6";
phy-handle = <&switch1phy2>;
}; };
port@3 { port@3 {
reg = <3>; reg = <3>;
label = "lan7"; label = "lan7";
phy-handle = <&switch1phy3>;
}; };
port@4 { port@4 {
reg = <4>; reg = <4>;
label = "lan8"; label = "lan8";
phy-handle = <&switch1phy4>;
}; };
@ -163,6 +212,34 @@
link = <&switch0port10>; link = <&switch0port10>;
}; };
}; };
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch1phy1: switch1phy@1 {
reg = <1>;
interrupt-parent = <&switch1>;
interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
};
switch1phy2: switch1phy@2 {
reg = <2>;
interrupt-parent = <&switch1>;
interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
};
switch1phy3: switch1phy@3 {
reg = <3>;
interrupt-parent = <&switch1>;
interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
};
switch1phy4: switch1phy@4 {
reg = <4>;
interrupt-parent = <&switch1>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
};
};
}; };
}; };

12
arch/arm/boot/dts/vf610-zii-dev.dtsi
View File

@ -296,6 +296,18 @@
>; >;
}; };
pinctrl_gpio_switch0: pinctrl-gpio-switch0 {
fsl,pins = <
VF610_PAD_PTB5__GPIO_27 0x219d
>;
};
pinctrl_gpio_switch1: pinctrl-gpio-switch1 {
fsl,pins = <
VF610_PAD_PTB4__GPIO_26 0x219d
>;
};
pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset { pinctrl_i2c_mux_reset: pinctrl-i2c-mux-reset {
fsl,pins = < fsl,pins = <
VF610_PAD_PTE14__GPIO_119 0x31c2 VF610_PAD_PTE14__GPIO_119 0x31c2