From a427293f84ea2491fbdcfbddadc2a2f68e0d2969 Mon Sep 17 00:00:00 2001 From: Graf Yang Date: Wed, 10 Jun 2009 08:45:12 +0000 Subject: [PATCH] Blackfin: bf518f-ezbrd: fix SPI CS for SPI flash The SPI flash on the BF518F-EZBRD board is actually hooked up to CS2, not CS1, so make sure the resources are correct. URL: http://blackfin.uclinux.org/gf/tracker/5220 Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger --- arch/blackfin/mach-bf518/boards/ezbrd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/blackfin/mach-bf518/boards/ezbrd.c b/arch/blackfin/mach-bf518/boards/ezbrd.c index 8969a24cce7f..1382f0382359 100644 --- a/arch/blackfin/mach-bf518/boards/ezbrd.c +++ b/arch/blackfin/mach-bf518/boards/ezbrd.c @@ -246,7 +246,7 @@ static struct spi_board_info bfin_spi_board_info[] __initdata = { .modalias = "m25p80", /* Name of spi_driver for this device */ .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */ .bus_num = 0, /* Framework bus number */ - .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/ + .chip_select = 2, /* On BF518F-EZBRD it's SPI0_SSEL2 */ .platform_data = &bfin_spi_flash_data, .controller_data = &spi_flash_chip_info, .mode = SPI_MODE_3,