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EDAC, mce_amd: Detect SMCA using X86_FEATURE_SMCA 

Use X86_FEATURE_SMCA when detecting if SMCA is available instead of
directly using CPUID 0x80000007_EBX.

Signed-off-by: Yazen Ghannam <Yazen.Ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1462971509-3856-7-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Yazen Ghannam 2016-05-11 14:58:28 +02:00 committed by Ingo Molnar
parent 14cddfd530
commit a348ed83d9
1 changed files with 3 additions and 6 deletions
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9
drivers/edac/mce_amd.c
View File

@ -1052,7 +1052,6 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
struct mce *m = (struct mce *)data; struct mce *m = (struct mce *)data;
struct cpuinfo_x86 *c = &cpu_data(m->extcpu); struct cpuinfo_x86 *c = &cpu_data(m->extcpu);
int ecc; int ecc;
u32 ebx = cpuid_ebx(0x80000007);
if (amd_filter_mce(m)) if (amd_filter_mce(m))
return NOTIFY_STOP; return NOTIFY_STOP;
@ -1075,7 +1074,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
((m->status & MCI_STATUS_DEFERRED) ? "Deferred" : "-"), ((m->status & MCI_STATUS_DEFERRED) ? "Deferred" : "-"),
((m->status & MCI_STATUS_POISON) ? "Poison" : "-")); ((m->status & MCI_STATUS_POISON) ? "Poison" : "-"));
if (!!(ebx & BIT(3))) { if (boot_cpu_has(X86_FEATURE_SMCA)) {
u32 low, high; u32 low, high;
u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank); u32 addr = MSR_AMD64_SMCA_MCx_CONFIG(m->bank);
@ -1094,7 +1093,7 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
if (m->status & MCI_STATUS_ADDRV) if (m->status & MCI_STATUS_ADDRV)
pr_emerg(HW_ERR "MC%d Error Address: 0x%016llx\n", m->bank, m->addr); pr_emerg(HW_ERR "MC%d Error Address: 0x%016llx\n", m->bank, m->addr);
if (!!(ebx & BIT(3))) { if (boot_cpu_has(X86_FEATURE_SMCA)) {
decode_smca_errors(m); decode_smca_errors(m);
goto err_code; goto err_code;
} }
@ -1149,7 +1148,6 @@ static struct notifier_block amd_mce_dec_nb = {
static int __init mce_amd_init(void) static int __init mce_amd_init(void)
{ {
struct cpuinfo_x86 *c = &boot_cpu_data; struct cpuinfo_x86 *c = &boot_cpu_data;
u32 ebx;
if (c->x86_vendor != X86_VENDOR_AMD) if (c->x86_vendor != X86_VENDOR_AMD)
return -ENODEV; return -ENODEV;
@ -1205,9 +1203,8 @@ static int __init mce_amd_init(void)
break; break;
case 0x17: case 0x17:
ebx = cpuid_ebx(0x80000007);
xec_mask = 0x3f; xec_mask = 0x3f;
if (!(ebx & BIT(3))) { if (!boot_cpu_has(X86_FEATURE_SMCA)) {
printk(KERN_WARNING "Decoding supported only on Scalable MCA processors.\n"); printk(KERN_WARNING "Decoding supported only on Scalable MCA processors.\n");
goto err_out; goto err_out;
} }