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Two bugfixes and trivial suspend support for v7m. 

-----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.12 (GNU/Linux)
 
 iQIcBAABCAAGBQJTBl7NAAoJEOLc3ZEyZpvWn5QP/1tEIe7BbkA/93tInRT1BRM7
 F5jmcIjvx9dPLkyFhxyJpvUmcfHj0ngSrJGi75lTNNb6ZqjlkzJc/kjj/9nXVZqT
 q55HGMZ/xfcHYuUJ1nU/9ktqB8MW/7QOMZb9zupUr9891IIYGKQ+nOD/e9esC0/Q
 aW2yfS9f1Bi6CT/1pV2IxLLUj8sA8sppW1MHVuTJMfUsA+8Zp0n+DfuMEhPlgFdY
 GGc5dm+KUcWiwvfMr3mN+0BOtU9m/Y/IYSJ0rnczkJ5Q6QeErbjlv27LKD7LKEwa
 x4QFYuq+eh433hTThh7/V46oYFll87oaRdmFJBhAzZd6Nei9vw5DsMd6O5xinDkQ
 bvdGk3gmj8jTW16eMz/gFjgeB7j3ojlk6/Ji/UZf1Ajnzsdgt0nOkt4olP76w9bT
 eQaW1oL6ZMjVVHUQregvqU7bZQqDFQZwLzH2f2spFhIMbahhYBXB14ZC2c55hg4c
 eO1oRI+hP5sIeSbDSMUaNmLhmEWbkzIewjZS6KYVKRN08Lyw5H0Kp9TGO9b03+/O
 7IVn2Kpj9ooNcwLoNqBxDEIDAw0Tp/5LPDKgDNQhTj6lES6lOPT9CZVsS1h1Ve9N
 LMap3cFNpg46Fy3ZidwliEAgBPPGIH45TlkcLbw2C2pDe9XXfOOEKX+8RKUpHaPI
 r95Y70uQkwRppb1HDFfi
 =je7T
 -----END PGP SIGNATURE-----

Merge tag 'v7m-next' of git://git.pengutronix.de/git/ukl/linux into devel-testing

Two bugfixes and trivial suspend support for v7m.

Given that the bugfixes are only relevant when an oops is in progress
and admitting that there are not so many v7m users I don't see an urge
to include the bugfixes in 3.14 and so target 3.15-rc1 for this pull
request.
This commit is contained in:
Russell King 2014-02-21 11:43:11 +00:00
parent b28a960c42 f0d7515372
commit a2e6177c93
3 changed files with 14 additions and 5 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
arch/arm/Kconfig
View File

@ -2270,7 +2270,7 @@ source "kernel/power/Kconfig"
config ARCH_SUSPEND_POSSIBLE
depends on !ARCH_S5PC100
depends on CPU_ARM920T || CPU_ARM926T || CPU_FEROCEON || CPU_SA1100 || \
CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
CPU_V6 || CPU_V6K || CPU_V7 || CPU_V7M || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
def_bool y
config ARM_CPU_SUSPEND

8
arch/arm/include/asm/ptrace.h
View File

@ -27,9 +27,13 @@ struct pt_regs {
#define thumb_mode(regs) (0)
#endif
#ifndef CONFIG_CPU_V7M
#define isa_mode(regs) \
((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \
(((regs)->ARM_cpsr & PSR_T_BIT) >> 5))
((((regs)->ARM_cpsr & PSR_J_BIT) >> (__ffs(PSR_J_BIT) - 1)) | \
(((regs)->ARM_cpsr & PSR_T_BIT) >> (__ffs(PSR_T_BIT))))
#else
#define isa_mode(regs) 1 /* Thumb */
#endif
#define processor_mode(regs) \
((regs)->ARM_cpsr & MODE_MASK)

9
arch/arm/kernel/process.c
View File

@ -48,14 +48,14 @@ unsigned long __stack_chk_guard __read_mostly;
EXPORT_SYMBOL(__stack_chk_guard);
#endif
static const char *processor_modes[] = {
static const char *processor_modes[] __maybe_unused = {
"USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
"UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
"USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
"UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
};
static const char *isa_modes[] = {
static const char *isa_modes[] __maybe_unused = {
"ARM" , "Thumb" , "Jazelle", "ThumbEE"
};
@ -276,12 +276,17 @@ void __show_regs(struct pt_regs *regs)
buf[3] = flags & PSR_V_BIT ? 'V' : 'v';
buf[4] = '\0';
#ifndef CONFIG_CPU_V7M
printk("Flags: %s IRQs o%s FIQs o%s Mode %s ISA %s Segment %s\n",
buf, interrupts_enabled(regs) ? "n" : "ff",
fast_interrupts_enabled(regs) ? "n" : "ff",
processor_modes[processor_mode(regs)],
isa_modes[isa_mode(regs)],
get_fs() == get_ds() ? "kernel" : "user");
#else
printk("xPSR: %08lx\n", regs->ARM_cpsr);
#endif
#ifdef CONFIG_CPU_CP15
{
unsigned int ctrl;