dt-bindings: net: ti: cpsw-switch: update to fix comments
After original patch was merged there were additional comments/requests
provided by Rob Herring [1]. Mostly they are related to json-schema usage,
and this patch fixes them. Also SPDX-License-Identifier has been changed to
(GPL-2.0-only OR BSD-2-Clause) as requested.
[1] https://lkml.org/lkml/2019/11/21/875
Fixes: ef63fe72f6
("dt-bindings: net: ti: add new cpsw switch driver bindings")
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[robh: Remove 2 more maxItems that aren't necessary]
Signed-off-by: Rob Herring <robh@kernel.org>
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@ -1,4 +1,4 @@
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# SPDX-License-Identifier: GPL-2.0
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
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@ -44,7 +44,6 @@ properties:
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description: CPSW functional clock
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clock-names:
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maxItems: 1
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items:
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- const: fck
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@ -70,7 +69,6 @@ properties:
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Phandle to the system control device node which provides access to
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efuse IO range with MAC addresses
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ethernet-ports:
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type: object
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properties:
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@ -82,8 +80,6 @@ properties:
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patternProperties:
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"^port@[0-9]+$":
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type: object
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minItems: 1
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maxItems: 2
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description: CPSW external ports
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allOf:
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@ -91,23 +87,20 @@ properties:
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properties:
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reg:
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maxItems: 1
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enum: [1, 2]
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items:
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- enum: [1, 2]
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description: CPSW port number
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phys:
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$ref: /schemas/types.yaml#definitions/phandle-array
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maxItems: 1
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description: phandle on phy-gmii-sel PHY
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label:
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$ref: /schemas/types.yaml#/definitions/string-array
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maxItems: 1
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description: label associated with this port
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ti,dual-emac-pvid:
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$ref: /schemas/types.yaml#/definitions/uint32
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maxItems: 1
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allOf:
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- $ref: /schemas/types.yaml#/definitions/uint32
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minimum: 1
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maximum: 1024
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description:
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@ -136,7 +129,6 @@ properties:
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description: CPTS reference clock
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clock-names:
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maxItems: 1
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items:
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- const: cpts
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@ -201,7 +193,7 @@ examples:
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phys = <&phy_gmii_sel 1>;
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phy-handle = <ðphy0_sw>;
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phy-mode = "rgmii";
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ti,dual_emac_pvid = <1>;
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ti,dual-emac-pvid = <1>;
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};
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cpsw_port2: port@2 {
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@ -211,7 +203,7 @@ examples:
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phys = <&phy_gmii_sel 2>;
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phy-handle = <ðphy1_sw>;
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phy-mode = "rgmii";
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ti,dual_emac_pvid = <2>;
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ti,dual-emac-pvid = <2>;
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};
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};
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