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MIPS: PCI: Byteswap not needed in little-endian mode 

Rename function xlp_enable_pci_bswap() to xlp_config_pci_bswap(), which
is a better description for its functionality.  When compiled in
big-endian mode, xlp_config_pci_bswap() will configure the PCIe links
to byteswap.  In little-endian mode, no swap configuration is needed
for the PCIe controller, and the function is empty.

Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Patchwork: http://patchwork.linux-mips.org/patch/4802/
Signed-off-by: John Crispin <blogic@openwrt.org>
This commit is contained in:
Jayachandran C 2013-01-16 11:12:40 +00:00 committed by John Crispin
parent 220d9122e8
commit a264b5e8dc
1 changed files with 12 additions and 3 deletions
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15
arch/mips/pci/pci-xlp.c
View File

@ -191,7 +191,13 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
return 0;
}
static int xlp_enable_pci_bswap(void)
/*
* If big-endian, enable hardware byteswap on the PCIe bridges.
* This will make both the SoC and PCIe devices behave consistently with
* readl/writel.
*/
#ifdef __BIG_ENDIAN
static void xlp_config_pci_bswap(void)
{
uint64_t pciebase, sysbase;
int node, i;
@ -222,8 +228,11 @@ static int xlp_enable_pci_bswap(void)
reg = nlm_read_bridge_reg(sysbase, BRIDGE_PCIEIO_LIMIT0 + i);
nlm_write_pci_reg(pciebase, PCIE_BYTE_SWAP_IO_LIM, reg | 0xfff);
}
return 0;
}
#else
/* Swap configuration not needed in little-endian mode */
static inline void xlp_config_pci_bswap(void) {}
#endif /* __BIG_ENDIAN */
static int __init pcibios_init(void)
{
@ -235,7 +244,7 @@ static int __init pcibios_init(void)
ioport_resource.start = 0;
ioport_resource.end = ~0;
xlp_enable_pci_bswap();
xlp_config_pci_bswap();
set_io_port_base(CKSEG1);
nlm_pci_controller.io_map_base = CKSEG1;