fix typo 'the same the\>'
Signed-off-by: Uwe Kleine-König <Uwe.Kleine-Koenig@digi.com> Signed-off-by: Adrian Bunk <bunk@kernel.org>
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@ -32,7 +32,7 @@ BARRIER IO before the access to the SMC chip because the AEN latch
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only needs occurs after the SMC IO write cycle. The routines that
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only needs occurs after the SMC IO write cycle. The routines that
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implement this work-around make an additional concession which is to
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implement this work-around make an additional concession which is to
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disable interrupts during the IO sequence. Other hardware devices
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disable interrupts during the IO sequence. Other hardware devices
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(the LogicPD CPLD) have registers in the same the physical memory
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(the LogicPD CPLD) have registers in the same physical memory
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region as the SMC chip. An interrupt might allow an access to one of
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region as the SMC chip. An interrupt might allow an access to one of
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those registers while SMC IO is being performed.
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those registers while SMC IO is being performed.
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@ -376,7 +376,7 @@ static int DoC_IdentChip(struct DiskOnChip *doc, int floor, int chip)
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* hardware restriction. */
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* hardware restriction. */
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if (doc->mfr) {
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if (doc->mfr) {
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if (doc->mfr == mfr && doc->id == id)
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if (doc->mfr == mfr && doc->id == id)
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return 1; /* This is another the same the first */
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return 1; /* This is the same as the first */
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else
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else
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printk(KERN_WARNING
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printk(KERN_WARNING
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"Flash chip at floor %d, chip %d is different:\n",
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"Flash chip at floor %d, chip %d is different:\n",
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@ -22,7 +22,7 @@
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#include <asm/arch/platform.h>
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#include <asm/arch/platform.h>
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/*
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/*
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* IRQ interrupts definitions are the same the INT definitions
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* IRQ interrupts definitions are the same as the INT definitions
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* held within platform.h
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* held within platform.h
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*/
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*/
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#define IRQ_VIC_START 0
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#define IRQ_VIC_START 0
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@ -94,7 +94,7 @@
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#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31
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#define IRQMASK_VICSOURCE31 INTMASK_VICSOURCE31
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/*
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/*
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* FIQ interrupts definitions are the same the INT definitions.
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* FIQ interrupts definitions are the same as the INT definitions.
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*/
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*/
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#define FIQ_WDOGINT INT_WDOGINT
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#define FIQ_WDOGINT INT_WDOGINT
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#define FIQ_SOFTINT INT_SOFTINT
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#define FIQ_SOFTINT INT_SOFTINT
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